1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/CodeGen.h"
20 #include "llvm/Target/TargetOptions.h"
26 class InstrItineraryData;
32 class PassManagerBase;
35 class TargetFrameLowering;
36 class TargetInstrInfo;
37 class TargetIntrinsicInfo;
40 class TargetPassConfig;
41 class TargetRegisterInfo;
42 class TargetSelectionDAGInfo;
43 class TargetSubtargetInfo;
44 class ScalarTargetTransformInfo;
45 class VectorTargetTransformInfo;
46 class formatted_raw_ostream;
49 //===----------------------------------------------------------------------===//
51 /// TargetMachine - Primary interface to the complete machine description for
52 /// the target machine. All target-specific information should be accessible
53 /// through this interface.
56 TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
57 void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
58 protected: // Can only create subclasses.
59 TargetMachine(const Target &T, StringRef TargetTriple,
60 StringRef CPU, StringRef FS, const TargetOptions &Options);
62 /// TheTarget - The Target that this machine was created for.
63 const Target &TheTarget;
65 /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
66 /// feature strings the TargetMachine instance is created with.
67 std::string TargetTriple;
68 std::string TargetCPU;
71 /// CodeGenInfo - Low level target information such as relocation model.
72 const MCCodeGenInfo *CodeGenInfo;
74 /// AsmInfo - Contains target specific asm information.
76 const MCAsmInfo *AsmInfo;
78 unsigned MCRelaxAll : 1;
79 unsigned MCNoExecStack : 1;
80 unsigned MCSaveTempLabels : 1;
81 unsigned MCUseLoc : 1;
82 unsigned MCUseCFI : 1;
83 unsigned MCUseDwarfDirectory : 1;
86 virtual ~TargetMachine();
88 const Target &getTarget() const { return TheTarget; }
90 const StringRef getTargetTriple() const { return TargetTriple; }
91 const StringRef getTargetCPU() const { return TargetCPU; }
92 const StringRef getTargetFeatureString() const { return TargetFS; }
94 /// getSubtargetImpl - virtual method implemented by subclasses that returns
95 /// a reference to that target's TargetSubtargetInfo-derived member variable.
96 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
98 mutable TargetOptions Options;
100 /// \brief Reset the target options based on the function's attributes.
101 void resetTargetOptions(const MachineFunction *MF) const;
103 // Interfaces to the major aspects of target machine information:
104 // -- Instruction opcode and operand information
105 // -- Pipelines and scheduling information
106 // -- Stack frame information
107 // -- Selection DAG lowering information
109 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
110 virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
111 virtual const TargetLowering *getTargetLowering() const { return 0; }
112 virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
113 virtual const DataLayout *getDataLayout() const { return 0; }
115 /// getMCAsmInfo - Return target specific asm information.
117 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
119 /// getSubtarget - This method returns a pointer to the specified type of
120 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
121 /// returned is of the correct type.
122 template<typename STC> const STC &getSubtarget() const {
123 return *static_cast<const STC*>(getSubtargetImpl());
126 /// getRegisterInfo - If register information is available, return it. If
127 /// not, return null. This is kept separate from RegInfo until RegInfo has
128 /// details of graph coloring register allocation removed from it.
130 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
132 /// getIntrinsicInfo - If intrinsic information is available, return it. If
133 /// not, return null.
135 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
137 /// getJITInfo - If this target supports a JIT, return information for it,
138 /// otherwise return null.
140 virtual TargetJITInfo *getJITInfo() { return 0; }
142 /// getInstrItineraryData - Returns instruction itinerary data for the target
143 /// or specific subtarget.
145 virtual const InstrItineraryData *getInstrItineraryData() const {
149 /// hasMCRelaxAll - Check whether all machine code instructions should be
151 bool hasMCRelaxAll() const { return MCRelaxAll; }
153 /// setMCRelaxAll - Set whether all machine code instructions should be
155 void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
157 /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
158 /// (i.e., not treated as temporary).
159 bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
161 /// setMCSaveTempLabels - Set whether temporary labels will be preserved
162 /// (i.e., not treated as temporary).
163 void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
165 /// hasMCNoExecStack - Check whether an executable stack is not needed.
166 bool hasMCNoExecStack() const { return MCNoExecStack; }
168 /// setMCNoExecStack - Set whether an executabel stack is not needed.
169 void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
171 /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
172 bool hasMCUseLoc() const { return MCUseLoc; }
174 /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
175 void setMCUseLoc(bool Value) { MCUseLoc = Value; }
177 /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
178 bool hasMCUseCFI() const { return MCUseCFI; }
180 /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
181 void setMCUseCFI(bool Value) { MCUseCFI = Value; }
183 /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
184 /// explicit directories.
185 bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
187 /// setMCUseDwarfDirectory - Set whether all we should use .file directives
188 /// with explicit directories.
189 void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
191 /// getRelocationModel - Returns the code generation relocation model. The
192 /// choices are static, PIC, and dynamic-no-pic, and target default.
193 Reloc::Model getRelocationModel() const;
195 /// getCodeModel - Returns the code model. The choices are small, kernel,
196 /// medium, large, and target default.
197 CodeModel::Model getCodeModel() const;
199 /// getTLSModel - Returns the TLS model which should be used for the given
201 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
203 /// getOptLevel - Returns the optimization level: None, Less,
204 /// Default, or Aggressive.
205 CodeGenOpt::Level getOptLevel() const;
207 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
209 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
211 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
213 static bool getAsmVerbosityDefault();
215 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
217 static void setAsmVerbosityDefault(bool);
219 /// getDataSections - Return true if data objects should be emitted into their
220 /// own section, corresponds to -fdata-sections.
221 static bool getDataSections();
223 /// getFunctionSections - Return true if functions should be emitted into
224 /// their own section, corresponding to -ffunction-sections.
225 static bool getFunctionSections();
227 /// setDataSections - Set if the data are emit into separate sections.
228 static void setDataSections(bool);
230 /// setFunctionSections - Set if the functions are emit into separate
232 static void setFunctionSections(bool);
234 /// \brief Register analysis passes for this target with a pass manager.
235 virtual void addAnalysisPasses(PassManagerBase &) {}
237 /// CodeGenFileType - These enums are meant to be passed into
238 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
239 /// it to indicate what type of file could actually be made.
240 enum CodeGenFileType {
243 CGFT_Null // Do not emit any output.
246 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
247 /// specified file emitted. Typically this will involve several steps of code
248 /// generation. This method should return true if emission of this file type
249 /// is not supported, or false on success.
250 virtual bool addPassesToEmitFile(PassManagerBase &,
251 formatted_raw_ostream &,
253 bool /*DisableVerify*/ = true,
254 AnalysisID StartAfter = 0,
255 AnalysisID StopAfter = 0) {
259 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
260 /// get machine code emitted. This uses a JITCodeEmitter object to handle
261 /// actually outputting the machine code and resolving things like the address
262 /// of functions. This method returns true if machine code emission is
265 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
267 bool /*DisableVerify*/ = true) {
271 /// addPassesToEmitMC - Add passes to the specified pass manager to get
272 /// machine code emitted with the MCJIT. This method returns true if machine
273 /// code is not supported. It fills the MCContext Ctx pointer which can be
274 /// used to build custom MCStreamer.
276 virtual bool addPassesToEmitMC(PassManagerBase &,
279 bool /*DisableVerify*/ = true) {
284 /// LLVMTargetMachine - This class describes a target machine that is
285 /// implemented with the LLVM target-independent code generator.
287 class LLVMTargetMachine : public TargetMachine {
288 protected: // Can only create subclasses.
289 LLVMTargetMachine(const Target &T, StringRef TargetTriple,
290 StringRef CPU, StringRef FS, TargetOptions Options,
291 Reloc::Model RM, CodeModel::Model CM,
292 CodeGenOpt::Level OL);
295 /// \brief Register analysis passes for this target with a pass manager.
297 /// This registers target independent analysis passes.
298 virtual void addAnalysisPasses(PassManagerBase &PM);
300 /// createPassConfig - Create a pass configuration object to be used by
301 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
302 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
304 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
305 /// specified file emitted. Typically this will involve several steps of code
307 virtual bool addPassesToEmitFile(PassManagerBase &PM,
308 formatted_raw_ostream &Out,
309 CodeGenFileType FileType,
310 bool DisableVerify = true,
311 AnalysisID StartAfter = 0,
312 AnalysisID StopAfter = 0);
314 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
315 /// get machine code emitted. This uses a JITCodeEmitter object to handle
316 /// actually outputting the machine code and resolving things like the address
317 /// of functions. This method returns true if machine code emission is
320 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
322 bool DisableVerify = true);
324 /// addPassesToEmitMC - Add passes to the specified pass manager to get
325 /// machine code emitted with the MCJIT. This method returns true if machine
326 /// code is not supported. It fills the MCContext Ctx pointer which can be
327 /// used to build custom MCStreamer.
329 virtual bool addPassesToEmitMC(PassManagerBase &PM,
332 bool DisableVerify = true);
334 /// addCodeEmitter - This pass should be overridden by the target to add a
335 /// code emitter, if supported. If this is not supported, 'true' should be
337 virtual bool addCodeEmitter(PassManagerBase &,
343 } // End llvm namespace