1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
24 class TargetSubtarget;
25 class TargetInstrInfo;
26 class TargetIntrinsicInfo;
29 class TargetFrameInfo;
30 class MachineCodeEmitter;
32 class TargetRegisterInfo;
34 class PassManagerBase;
37 class TargetMachOWriterInfo;
38 class TargetELFWriterInfo;
41 // Relocation model types.
46 PIC_, // Cannot be named PIC due to collision with -DPIC
72 // Code generation optimization level.
73 namespace CodeGenOpt {
82 // Possible float ABI settings. Soft is soft float, Hard is hard float, Default
83 // is target-specific. Used with FloatABIType in TargetOptions.h.
92 //===----------------------------------------------------------------------===//
94 /// TargetMachine - Primary interface to the complete machine description for
95 /// the target machine. All target-specific information should be accessible
96 /// through this interface.
99 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
100 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
101 protected: // Can only create subclasses.
104 /// getSubtargetImpl - virtual method implemented by subclasses that returns
105 /// a reference to that target's TargetSubtarget-derived member variable.
106 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
108 /// AsmInfo - Contains target specific asm information.
110 mutable const TargetAsmInfo *AsmInfo;
112 /// createTargetAsmInfo - Create a new instance of target specific asm
114 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
117 virtual ~TargetMachine();
119 /// getModuleMatchQuality - This static method should be implemented by
120 /// targets to indicate how closely they match the specified module. This is
121 /// used by the LLC tool to determine which target to use when an explicit
122 /// -march option is not specified. If a target returns zero, it will never
123 /// be chosen without an explicit -march option.
124 static unsigned getModuleMatchQuality(const Module &) { return 0; }
126 /// getJITMatchQuality - This static method should be implemented by targets
127 /// that provide JIT capabilities to indicate how suitable they are for
128 /// execution on the current host. If a value of 0 is returned, the target
129 /// will not be used unless an explicit -march option is used.
130 static unsigned getJITMatchQuality() { return 0; }
132 // Interfaces to the major aspects of target machine information:
133 // -- Instruction opcode and operand information
134 // -- Pipelines and scheduling information
135 // -- Stack frame information
136 // -- Selection DAG lowering information
138 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
139 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
140 virtual TargetLowering *getTargetLowering() const { return 0; }
141 virtual const TargetData *getTargetData() const { return 0; }
143 /// getTargetAsmInfo - Return target specific asm information.
145 const TargetAsmInfo *getTargetAsmInfo() const {
146 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
150 /// getSubtarget - This method returns a pointer to the specified type of
151 /// TargetSubtarget. In debug builds, it verifies that the object being
152 /// returned is of the correct type.
153 template<typename STC> const STC &getSubtarget() const {
154 const TargetSubtarget *TST = getSubtargetImpl();
155 assert(TST && dynamic_cast<const STC*>(TST) &&
156 "Not the right kind of subtarget!");
157 return *static_cast<const STC*>(TST);
160 /// getRegisterInfo - If register information is available, return it. If
161 /// not, return null. This is kept separate from RegInfo until RegInfo has
162 /// details of graph coloring register allocation removed from it.
164 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
166 /// getIntrinsicInfo - If intrinsic information is available, return it. If
167 /// not, return null.
169 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
171 /// getJITInfo - If this target supports a JIT, return information for it,
172 /// otherwise return null.
174 virtual TargetJITInfo *getJITInfo() { return 0; }
176 /// getInstrItineraryData - Returns instruction itinerary data for the target
177 /// or specific subtarget.
179 virtual const InstrItineraryData getInstrItineraryData() const {
180 return InstrItineraryData();
183 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
184 /// information for it, otherwise return null.
186 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
188 /// getELFWriterInfo - If this target supports an ELF writer, return
189 /// information for it, otherwise return null.
191 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
193 /// getRelocationModel - Returns the code generation relocation model. The
194 /// choices are static, PIC, and dynamic-no-pic, and target default.
195 static Reloc::Model getRelocationModel();
197 /// setRelocationModel - Sets the code generation relocation model.
199 static void setRelocationModel(Reloc::Model Model);
201 /// getCodeModel - Returns the code model. The choices are small, kernel,
202 /// medium, large, and target default.
203 static CodeModel::Model getCodeModel();
205 /// setCodeModel - Sets the code model.
207 static void setCodeModel(CodeModel::Model Model);
209 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
211 static bool getAsmVerbosityDefault();
213 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
215 static void setAsmVerbosityDefault(bool);
217 /// CodeGenFileType - These enums are meant to be passed into
218 /// addPassesToEmitFile to indicate what type of file to emit.
219 enum CodeGenFileType {
220 AssemblyFile, ObjectFile, DynamicLibrary
223 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
224 /// on this target. User flag overrides.
225 virtual bool getEnableTailMergeDefault() const { return true; }
227 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
228 /// specified file emitted. Typically this will involve several steps of code
229 /// generation. If Fast is set to true, the code generator should emit code
230 /// as fast as possible, though the generated code may be less efficient.
231 /// This method should return FileModel::Error if emission of this file type
232 /// is not supported.
234 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
238 return FileModel::None;
241 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
242 /// to be split up (e.g., to add an object writer pass), this method can be
243 /// used to finish up adding passes to emit the file, if necessary.
245 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
246 MachineCodeEmitter *,
251 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
252 /// to be split up (e.g., to add an object writer pass), this method can be
253 /// used to finish up adding passes to emit the file, if necessary.
255 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
261 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
262 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
263 /// actually outputting the machine code and resolving things like the address
264 /// of functions. This method returns true if machine code emission is
267 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
268 MachineCodeEmitter &,
273 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
274 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
275 /// actually outputting the machine code and resolving things like the address
276 /// of functions. This method returns true if machine code emission is
279 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
285 /// addPassesToEmitWholeFile - This method can be implemented by targets that
286 /// require having the entire module at once. This is not recommended, do not
288 virtual bool WantsWholeFile() const { return false; }
289 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
296 /// LLVMTargetMachine - This class describes a target machine that is
297 /// implemented with the LLVM target-independent code generator.
299 class LLVMTargetMachine : public TargetMachine {
300 protected: // Can only create subclasses.
301 LLVMTargetMachine() { }
303 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
304 /// both emitting to assembly files or machine code output.
306 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
310 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
311 /// specified file emitted. Typically this will involve several steps of code
312 /// generation. If OptLevel is None, the code generator should emit code as fast
313 /// as possible, though the generated code may be less efficient. This method
314 /// should return FileModel::Error if emission of this file type is not
317 /// The default implementation of this method adds components from the
318 /// LLVM retargetable code generator, invoking the methods below to get
319 /// target-specific passes in standard locations.
321 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
323 CodeGenFileType FileType,
326 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
327 /// to be split up (e.g., to add an object writer pass), this method can be
328 /// used to finish up adding passes to emit the file, if necessary.
330 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
331 MachineCodeEmitter *MCE,
334 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
335 /// to be split up (e.g., to add an object writer pass), this method can be
336 /// used to finish up adding passes to emit the file, if necessary.
338 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
342 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
343 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
344 /// actually outputting the machine code and resolving things like the address
345 /// of functions. This method returns true if machine code emission is
348 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
349 MachineCodeEmitter &MCE,
352 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
353 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
354 /// actually outputting the machine code and resolving things like the address
355 /// of functions. This method returns true if machine code emission is
358 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
362 /// Target-Independent Code Generator Pass Configuration Options.
364 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
365 /// passes, then install an instruction selector pass, which converts from
366 /// LLVM code to machine instructions.
367 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
371 /// addPreRegAllocPasses - This method may be implemented by targets that want
372 /// to run passes immediately before register allocation. This should return
373 /// true if -print-machineinstrs should print after these passes.
374 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
378 /// addPostRegAllocPasses - This method may be implemented by targets that
379 /// want to run passes after register allocation but before prolog-epilog
380 /// insertion. This should return true if -print-machineinstrs should print
381 /// after these passes.
382 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
386 /// addPreEmitPass - This pass may be implemented by targets that want to run
387 /// passes immediately before machine code is emitted. This should return
388 /// true if -print-machineinstrs should print out the code after the passes.
389 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
394 /// addAssemblyEmitter - This pass should be overridden by the target to add
395 /// the asmprinter, if asm emission is supported. If this is not supported,
396 /// 'true' should be returned.
397 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
398 bool /* VerboseAsmDefault */, raw_ostream &) {
402 /// addCodeEmitter - This pass should be overridden by the target to add a
403 /// code emitter, if supported. If this is not supported, 'true' should be
404 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
405 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
406 bool /*DumpAsm*/, MachineCodeEmitter &) {
410 /// addCodeEmitter - This pass should be overridden by the target to add a
411 /// code emitter, if supported. If this is not supported, 'true' should be
412 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
413 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
414 bool /*DumpAsm*/, JITCodeEmitter &) {
418 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
419 /// a code emitter (without setting flags), if supported. If this is not
420 /// supported, 'true' should be returned. If DumpAsm is true, the generated
421 /// assembly is printed to cerr.
422 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
423 bool /*DumpAsm*/, MachineCodeEmitter &) {
427 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
428 /// a code emitter (without setting flags), if supported. If this is not
429 /// supported, 'true' should be returned. If DumpAsm is true, the generated
430 /// assembly is printed to cerr.
431 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
432 bool /*DumpAsm*/, JITCodeEmitter &) {
436 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
437 /// on this target. User flag overrides.
438 virtual bool getEnableTailMergeDefault() const { return true; }
441 } // End llvm namespace