1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
26 class TargetSubtarget;
27 class TargetInstrInfo;
28 class TargetIntrinsicInfo;
31 class TargetFrameInfo;
33 class TargetRegisterInfo;
34 class PassManagerBase;
37 class TargetELFWriterInfo;
38 class formatted_raw_ostream;
40 // Relocation model types.
45 PIC_, // Cannot be named PIC due to collision with -DPIC
61 // Code generation optimization level.
62 namespace CodeGenOpt {
71 // Specify if we should encode the LSDA pointer in the FDE as 4- or 8-bytes.
72 namespace DwarfLSDAEncoding {
80 //===----------------------------------------------------------------------===//
82 /// TargetMachine - Primary interface to the complete machine description for
83 /// the target machine. All target-specific information should be accessible
84 /// through this interface.
87 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
88 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
89 protected: // Can only create subclasses.
90 TargetMachine(const Target &);
92 /// getSubtargetImpl - virtual method implemented by subclasses that returns
93 /// a reference to that target's TargetSubtarget-derived member variable.
94 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
96 /// TheTarget - The Target that this machine was created for.
97 const Target &TheTarget;
99 /// AsmInfo - Contains target specific asm information.
101 const MCAsmInfo *AsmInfo;
104 virtual ~TargetMachine();
106 const Target &getTarget() const { return TheTarget; }
108 // Interfaces to the major aspects of target machine information:
109 // -- Instruction opcode and operand information
110 // -- Pipelines and scheduling information
111 // -- Stack frame information
112 // -- Selection DAG lowering information
114 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
115 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
116 virtual TargetLowering *getTargetLowering() const { return 0; }
117 virtual const TargetData *getTargetData() const { return 0; }
119 /// getMCAsmInfo - Return target specific asm information.
121 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
123 /// getSubtarget - This method returns a pointer to the specified type of
124 /// TargetSubtarget. In debug builds, it verifies that the object being
125 /// returned is of the correct type.
126 template<typename STC> const STC &getSubtarget() const {
127 return *static_cast<const STC*>(getSubtargetImpl());
130 /// getRegisterInfo - If register information is available, return it. If
131 /// not, return null. This is kept separate from RegInfo until RegInfo has
132 /// details of graph coloring register allocation removed from it.
134 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
136 /// getIntrinsicInfo - If intrinsic information is available, return it. If
137 /// not, return null.
139 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
141 /// getJITInfo - If this target supports a JIT, return information for it,
142 /// otherwise return null.
144 virtual TargetJITInfo *getJITInfo() { return 0; }
146 /// getInstrItineraryData - Returns instruction itinerary data for the target
147 /// or specific subtarget.
149 virtual const InstrItineraryData getInstrItineraryData() const {
150 return InstrItineraryData();
153 /// getELFWriterInfo - If this target supports an ELF writer, return
154 /// information for it, otherwise return null.
156 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
158 /// getRelocationModel - Returns the code generation relocation model. The
159 /// choices are static, PIC, and dynamic-no-pic, and target default.
160 static Reloc::Model getRelocationModel();
162 /// setRelocationModel - Sets the code generation relocation model.
164 static void setRelocationModel(Reloc::Model Model);
166 /// getCodeModel - Returns the code model. The choices are small, kernel,
167 /// medium, large, and target default.
168 static CodeModel::Model getCodeModel();
170 /// setCodeModel - Sets the code model.
172 static void setCodeModel(CodeModel::Model Model);
174 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
176 static bool getAsmVerbosityDefault();
178 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
180 static void setAsmVerbosityDefault(bool);
182 /// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are
183 /// 4-byte, 8-byte, and target default. The CIE is hard-coded to indicate that
184 /// the LSDA pointer in the FDE section is an "sdata4", and should be encoded
185 /// as a 4-byte pointer by default. However, some systems may require a
186 /// different size due to bugs or other conditions. We will default to a
187 /// 4-byte encoding unless the system tells us otherwise.
189 /// FIXME: This call-back isn't good! We should be using the correct encoding
190 /// regardless of the system. However, there are some systems which have bugs
191 /// that prevent this from occuring.
192 virtual DwarfLSDAEncoding::Encoding getLSDAEncoding() const {
193 return DwarfLSDAEncoding::Default;
196 /// CodeGenFileType - These enums are meant to be passed into
197 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
198 /// it to indicate what type of file could actually be made.
199 enum CodeGenFileType {
202 CGFT_Null // Do not emit any output.
205 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
206 /// on this target. User flag overrides.
207 virtual bool getEnableTailMergeDefault() const { return true; }
209 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
210 /// specified file emitted. Typically this will involve several steps of code
211 /// generation. This method should return true if emission of this file type
212 /// is not supported, or false on success.
213 virtual bool addPassesToEmitFile(PassManagerBase &,
214 formatted_raw_ostream &,
215 CodeGenFileType Filetype,
220 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
221 /// get machine code emitted. This uses a JITCodeEmitter object to handle
222 /// actually outputting the machine code and resolving things like the address
223 /// of functions. This method returns true if machine code emission is
226 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
232 /// addPassesToEmitWholeFile - This method can be implemented by targets that
233 /// require having the entire module at once. This is not recommended, do not
235 virtual bool WantsWholeFile() const { return false; }
236 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
243 /// LLVMTargetMachine - This class describes a target machine that is
244 /// implemented with the LLVM target-independent code generator.
246 class LLVMTargetMachine : public TargetMachine {
247 protected: // Can only create subclasses.
248 LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
250 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
251 /// both emitting to assembly files or machine code output.
253 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
256 virtual void setCodeModelForJIT();
257 virtual void setCodeModelForStatic();
261 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
262 /// specified file emitted. Typically this will involve several steps of code
263 /// generation. If OptLevel is None, the code generator should emit code as
264 /// fast as possible, though the generated code may be less efficient.
265 virtual bool addPassesToEmitFile(PassManagerBase &PM,
266 formatted_raw_ostream &Out,
267 CodeGenFileType FileType,
270 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
271 /// get machine code emitted. This uses a JITCodeEmitter object to handle
272 /// actually outputting the machine code and resolving things like the address
273 /// of functions. This method returns true if machine code emission is
276 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
280 /// Target-Independent Code Generator Pass Configuration Options.
282 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
283 /// passes, then install an instruction selector pass, which converts from
284 /// LLVM code to machine instructions.
285 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
289 /// addPreRegAlloc - This method may be implemented by targets that want to
290 /// run passes immediately before register allocation. This should return
291 /// true if -print-machineinstrs should print after these passes.
292 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
296 /// addPostRegAlloc - This method may be implemented by targets that want
297 /// to run passes after register allocation but before prolog-epilog
298 /// insertion. This should return true if -print-machineinstrs should print
299 /// after these passes.
300 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
304 /// addPreSched2 - This method may be implemented by targets that want to
305 /// run passes after prolog-epilog insertion and before the second instruction
306 /// scheduling pass. This should return true if -print-machineinstrs should
307 /// print after these passes.
308 virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
312 /// addPreEmitPass - This pass may be implemented by targets that want to run
313 /// passes immediately before machine code is emitted. This should return
314 /// true if -print-machineinstrs should print out the code after the passes.
315 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
320 /// addCodeEmitter - This pass should be overridden by the target to add a
321 /// code emitter, if supported. If this is not supported, 'true' should be
323 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
328 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
329 /// on this target. User flag overrides.
330 virtual bool getEnableTailMergeDefault() const { return true; }
333 } // End llvm namespace