1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
26 class TargetSubtarget;
27 class TargetInstrInfo;
28 class TargetIntrinsicInfo;
31 class TargetFrameInfo;
32 class MachineCodeEmitter;
34 class ObjectCodeEmitter;
35 class TargetRegisterInfo;
36 class PassManagerBase;
39 class TargetMachOWriterInfo;
40 class TargetELFWriterInfo;
41 class formatted_raw_ostream;
43 // Relocation model types.
48 PIC_, // Cannot be named PIC due to collision with -DPIC
74 // Code generation optimization level.
75 namespace CodeGenOpt {
85 //===----------------------------------------------------------------------===//
87 /// TargetMachine - Primary interface to the complete machine description for
88 /// the target machine. All target-specific information should be accessible
89 /// through this interface.
92 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
93 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
94 protected: // Can only create subclasses.
95 TargetMachine(const Target &);
97 /// getSubtargetImpl - virtual method implemented by subclasses that returns
98 /// a reference to that target's TargetSubtarget-derived member variable.
99 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
101 /// TheTarget - The Target that this machine was created for.
102 const Target &TheTarget;
104 /// AsmInfo - Contains target specific asm information.
106 const MCAsmInfo *AsmInfo;
109 virtual ~TargetMachine();
111 const Target &getTarget() const { return TheTarget; }
113 // Interfaces to the major aspects of target machine information:
114 // -- Instruction opcode and operand information
115 // -- Pipelines and scheduling information
116 // -- Stack frame information
117 // -- Selection DAG lowering information
119 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
120 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
121 virtual TargetLowering *getTargetLowering() const { return 0; }
122 virtual const TargetData *getTargetData() const { return 0; }
124 /// getMCAsmInfo - Return target specific asm information.
126 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
128 /// getSubtarget - This method returns a pointer to the specified type of
129 /// TargetSubtarget. In debug builds, it verifies that the object being
130 /// returned is of the correct type.
131 template<typename STC> const STC &getSubtarget() const {
132 const TargetSubtarget *TST = getSubtargetImpl();
133 assert(TST && dynamic_cast<const STC*>(TST) &&
134 "Not the right kind of subtarget!");
135 return *static_cast<const STC*>(TST);
138 /// getRegisterInfo - If register information is available, return it. If
139 /// not, return null. This is kept separate from RegInfo until RegInfo has
140 /// details of graph coloring register allocation removed from it.
142 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
144 /// getIntrinsicInfo - If intrinsic information is available, return it. If
145 /// not, return null.
147 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
149 /// getJITInfo - If this target supports a JIT, return information for it,
150 /// otherwise return null.
152 virtual TargetJITInfo *getJITInfo() { return 0; }
154 /// getInstrItineraryData - Returns instruction itinerary data for the target
155 /// or specific subtarget.
157 virtual const InstrItineraryData getInstrItineraryData() const {
158 return InstrItineraryData();
161 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
162 /// information for it, otherwise return null.
164 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
166 /// getELFWriterInfo - If this target supports an ELF writer, return
167 /// information for it, otherwise return null.
169 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
171 /// getRelocationModel - Returns the code generation relocation model. The
172 /// choices are static, PIC, and dynamic-no-pic, and target default.
173 static Reloc::Model getRelocationModel();
175 /// setRelocationModel - Sets the code generation relocation model.
177 static void setRelocationModel(Reloc::Model Model);
179 /// getCodeModel - Returns the code model. The choices are small, kernel,
180 /// medium, large, and target default.
181 static CodeModel::Model getCodeModel();
183 /// setCodeModel - Sets the code model.
185 static void setCodeModel(CodeModel::Model Model);
187 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
189 static bool getAsmVerbosityDefault();
191 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
193 static void setAsmVerbosityDefault(bool);
195 /// CodeGenFileType - These enums are meant to be passed into
196 /// addPassesToEmitFile to indicate what type of file to emit.
197 enum CodeGenFileType {
198 AssemblyFile, ObjectFile, DynamicLibrary
201 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
202 /// on this target. User flag overrides.
203 virtual bool getEnableTailMergeDefault() const { return true; }
205 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
206 /// specified file emitted. Typically this will involve several steps of code
208 /// This method should return FileModel::Error if emission of this file type
209 /// is not supported.
211 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
212 formatted_raw_ostream &,
215 return FileModel::None;
218 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
219 /// to be split up (e.g., to add an object writer pass), this method can be
220 /// used to finish up adding passes to emit the file, if necessary.
222 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
223 MachineCodeEmitter *,
228 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
229 /// to be split up (e.g., to add an object writer pass), this method can be
230 /// used to finish up adding passes to emit the file, if necessary.
232 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
238 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
239 /// to be split up (e.g., to add an object writer pass), this method can be
240 /// used to finish up adding passes to emit the file, if necessary.
242 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
248 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
249 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
250 /// actually outputting the machine code and resolving things like the address
251 /// of functions. This method returns true if machine code emission is
254 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
255 MachineCodeEmitter &,
260 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
261 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
262 /// actually outputting the machine code and resolving things like the address
263 /// of functions. This method returns true if machine code emission is
266 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
272 /// addPassesToEmitWholeFile - This method can be implemented by targets that
273 /// require having the entire module at once. This is not recommended, do not
275 virtual bool WantsWholeFile() const { return false; }
276 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
283 /// LLVMTargetMachine - This class describes a target machine that is
284 /// implemented with the LLVM target-independent code generator.
286 class LLVMTargetMachine : public TargetMachine {
287 protected: // Can only create subclasses.
288 LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
290 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
291 /// both emitting to assembly files or machine code output.
293 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
297 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
298 /// specified file emitted. Typically this will involve several steps of code
299 /// generation. If OptLevel is None, the code generator should emit code as fast
300 /// as possible, though the generated code may be less efficient. This method
301 /// should return FileModel::Error if emission of this file type is not
304 /// The default implementation of this method adds components from the
305 /// LLVM retargetable code generator, invoking the methods below to get
306 /// target-specific passes in standard locations.
308 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
309 formatted_raw_ostream &Out,
310 CodeGenFileType FileType,
313 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
314 /// to be split up (e.g., to add an object writer pass), this method can be
315 /// used to finish up adding passes to emit the file, if necessary.
317 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
318 MachineCodeEmitter *MCE,
321 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
322 /// to be split up (e.g., to add an object writer pass), this method can be
323 /// used to finish up adding passes to emit the file, if necessary.
325 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
329 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
330 /// to be split up (e.g., to add an object writer pass), this method can be
331 /// used to finish up adding passes to emit the file, if necessary.
333 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
334 ObjectCodeEmitter *OCE,
337 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
338 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
339 /// actually outputting the machine code and resolving things like the address
340 /// of functions. This method returns true if machine code emission is
343 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
344 MachineCodeEmitter &MCE,
347 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
348 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
349 /// actually outputting the machine code and resolving things like the address
350 /// of functions. This method returns true if machine code emission is
353 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
357 /// Target-Independent Code Generator Pass Configuration Options.
359 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
360 /// passes, then install an instruction selector pass, which converts from
361 /// LLVM code to machine instructions.
362 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
366 /// addPreRegAlloc - This method may be implemented by targets that want to
367 /// run passes immediately before register allocation. This should return
368 /// true if -print-machineinstrs should print after these passes.
369 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
373 /// addPostRegAlloc - This method may be implemented by targets that want
374 /// to run passes after register allocation but before prolog-epilog
375 /// insertion. This should return true if -print-machineinstrs should print
376 /// after these passes.
377 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
381 /// addPreSched2 - This method may be implemented by targets that want to
382 /// run passes after prolog-epilog insertion and before the second instruction
383 /// scheduling pass. This should return true if -print-machineinstrs should
384 /// print after these passes.
385 virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
389 /// addPreEmitPass - This pass may be implemented by targets that want to run
390 /// passes immediately before machine code is emitted. This should return
391 /// true if -print-machineinstrs should print out the code after the passes.
392 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
397 /// addCodeEmitter - This pass should be overridden by the target to add a
398 /// code emitter, if supported. If this is not supported, 'true' should be
400 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
401 MachineCodeEmitter &) {
405 /// addCodeEmitter - This pass should be overridden by the target to add a
406 /// code emitter, if supported. If this is not supported, 'true' should be
408 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
413 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
414 /// a code emitter (without setting flags), if supported. If this is not
415 /// supported, 'true' should be returned.
416 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
417 MachineCodeEmitter &) {
421 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
422 /// a code emitter (without setting flags), if supported. If this is not
423 /// supported, 'true' should be returned.
424 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
429 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
430 /// a code emitter (without setting flags), if supported. If this is not
431 /// supported, 'true' should be returned.
432 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
433 ObjectCodeEmitter &) {
437 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
438 /// on this target. User flag overrides.
439 virtual bool getEnableTailMergeDefault() const { return true; }
441 /// addAssemblyEmitter - Helper function which creates a target specific
442 /// assembly printer, if available.
444 /// \return Returns 'false' on success.
445 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
446 bool /* VerboseAsmDefault */,
447 formatted_raw_ostream &);
450 } // End llvm namespace