1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
26 class TargetSubtarget;
27 class TargetInstrInfo;
28 class TargetIntrinsicInfo;
31 class TargetFrameInfo;
32 class MachineCodeEmitter;
34 class ObjectCodeEmitter;
35 class TargetRegisterInfo;
36 class PassManagerBase;
39 class TargetMachOWriterInfo;
40 class TargetELFWriterInfo;
41 class formatted_raw_ostream;
43 // Relocation model types.
48 PIC_, // Cannot be named PIC due to collision with -DPIC
74 // Code generation optimization level.
75 namespace CodeGenOpt {
84 // Specify if we should encode the LSDA pointer in the FDE as 4- or 8-bytes.
85 namespace DwarfLSDAEncoding {
93 //===----------------------------------------------------------------------===//
95 /// TargetMachine - Primary interface to the complete machine description for
96 /// the target machine. All target-specific information should be accessible
97 /// through this interface.
100 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
101 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
102 protected: // Can only create subclasses.
103 TargetMachine(const Target &);
105 /// getSubtargetImpl - virtual method implemented by subclasses that returns
106 /// a reference to that target's TargetSubtarget-derived member variable.
107 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
109 /// TheTarget - The Target that this machine was created for.
110 const Target &TheTarget;
112 /// AsmInfo - Contains target specific asm information.
114 const MCAsmInfo *AsmInfo;
117 virtual ~TargetMachine();
119 const Target &getTarget() const { return TheTarget; }
121 // Interfaces to the major aspects of target machine information:
122 // -- Instruction opcode and operand information
123 // -- Pipelines and scheduling information
124 // -- Stack frame information
125 // -- Selection DAG lowering information
127 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
128 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
129 virtual TargetLowering *getTargetLowering() const { return 0; }
130 virtual const TargetData *getTargetData() const { return 0; }
132 /// getMCAsmInfo - Return target specific asm information.
134 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
136 /// getSubtarget - This method returns a pointer to the specified type of
137 /// TargetSubtarget. In debug builds, it verifies that the object being
138 /// returned is of the correct type.
139 template<typename STC> const STC &getSubtarget() const {
140 const TargetSubtarget *TST = getSubtargetImpl();
141 assert(TST && dynamic_cast<const STC*>(TST) &&
142 "Not the right kind of subtarget!");
143 return *static_cast<const STC*>(TST);
146 /// getRegisterInfo - If register information is available, return it. If
147 /// not, return null. This is kept separate from RegInfo until RegInfo has
148 /// details of graph coloring register allocation removed from it.
150 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
152 /// getIntrinsicInfo - If intrinsic information is available, return it. If
153 /// not, return null.
155 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
157 /// getJITInfo - If this target supports a JIT, return information for it,
158 /// otherwise return null.
160 virtual TargetJITInfo *getJITInfo() { return 0; }
162 /// getInstrItineraryData - Returns instruction itinerary data for the target
163 /// or specific subtarget.
165 virtual const InstrItineraryData getInstrItineraryData() const {
166 return InstrItineraryData();
169 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
170 /// information for it, otherwise return null.
172 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
174 /// getELFWriterInfo - If this target supports an ELF writer, return
175 /// information for it, otherwise return null.
177 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
179 /// getRelocationModel - Returns the code generation relocation model. The
180 /// choices are static, PIC, and dynamic-no-pic, and target default.
181 static Reloc::Model getRelocationModel();
183 /// setRelocationModel - Sets the code generation relocation model.
185 static void setRelocationModel(Reloc::Model Model);
187 /// getCodeModel - Returns the code model. The choices are small, kernel,
188 /// medium, large, and target default.
189 static CodeModel::Model getCodeModel();
191 /// setCodeModel - Sets the code model.
193 static void setCodeModel(CodeModel::Model Model);
195 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
197 static bool getAsmVerbosityDefault();
199 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
201 static void setAsmVerbosityDefault(bool);
203 /// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are
204 /// 4-byte, 8-byte, and target default.
205 virtual DwarfLSDAEncoding::Encoding getLSDAEncoding() const {
206 return DwarfLSDAEncoding::Default;
209 /// CodeGenFileType - These enums are meant to be passed into
210 /// addPassesToEmitFile to indicate what type of file to emit.
211 enum CodeGenFileType {
212 AssemblyFile, ObjectFile, DynamicLibrary
215 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
216 /// on this target. User flag overrides.
217 virtual bool getEnableTailMergeDefault() const { return true; }
219 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
220 /// specified file emitted. Typically this will involve several steps of code
222 /// This method should return FileModel::Error if emission of this file type
223 /// is not supported.
225 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
226 formatted_raw_ostream &,
229 return FileModel::None;
232 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
233 /// to be split up (e.g., to add an object writer pass), this method can be
234 /// used to finish up adding passes to emit the file, if necessary.
236 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
237 MachineCodeEmitter *,
242 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
243 /// to be split up (e.g., to add an object writer pass), this method can be
244 /// used to finish up adding passes to emit the file, if necessary.
246 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
252 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
253 /// to be split up (e.g., to add an object writer pass), this method can be
254 /// used to finish up adding passes to emit the file, if necessary.
256 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
262 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
263 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
264 /// actually outputting the machine code and resolving things like the address
265 /// of functions. This method returns true if machine code emission is
268 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
269 MachineCodeEmitter &,
274 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
275 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
276 /// actually outputting the machine code and resolving things like the address
277 /// of functions. This method returns true if machine code emission is
280 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
286 /// addPassesToEmitWholeFile - This method can be implemented by targets that
287 /// require having the entire module at once. This is not recommended, do not
289 virtual bool WantsWholeFile() const { return false; }
290 virtual bool addPassesToEmitWholeFile(PassManager &, formatted_raw_ostream &,
297 /// LLVMTargetMachine - This class describes a target machine that is
298 /// implemented with the LLVM target-independent code generator.
300 class LLVMTargetMachine : public TargetMachine {
301 protected: // Can only create subclasses.
302 LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
304 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
305 /// both emitting to assembly files or machine code output.
307 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
310 // These routines are used by addPassesToEmitFileFinish and
311 // addPassesToEmitMachineCode to set the CodeModel if it's still marked
313 virtual void setCodeModelForJIT();
314 virtual void setCodeModelForStatic();
318 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
319 /// specified file emitted. Typically this will involve several steps of code
320 /// generation. If OptLevel is None, the code generator should emit code as fast
321 /// as possible, though the generated code may be less efficient. This method
322 /// should return FileModel::Error if emission of this file type is not
325 /// The default implementation of this method adds components from the
326 /// LLVM retargetable code generator, invoking the methods below to get
327 /// target-specific passes in standard locations.
329 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
330 formatted_raw_ostream &Out,
331 CodeGenFileType FileType,
334 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
335 /// to be split up (e.g., to add an object writer pass), this method can be
336 /// used to finish up adding passes to emit the file, if necessary.
338 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
339 MachineCodeEmitter *MCE,
342 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
343 /// to be split up (e.g., to add an object writer pass), this method can be
344 /// used to finish up adding passes to emit the file, if necessary.
346 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
350 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
351 /// to be split up (e.g., to add an object writer pass), this method can be
352 /// used to finish up adding passes to emit the file, if necessary.
354 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
355 ObjectCodeEmitter *OCE,
358 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
359 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
360 /// actually outputting the machine code and resolving things like the address
361 /// of functions. This method returns true if machine code emission is
364 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
365 MachineCodeEmitter &MCE,
368 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
369 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
370 /// actually outputting the machine code and resolving things like the address
371 /// of functions. This method returns true if machine code emission is
374 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
378 /// Target-Independent Code Generator Pass Configuration Options.
380 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
381 /// passes, then install an instruction selector pass, which converts from
382 /// LLVM code to machine instructions.
383 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
387 /// addPreRegAlloc - This method may be implemented by targets that want to
388 /// run passes immediately before register allocation. This should return
389 /// true if -print-machineinstrs should print after these passes.
390 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
394 /// addPostRegAlloc - This method may be implemented by targets that want
395 /// to run passes after register allocation but before prolog-epilog
396 /// insertion. This should return true if -print-machineinstrs should print
397 /// after these passes.
398 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
402 /// addPreSched2 - This method may be implemented by targets that want to
403 /// run passes after prolog-epilog insertion and before the second instruction
404 /// scheduling pass. This should return true if -print-machineinstrs should
405 /// print after these passes.
406 virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
410 /// addPreEmitPass - This pass may be implemented by targets that want to run
411 /// passes immediately before machine code is emitted. This should return
412 /// true if -print-machineinstrs should print out the code after the passes.
413 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
418 /// addCodeEmitter - This pass should be overridden by the target to add a
419 /// code emitter, if supported. If this is not supported, 'true' should be
421 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
422 MachineCodeEmitter &) {
426 /// addCodeEmitter - This pass should be overridden by the target to add a
427 /// code emitter, if supported. If this is not supported, 'true' should be
429 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
434 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
435 /// a code emitter (without setting flags), if supported. If this is not
436 /// supported, 'true' should be returned.
437 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
438 MachineCodeEmitter &) {
442 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
443 /// a code emitter (without setting flags), if supported. If this is not
444 /// supported, 'true' should be returned.
445 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
450 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
451 /// a code emitter (without setting flags), if supported. If this is not
452 /// supported, 'true' should be returned.
453 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
454 ObjectCodeEmitter &) {
458 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
459 /// on this target. User flag overrides.
460 virtual bool getEnableTailMergeDefault() const { return true; }
462 /// addAssemblyEmitter - Helper function which creates a target specific
463 /// assembly printer, if available.
465 /// \return Returns 'false' on success.
466 bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
467 bool /* VerboseAsmDefault */,
468 formatted_raw_ostream &);
470 /// addObjectFileEmitter - Helper function which creates a target specific
471 /// object files emitter, if available. This interface is temporary, for
472 /// bringing up MCAssembler-based object file emitters.
474 /// \return Returns 'false' on success.
475 bool addObjectFileEmitter(PassManagerBase &, CodeGenOpt::Level,
476 formatted_raw_ostream &);
479 } // End llvm namespace