1 //===- TargetSelectionDAG.td - Common code for DAG isels ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the target-independent interfaces used by SelectionDAG
11 // instruction selection generators.
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
16 // Selection DAG Type Constraint definitions.
18 // Note that the semantics of these constraints are hard coded into tblgen. To
19 // modify or add constraints, you have to hack tblgen.
22 class SDTypeConstraint<int opnum> {
23 int OperandNum = opnum;
26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
31 class SDTCisPtrTy<int OpNum> : SDTypeConstraint<OpNum>;
33 // SDTCisInt - The specified operand is has integer type.
34 class SDTCisInt<int OpNum> : SDTypeConstraint<OpNum>;
36 // SDTCisFP - The specified operand is has floating point type.
37 class SDTCisFP<int OpNum> : SDTypeConstraint<OpNum>;
39 // SDTCisSameAs - The two specified operands have identical types.
40 class SDTCisSameAs<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
41 int OtherOperandNum = OtherOp;
44 // SDTCisVTSmallerThanOp - The specified operand is a VT SDNode, and its type is
45 // smaller than the 'Other' operand.
46 class SDTCisVTSmallerThanOp<int OpNum, int OtherOp> : SDTypeConstraint<OpNum> {
47 int OtherOperandNum = OtherOp;
50 class SDTCisOpSmallerThanOp<int SmallOp, int BigOp> : SDTypeConstraint<SmallOp>{
51 int BigOperandNum = BigOp;
54 /// SDTCisEltOfVec - This indicates that ThisOp is a scalar type of the same
55 /// type as the element type of OtherOp, which is a vector type.
56 class SDTCisEltOfVec<int ThisOp, int OtherOp>
57 : SDTypeConstraint<ThisOp> {
58 int OtherOpNum = OtherOp;
61 //===----------------------------------------------------------------------===//
62 // Selection DAG Type Profile definitions.
64 // These use the constraints defined above to describe the type requirements of
65 // the various nodes. These are not hard coded into tblgen, allowing targets to
66 // add their own if needed.
69 // SDTypeProfile - This profile describes the type requirements of a Selection
71 class SDTypeProfile<int numresults, int numoperands,
72 list<SDTypeConstraint> constraints> {
73 int NumResults = numresults;
74 int NumOperands = numoperands;
75 list<SDTypeConstraint> Constraints = constraints;
79 def SDTIntLeaf: SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
80 def SDTFPLeaf : SDTypeProfile<1, 0, [SDTCisFP<0>]>; // for 'fpimm'.
81 def SDTPtrLeaf: SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; // for '&g'.
82 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
83 def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
84 def SDTUnaryOp : SDTypeProfile<1, 1, []>; // for bitconvert.
86 def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
87 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
89 def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
90 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisInt<2>
92 def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
93 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
95 def SDTFPSignOp : SDTypeProfile<1, 2, [ // fcopysign.
96 SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisFP<2>
98 def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
99 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
101 def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
102 SDTCisSameAs<0, 1>, SDTCisInt<0>
104 def SDTIntExtendOp : SDTypeProfile<1, 1, [ // sext, zext, anyext
105 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<1, 0>
107 def SDTIntTruncOp : SDTypeProfile<1, 1, [ // trunc
108 SDTCisInt<0>, SDTCisInt<1>, SDTCisOpSmallerThanOp<0, 1>
110 def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc
111 SDTCisSameAs<0, 1>, SDTCisFP<0>
113 def SDTFPRoundOp : SDTypeProfile<1, 1, [ // fround
114 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>
116 def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
117 SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
119 def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
120 SDTCisFP<0>, SDTCisInt<1>
122 def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
123 SDTCisInt<0>, SDTCisFP<1>
125 def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
126 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
127 SDTCisVTSmallerThanOp<2, 1>
130 def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
131 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
134 def SDTSelect : SDTypeProfile<1, 3, [ // select
135 SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
138 def SDTSelectCC : SDTypeProfile<1, 5, [ // select_cc
139 SDTCisSameAs<1, 2>, SDTCisSameAs<3, 4>, SDTCisSameAs<0, 3>,
143 def SDTBr : SDTypeProfile<0, 1, [ // br
147 def SDTBrcond : SDTypeProfile<0, 2, [ // brcond
148 SDTCisInt<0>, SDTCisVT<1, OtherVT>
151 def SDTBrind : SDTypeProfile<0, 1, [ // brind
155 def SDTNone : SDTypeProfile<0, 0, []>; // ret, trap
157 def SDTLoad : SDTypeProfile<1, 1, [ // load
161 def SDTStore : SDTypeProfile<0, 2, [ // store
165 def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
166 SDTCisSameAs<0, 2>, SDTCisPtrTy<0>, SDTCisPtrTy<3>
169 def SDTVecShuffle : SDTypeProfile<1, 2, [
170 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>
172 def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
173 SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>
175 def SDTVecInsert : SDTypeProfile<1, 3, [ // vector insert
176 SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3>
179 def STDPrefetch : SDTypeProfile<0, 3, [ // prefetch
180 SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>
183 def STDMemBarrier : SDTypeProfile<0, 5, [ // memory barier
184 SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisSameAs<0,4>,
187 def STDAtomic3 : SDTypeProfile<1, 3, [
188 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisInt<0>, SDTCisPtrTy<1>
190 def STDAtomic2 : SDTypeProfile<1, 2, [
191 SDTCisSameAs<0,2>, SDTCisInt<0>, SDTCisPtrTy<1>
194 def SDTConvertOp : SDTypeProfile<1, 5, [ //cvtss, su, us, uu, ff, fs, fu, sf, su
195 SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>, SDTCisPtrTy<4>, SDTCisPtrTy<5>
198 class SDCallSeqStart<list<SDTypeConstraint> constraints> :
199 SDTypeProfile<0, 1, constraints>;
200 class SDCallSeqEnd<list<SDTypeConstraint> constraints> :
201 SDTypeProfile<0, 2, constraints>;
203 //===----------------------------------------------------------------------===//
204 // Selection DAG Node Properties.
206 // Note: These are hard coded into tblgen.
208 class SDNodeProperty;
209 def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
210 def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
211 def SDNPHasChain : SDNodeProperty; // R/W chain operand and result
212 def SDNPOutFlag : SDNodeProperty; // Write a flag result
213 def SDNPInFlag : SDNodeProperty; // Read a flag operand
214 def SDNPOptInFlag : SDNodeProperty; // Optionally read a flag operand
215 def SDNPMayStore : SDNodeProperty; // May write to memory, sets 'mayStore'.
216 def SDNPMayLoad : SDNodeProperty; // May read memory, sets 'mayLoad'.
217 def SDNPSideEffect : SDNodeProperty; // Sets 'HasUnmodelledSideEffects'.
218 def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
219 def SDNPInI1 : SDNodeProperty; // Read an extra I1 operand
220 def SDNPOutI1 : SDNodeProperty; // Write an extra I1 result
222 //===----------------------------------------------------------------------===//
223 // Selection DAG Node definitions.
225 class SDNode<string opcode, SDTypeProfile typeprof,
226 list<SDNodeProperty> props = [], string sdclass = "SDNode"> {
227 string Opcode = opcode;
228 string SDClass = sdclass;
229 list<SDNodeProperty> Properties = props;
230 SDTypeProfile TypeProfile = typeprof;
239 def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
240 def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
241 def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">;
242 def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
243 def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
244 def cond : SDNode<"ISD::CONDCODE" , SDTOther , [], "CondCodeSDNode">;
245 def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
246 def globaladdr : SDNode<"ISD::GlobalAddress", SDTPtrLeaf, [],
247 "GlobalAddressSDNode">;
248 def tglobaladdr : SDNode<"ISD::TargetGlobalAddress", SDTPtrLeaf, [],
249 "GlobalAddressSDNode">;
250 def globaltlsaddr : SDNode<"ISD::GlobalTLSAddress", SDTPtrLeaf, [],
251 "GlobalAddressSDNode">;
252 def tglobaltlsaddr : SDNode<"ISD::TargetGlobalTLSAddress", SDTPtrLeaf, [],
253 "GlobalAddressSDNode">;
254 def constpool : SDNode<"ISD::ConstantPool", SDTPtrLeaf, [],
255 "ConstantPoolSDNode">;
256 def tconstpool : SDNode<"ISD::TargetConstantPool", SDTPtrLeaf, [],
257 "ConstantPoolSDNode">;
258 def jumptable : SDNode<"ISD::JumpTable", SDTPtrLeaf, [],
260 def tjumptable : SDNode<"ISD::TargetJumpTable", SDTPtrLeaf, [],
262 def frameindex : SDNode<"ISD::FrameIndex", SDTPtrLeaf, [],
264 def tframeindex : SDNode<"ISD::TargetFrameIndex", SDTPtrLeaf, [],
266 def externalsym : SDNode<"ISD::ExternalSymbol", SDTPtrLeaf, [],
267 "ExternalSymbolSDNode">;
268 def texternalsym: SDNode<"ISD::TargetExternalSymbol", SDTPtrLeaf, [],
269 "ExternalSymbolSDNode">;
271 def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
272 [SDNPCommutative, SDNPAssociative]>;
273 def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;
274 def mul : SDNode<"ISD::MUL" , SDTIntBinOp,
275 [SDNPCommutative, SDNPAssociative]>;
276 def mulhs : SDNode<"ISD::MULHS" , SDTIntBinOp, [SDNPCommutative]>;
277 def mulhu : SDNode<"ISD::MULHU" , SDTIntBinOp, [SDNPCommutative]>;
278 def sdiv : SDNode<"ISD::SDIV" , SDTIntBinOp>;
279 def udiv : SDNode<"ISD::UDIV" , SDTIntBinOp>;
280 def srem : SDNode<"ISD::SREM" , SDTIntBinOp>;
281 def urem : SDNode<"ISD::UREM" , SDTIntBinOp>;
282 def srl : SDNode<"ISD::SRL" , SDTIntShiftOp>;
283 def sra : SDNode<"ISD::SRA" , SDTIntShiftOp>;
284 def shl : SDNode<"ISD::SHL" , SDTIntShiftOp>;
285 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
286 def rotr : SDNode<"ISD::ROTR" , SDTIntShiftOp>;
287 def and : SDNode<"ISD::AND" , SDTIntBinOp,
288 [SDNPCommutative, SDNPAssociative]>;
289 def or : SDNode<"ISD::OR" , SDTIntBinOp,
290 [SDNPCommutative, SDNPAssociative]>;
291 def xor : SDNode<"ISD::XOR" , SDTIntBinOp,
292 [SDNPCommutative, SDNPAssociative]>;
293 def addc : SDNode<"ISD::ADDC" , SDTIntBinOp,
294 [SDNPCommutative, SDNPOutI1]>;
295 def adde : SDNode<"ISD::ADDE" , SDTIntBinOp,
296 [SDNPCommutative, SDNPInI1, SDNPOutI1]>;
297 def subc : SDNode<"ISD::SUBC" , SDTIntBinOp,
299 def sube : SDNode<"ISD::SUBE" , SDTIntBinOp,
300 [SDNPInI1, SDNPOutI1]>;
302 def sext_inreg : SDNode<"ISD::SIGN_EXTEND_INREG", SDTExtInreg>;
303 def bswap : SDNode<"ISD::BSWAP" , SDTIntUnaryOp>;
304 def ctlz : SDNode<"ISD::CTLZ" , SDTIntUnaryOp>;
305 def cttz : SDNode<"ISD::CTTZ" , SDTIntUnaryOp>;
306 def ctpop : SDNode<"ISD::CTPOP" , SDTIntUnaryOp>;
307 def sext : SDNode<"ISD::SIGN_EXTEND", SDTIntExtendOp>;
308 def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>;
309 def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>;
310 def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>;
311 def bitconvert : SDNode<"ISD::BIT_CONVERT", SDTUnaryOp>;
312 def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>;
313 def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>;
316 def fadd : SDNode<"ISD::FADD" , SDTFPBinOp, [SDNPCommutative]>;
317 def fsub : SDNode<"ISD::FSUB" , SDTFPBinOp>;
318 def fmul : SDNode<"ISD::FMUL" , SDTFPBinOp, [SDNPCommutative]>;
319 def fdiv : SDNode<"ISD::FDIV" , SDTFPBinOp>;
320 def frem : SDNode<"ISD::FREM" , SDTFPBinOp>;
321 def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
322 def fneg : SDNode<"ISD::FNEG" , SDTFPUnaryOp>;
323 def fsqrt : SDNode<"ISD::FSQRT" , SDTFPUnaryOp>;
324 def fsin : SDNode<"ISD::FSIN" , SDTFPUnaryOp>;
325 def fcos : SDNode<"ISD::FCOS" , SDTFPUnaryOp>;
326 def frint : SDNode<"ISD::FRINT" , SDTFPUnaryOp>;
327 def ftrunc : SDNode<"ISD::FTRUNC" , SDTFPUnaryOp>;
328 def fceil : SDNode<"ISD::FCEIL" , SDTFPUnaryOp>;
329 def ffloor : SDNode<"ISD::FFLOOR" , SDTFPUnaryOp>;
330 def fnearbyint : SDNode<"ISD::FNEARBYINT" , SDTFPUnaryOp>;
332 def fround : SDNode<"ISD::FP_ROUND" , SDTFPRoundOp>;
333 def fextend : SDNode<"ISD::FP_EXTEND" , SDTFPExtendOp>;
334 def fcopysign : SDNode<"ISD::FCOPYSIGN" , SDTFPSignOp>;
336 def sint_to_fp : SDNode<"ISD::SINT_TO_FP" , SDTIntToFPOp>;
337 def uint_to_fp : SDNode<"ISD::UINT_TO_FP" , SDTIntToFPOp>;
338 def fp_to_sint : SDNode<"ISD::FP_TO_SINT" , SDTFPToIntOp>;
339 def fp_to_uint : SDNode<"ISD::FP_TO_UINT" , SDTFPToIntOp>;
341 def setcc : SDNode<"ISD::SETCC" , SDTSetCC>;
342 def select : SDNode<"ISD::SELECT" , SDTSelect>;
343 def selectcc : SDNode<"ISD::SELECT_CC" , SDTSelectCC>;
344 def vsetcc : SDNode<"ISD::VSETCC" , SDTSetCC>;
346 def brcond : SDNode<"ISD::BRCOND" , SDTBrcond, [SDNPHasChain]>;
347 def brind : SDNode<"ISD::BRIND" , SDTBrind, [SDNPHasChain]>;
348 def br : SDNode<"ISD::BR" , SDTBr, [SDNPHasChain]>;
349 def ret : SDNode<"ISD::RET" , SDTNone, [SDNPHasChain]>;
350 def trap : SDNode<"ISD::TRAP" , SDTNone,
351 [SDNPHasChain, SDNPSideEffect]>;
353 def prefetch : SDNode<"ISD::PREFETCH" , STDPrefetch,
354 [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
356 def membarrier : SDNode<"ISD::MEMBARRIER" , STDMemBarrier,
357 [SDNPHasChain, SDNPSideEffect]>;
359 def atomic_cmp_swap : SDNode<"ISD::ATOMIC_CMP_SWAP" , STDAtomic3,
360 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
361 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , STDAtomic2,
362 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
363 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", STDAtomic2,
364 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
365 def atomic_load_sub : SDNode<"ISD::ATOMIC_LOAD_SUB" , STDAtomic2,
366 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
367 def atomic_load_and : SDNode<"ISD::ATOMIC_LOAD_AND" , STDAtomic2,
368 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
369 def atomic_load_or : SDNode<"ISD::ATOMIC_LOAD_OR" , STDAtomic2,
370 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
371 def atomic_load_xor : SDNode<"ISD::ATOMIC_LOAD_XOR" , STDAtomic2,
372 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
373 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", STDAtomic2,
374 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
375 def atomic_load_min : SDNode<"ISD::ATOMIC_LOAD_MIN", STDAtomic2,
376 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
377 def atomic_load_max : SDNode<"ISD::ATOMIC_LOAD_MAX", STDAtomic2,
378 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
379 def atomic_load_umin : SDNode<"ISD::ATOMIC_LOAD_UMIN", STDAtomic2,
380 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
381 def atomic_load_umax : SDNode<"ISD::ATOMIC_LOAD_UMAX", STDAtomic2,
382 [SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>;
384 // Do not use ld, st directly. Use load, extload, sextload, zextload, store,
385 // and truncst (see below).
386 def ld : SDNode<"ISD::LOAD" , SDTLoad,
387 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
388 def st : SDNode<"ISD::STORE" , SDTStore,
389 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
390 def ist : SDNode<"ISD::STORE" , SDTIStore,
391 [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
393 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
394 def build_vector : SDNode<"ISD::BUILD_VECTOR", SDTypeProfile<1, -1, []>, []>;
395 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
397 def vector_extract : SDNode<"ISD::EXTRACT_VECTOR_ELT",
398 SDTypeProfile<1, 2, [SDTCisPtrTy<2>]>, []>;
399 def vector_insert : SDNode<"ISD::INSERT_VECTOR_ELT",
400 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
402 // Nodes for intrinsics, you should use the intrinsic itself and let tblgen use
403 // these internally. Don't reference these directly.
404 def intrinsic_void : SDNode<"ISD::INTRINSIC_VOID",
405 SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>,
407 def intrinsic_w_chain : SDNode<"ISD::INTRINSIC_W_CHAIN",
408 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>,
410 def intrinsic_wo_chain : SDNode<"ISD::INTRINSIC_WO_CHAIN",
411 SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>, []>;
413 // Do not use cvt directly. Use cvt forms below
414 def cvt : SDNode<"ISD::CONVERT_RNDSAT", SDTConvertOp>;
416 //===----------------------------------------------------------------------===//
417 // Selection DAG Condition Codes
419 class CondCode; // ISD::CondCode enums
420 def SETOEQ : CondCode; def SETOGT : CondCode;
421 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
422 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
423 def SETUEQ : CondCode; def SETUGT : CondCode; def SETUGE : CondCode;
424 def SETULT : CondCode; def SETULE : CondCode; def SETUNE : CondCode;
426 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
427 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode;
430 //===----------------------------------------------------------------------===//
431 // Selection DAG Node Transformation Functions.
433 // This mechanism allows targets to manipulate nodes in the output DAG once a
434 // match has been formed. This is typically used to manipulate immediate
437 class SDNodeXForm<SDNode opc, code xformFunction> {
439 code XFormFunction = xformFunction;
442 def NOOP_SDNodeXForm : SDNodeXForm<imm, [{}]>;
445 //===----------------------------------------------------------------------===//
446 // Selection DAG Pattern Fragments.
448 // Pattern fragments are reusable chunks of dags that match specific things.
449 // They can take arguments and have C++ predicates that control whether they
450 // match. They are intended to make the patterns for common instructions more
451 // compact and readable.
454 /// PatFrag - Represents a pattern fragment. This can match something on the
455 /// DAG, frame a single node to multiply nested other fragments.
457 class PatFrag<dag ops, dag frag, code pred = [{}],
458 SDNodeXForm xform = NOOP_SDNodeXForm> {
461 code Predicate = pred;
462 SDNodeXForm OperandTransform = xform;
465 // PatLeaf's are pattern fragments that have no operands. This is just a helper
466 // to define immediates and other common things concisely.
467 class PatLeaf<dag frag, code pred = [{}], SDNodeXForm xform = NOOP_SDNodeXForm>
468 : PatFrag<(ops), frag, pred, xform>;
472 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>;
473 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
475 def immAllOnes : PatLeaf<(imm), [{ return N->isAllOnesValue(); }]>;
476 def immAllOnesV: PatLeaf<(build_vector), [{
477 return ISD::isBuildVectorAllOnes(N);
479 def immAllOnesV_bc: PatLeaf<(bitconvert), [{
480 return ISD::isBuildVectorAllOnes(N);
482 def immAllZerosV: PatLeaf<(build_vector), [{
483 return ISD::isBuildVectorAllZeros(N);
485 def immAllZerosV_bc: PatLeaf<(bitconvert), [{
486 return ISD::isBuildVectorAllZeros(N);
491 // Other helper fragments.
492 def not : PatFrag<(ops node:$in), (xor node:$in, immAllOnes)>;
493 def vnot : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV)>;
494 def vnot_conv : PatFrag<(ops node:$in), (xor node:$in, immAllOnesV_bc)>;
495 def ineg : PatFrag<(ops node:$in), (sub 0, node:$in)>;
498 def unindexedload : PatFrag<(ops node:$ptr), (ld node:$ptr), [{
499 return cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
501 def load : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
502 return cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
505 // extending load fragments.
506 def extload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
507 return cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
509 def sextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
510 return cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
512 def zextload : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{
513 return cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
516 def extloadi1 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
517 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
519 def extloadi8 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
520 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
522 def extloadi16 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
523 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
525 def extloadi32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
526 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
528 def extloadf32 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
529 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f32;
531 def extloadf64 : PatFrag<(ops node:$ptr), (extload node:$ptr), [{
532 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::f64;
535 def sextloadi1 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
536 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
538 def sextloadi8 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
539 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
541 def sextloadi16 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
542 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
544 def sextloadi32 : PatFrag<(ops node:$ptr), (sextload node:$ptr), [{
545 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
548 def zextloadi1 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
549 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i1;
551 def zextloadi8 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
552 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
554 def zextloadi16 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
555 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i16;
557 def zextloadi32 : PatFrag<(ops node:$ptr), (zextload node:$ptr), [{
558 return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
562 def unindexedstore : PatFrag<(ops node:$val, node:$ptr),
563 (st node:$val, node:$ptr), [{
564 return cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
566 def store : PatFrag<(ops node:$val, node:$ptr),
567 (unindexedstore node:$val, node:$ptr), [{
568 return !cast<StoreSDNode>(N)->isTruncatingStore();
571 // truncstore fragments.
572 def truncstore : PatFrag<(ops node:$val, node:$ptr),
573 (unindexedstore node:$val, node:$ptr), [{
574 return cast<StoreSDNode>(N)->isTruncatingStore();
576 def truncstorei8 : PatFrag<(ops node:$val, node:$ptr),
577 (truncstore node:$val, node:$ptr), [{
578 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
580 def truncstorei16 : PatFrag<(ops node:$val, node:$ptr),
581 (truncstore node:$val, node:$ptr), [{
582 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
584 def truncstorei32 : PatFrag<(ops node:$val, node:$ptr),
585 (truncstore node:$val, node:$ptr), [{
586 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
588 def truncstoref32 : PatFrag<(ops node:$val, node:$ptr),
589 (truncstore node:$val, node:$ptr), [{
590 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
592 def truncstoref64 : PatFrag<(ops node:$val, node:$ptr),
593 (truncstore node:$val, node:$ptr), [{
594 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f64;
597 // indexed store fragments.
598 def istore : PatFrag<(ops node:$val, node:$base, node:$offset),
599 (ist node:$val, node:$base, node:$offset), [{
600 return !cast<StoreSDNode>(N)->isTruncatingStore();
603 def pre_store : PatFrag<(ops node:$val, node:$base, node:$offset),
604 (istore node:$val, node:$base, node:$offset), [{
605 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
606 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
609 def itruncstore : PatFrag<(ops node:$val, node:$base, node:$offset),
610 (ist node:$val, node:$base, node:$offset), [{
611 return cast<StoreSDNode>(N)->isTruncatingStore();
613 def pre_truncst : PatFrag<(ops node:$val, node:$base, node:$offset),
614 (itruncstore node:$val, node:$base, node:$offset), [{
615 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
616 return AM == ISD::PRE_INC || AM == ISD::PRE_DEC;
618 def pre_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset),
619 (pre_truncst node:$val, node:$base, node:$offset), [{
620 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1;
622 def pre_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset),
623 (pre_truncst node:$val, node:$base, node:$offset), [{
624 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
626 def pre_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset),
627 (pre_truncst node:$val, node:$base, node:$offset), [{
628 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
630 def pre_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset),
631 (pre_truncst node:$val, node:$base, node:$offset), [{
632 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
634 def pre_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset),
635 (pre_truncst node:$val, node:$base, node:$offset), [{
636 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
639 def post_store : PatFrag<(ops node:$val, node:$ptr, node:$offset),
640 (istore node:$val, node:$ptr, node:$offset), [{
641 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
642 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
645 def post_truncst : PatFrag<(ops node:$val, node:$base, node:$offset),
646 (itruncstore node:$val, node:$base, node:$offset), [{
647 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
648 return AM == ISD::POST_INC || AM == ISD::POST_DEC;
650 def post_truncsti1 : PatFrag<(ops node:$val, node:$base, node:$offset),
651 (post_truncst node:$val, node:$base, node:$offset), [{
652 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i1;
654 def post_truncsti8 : PatFrag<(ops node:$val, node:$base, node:$offset),
655 (post_truncst node:$val, node:$base, node:$offset), [{
656 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i8;
658 def post_truncsti16 : PatFrag<(ops node:$val, node:$base, node:$offset),
659 (post_truncst node:$val, node:$base, node:$offset), [{
660 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i16;
662 def post_truncsti32 : PatFrag<(ops node:$val, node:$base, node:$offset),
663 (post_truncst node:$val, node:$base, node:$offset), [{
664 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::i32;
666 def post_truncstf32 : PatFrag<(ops node:$val, node:$base, node:$offset),
667 (post_truncst node:$val, node:$base, node:$offset), [{
668 return cast<StoreSDNode>(N)->getMemoryVT() == MVT::f32;
671 // setcc convenience fragments.
672 def setoeq : PatFrag<(ops node:$lhs, node:$rhs),
673 (setcc node:$lhs, node:$rhs, SETOEQ)>;
674 def setogt : PatFrag<(ops node:$lhs, node:$rhs),
675 (setcc node:$lhs, node:$rhs, SETOGT)>;
676 def setoge : PatFrag<(ops node:$lhs, node:$rhs),
677 (setcc node:$lhs, node:$rhs, SETOGE)>;
678 def setolt : PatFrag<(ops node:$lhs, node:$rhs),
679 (setcc node:$lhs, node:$rhs, SETOLT)>;
680 def setole : PatFrag<(ops node:$lhs, node:$rhs),
681 (setcc node:$lhs, node:$rhs, SETOLE)>;
682 def setone : PatFrag<(ops node:$lhs, node:$rhs),
683 (setcc node:$lhs, node:$rhs, SETONE)>;
684 def seto : PatFrag<(ops node:$lhs, node:$rhs),
685 (setcc node:$lhs, node:$rhs, SETO)>;
686 def setuo : PatFrag<(ops node:$lhs, node:$rhs),
687 (setcc node:$lhs, node:$rhs, SETUO)>;
688 def setueq : PatFrag<(ops node:$lhs, node:$rhs),
689 (setcc node:$lhs, node:$rhs, SETUEQ)>;
690 def setugt : PatFrag<(ops node:$lhs, node:$rhs),
691 (setcc node:$lhs, node:$rhs, SETUGT)>;
692 def setuge : PatFrag<(ops node:$lhs, node:$rhs),
693 (setcc node:$lhs, node:$rhs, SETUGE)>;
694 def setult : PatFrag<(ops node:$lhs, node:$rhs),
695 (setcc node:$lhs, node:$rhs, SETULT)>;
696 def setule : PatFrag<(ops node:$lhs, node:$rhs),
697 (setcc node:$lhs, node:$rhs, SETULE)>;
698 def setune : PatFrag<(ops node:$lhs, node:$rhs),
699 (setcc node:$lhs, node:$rhs, SETUNE)>;
700 def seteq : PatFrag<(ops node:$lhs, node:$rhs),
701 (setcc node:$lhs, node:$rhs, SETEQ)>;
702 def setgt : PatFrag<(ops node:$lhs, node:$rhs),
703 (setcc node:$lhs, node:$rhs, SETGT)>;
704 def setge : PatFrag<(ops node:$lhs, node:$rhs),
705 (setcc node:$lhs, node:$rhs, SETGE)>;
706 def setlt : PatFrag<(ops node:$lhs, node:$rhs),
707 (setcc node:$lhs, node:$rhs, SETLT)>;
708 def setle : PatFrag<(ops node:$lhs, node:$rhs),
709 (setcc node:$lhs, node:$rhs, SETLE)>;
710 def setne : PatFrag<(ops node:$lhs, node:$rhs),
711 (setcc node:$lhs, node:$rhs, SETNE)>;
713 def atomic_cmp_swap_8 :
714 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
715 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
716 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
718 def atomic_cmp_swap_16 :
719 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
720 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
721 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
723 def atomic_cmp_swap_32 :
724 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
725 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
726 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
728 def atomic_cmp_swap_64 :
729 PatFrag<(ops node:$ptr, node:$cmp, node:$swap),
730 (atomic_cmp_swap node:$ptr, node:$cmp, node:$swap), [{
731 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
734 multiclass binary_atomic_op<SDNode atomic_op> {
735 def _8 : PatFrag<(ops node:$ptr, node:$val),
736 (atomic_op node:$ptr, node:$val), [{
737 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i8;
739 def _16 : PatFrag<(ops node:$ptr, node:$val),
740 (atomic_op node:$ptr, node:$val), [{
741 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i16;
743 def _32 : PatFrag<(ops node:$ptr, node:$val),
744 (atomic_op node:$ptr, node:$val), [{
745 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i32;
747 def _64 : PatFrag<(ops node:$ptr, node:$val),
748 (atomic_op node:$ptr, node:$val), [{
749 return cast<AtomicSDNode>(N)->getMemoryVT() == MVT::i64;
753 defm atomic_load_add : binary_atomic_op<atomic_load_add>;
754 defm atomic_swap : binary_atomic_op<atomic_swap>;
755 defm atomic_load_sub : binary_atomic_op<atomic_load_sub>;
756 defm atomic_load_and : binary_atomic_op<atomic_load_and>;
757 defm atomic_load_or : binary_atomic_op<atomic_load_or>;
758 defm atomic_load_xor : binary_atomic_op<atomic_load_xor>;
759 defm atomic_load_nand : binary_atomic_op<atomic_load_nand>;
760 defm atomic_load_min : binary_atomic_op<atomic_load_min>;
761 defm atomic_load_max : binary_atomic_op<atomic_load_max>;
762 defm atomic_load_umin : binary_atomic_op<atomic_load_umin>;
763 defm atomic_load_umax : binary_atomic_op<atomic_load_umax>;
765 //===----------------------------------------------------------------------===//
766 // Selection DAG CONVERT_RNDSAT patterns
768 def cvtff : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
769 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
770 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FF;
773 def cvtss : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
774 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
775 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SS;
778 def cvtsu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
779 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
780 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SU;
783 def cvtus : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
784 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
785 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_US;
788 def cvtuu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
789 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
790 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_UU;
793 def cvtsf : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
794 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
795 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_SF;
798 def cvtuf : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
799 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
800 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_UF;
803 def cvtfs : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
804 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
805 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FS;
808 def cvtfu : PatFrag<(ops node:$val, node:$dty, node:$sty, node:$rd, node:$sat),
809 (cvt node:$val, node:$dty, node:$sty, node:$rd, node:$sat), [{
810 return cast<CvtRndSatSDNode>(N)->getCvtCode() == ISD::CVT_FU;
813 //===----------------------------------------------------------------------===//
814 // Selection DAG Pattern Support.
816 // Patterns are what are actually matched against the target-flavored
817 // instruction selection DAG. Instructions defined by the target implicitly
818 // define patterns in most cases, but patterns can also be explicitly added when
819 // an operation is defined by a sequence of instructions (e.g. loading a large
820 // immediate value on RISC targets that do not support immediates as large as
824 class Pattern<dag patternToMatch, list<dag> resultInstrs> {
825 dag PatternToMatch = patternToMatch;
826 list<dag> ResultInstrs = resultInstrs;
827 list<Predicate> Predicates = []; // See class Instruction in Target.td.
828 int AddedComplexity = 0; // See class Instruction in Target.td.
831 // Pat - A simple (but common) form of a pattern, which produces a simple result
832 // not needing a full list.
833 class Pat<dag pattern, dag result> : Pattern<pattern, [result]>;
835 //===----------------------------------------------------------------------===//
836 // Complex pattern definitions.
840 // Pass the parent Operand as root to CP function rather
841 // than the root of the sub-DAG
842 def CPAttrParentAsRoot : CPAttribute;
844 // Complex patterns, e.g. X86 addressing mode, requires pattern matching code
845 // in C++. NumOperands is the number of operands returned by the select function;
846 // SelectFunc is the name of the function used to pattern match the max. pattern;
847 // RootNodes are the list of possible root nodes of the sub-dags to match.
848 // e.g. X86 addressing mode - def addr : ComplexPattern<4, "SelectAddr", [add]>;
850 class ComplexPattern<ValueType ty, int numops, string fn,
851 list<SDNode> roots = [], list<SDNodeProperty> props = [],
852 list<CPAttribute> attrs = []> {
854 int NumOperands = numops;
855 string SelectFunc = fn;
856 list<SDNode> RootNodes = roots;
857 list<SDNodeProperty> Properties = props;
858 list<CPAttribute> Attributes = attrs;
861 //===----------------------------------------------------------------------===//
864 def SDT_dwarf_loc : SDTypeProfile<0, 3,
865 [SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2>]>;
866 def dwarf_loc : SDNode<"ISD::DEBUG_LOC", SDT_dwarf_loc,[SDNPHasChain]>;