1 //==-- llvm/Target/TargetSubtarget.h - Target Information --------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the subtarget options of a Target machine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETSUBTARGET_H
15 #define LLVM_TARGET_TARGETSUBTARGET_H
17 #include "llvm/Target/TargetMachine.h"
23 class TargetRegisterClass;
24 template <typename T> class SmallVectorImpl;
26 //===----------------------------------------------------------------------===//
28 /// TargetSubtarget - Generic base class for all target subtargets. All
29 /// Target-specific options that control code generation and printing should
30 /// be exposed through a TargetSubtarget-derived class.
32 class TargetSubtarget {
33 TargetSubtarget(const TargetSubtarget&); // DO NOT IMPLEMENT
34 void operator=(const TargetSubtarget&); // DO NOT IMPLEMENT
35 protected: // Can only create subclasses...
38 // AntiDepBreakMode - Type of anti-dependence breaking that should
39 // be performed before post-RA scheduling.
40 typedef enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL } AntiDepBreakMode;
41 typedef SmallVectorImpl<TargetRegisterClass*> RegClassVector;
43 virtual ~TargetSubtarget();
45 /// getSpecialAddressLatency - For targets where it is beneficial to
46 /// backschedule instructions that compute addresses, return a value
47 /// indicating the number of scheduling cycles of backscheduling that
48 /// should be attempted.
49 virtual unsigned getSpecialAddressLatency() const { return 0; }
51 // enablePostRAScheduler - If the target can benefit from post-regalloc
52 // scheduling and the specified optimization level meets the requirement
53 // return true to enable post-register-allocation scheduling. In
54 // CriticalPathRCs return any register classes that should only be broken
55 // if on the critical path.
56 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
57 AntiDepBreakMode& Mode,
58 RegClassVector& CriticalPathRCs) const;
59 // adjustSchedDependency - Perform target specific adjustments to
60 // the latency of a schedule dependency.
61 virtual void adjustSchedDependency(SUnit *def, SUnit *use,
65 } // End llvm namespace