include/uapi/linux/nvme.h

   1 /*
   2  * Definitions for the NVM Express interface
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #ifndef _UAPI_LINUX_NVME_H
  16 #define _UAPI_LINUX_NVME_H
  17
  18 #include <linux/types.h>
  19
  20 struct nvme_id_power_state {
  21         __le16                  max_power;      /* centiwatts */
  22         __u8                    rsvd2;
  23         __u8                    flags;
  24         __le32                  entry_lat;      /* microseconds */
  25         __le32                  exit_lat;       /* microseconds */
  26         __u8                    read_tput;
  27         __u8                    read_lat;
  28         __u8                    write_tput;
  29         __u8                    write_lat;
  30         __le16                  idle_power;
  31         __u8                    idle_scale;
  32         __u8                    rsvd19;
  33         __le16                  active_power;
  34         __u8                    active_work_scale;
  35         __u8                    rsvd23[9];
  36 };
  37
  38 enum {
  39         NVME_PS_FLAGS_MAX_POWER_SCALE   = 1 << 0,
  40         NVME_PS_FLAGS_NON_OP_STATE      = 1 << 1,
  41 };
  42
  43 struct nvme_id_ctrl {
  44         __le16                  vid;
  45         __le16                  ssvid;
  46         char                    sn[20];
  47         char                    mn[40];
  48         char                    fr[8];
  49         __u8                    rab;
  50         __u8                    ieee[3];
  51         __u8                    mic;
  52         __u8                    mdts;
  53         __u16                   cntlid;
  54         __u32                   ver;
  55         __u8                    rsvd84[172];
  56         __le16                  oacs;
  57         __u8                    acl;
  58         __u8                    aerl;
  59         __u8                    frmw;
  60         __u8                    lpa;
  61         __u8                    elpe;
  62         __u8                    npss;
  63         __u8                    avscc;
  64         __u8                    apsta;
  65         __le16                  wctemp;
  66         __le16                  cctemp;
  67         __u8                    rsvd270[242];
  68         __u8                    sqes;
  69         __u8                    cqes;
  70         __u8                    rsvd514[2];
  71         __le32                  nn;
  72         __le16                  oncs;
  73         __le16                  fuses;
  74         __u8                    fna;
  75         __u8                    vwc;
  76         __le16                  awun;
  77         __le16                  awupf;
  78         __u8                    nvscc;
  79         __u8                    rsvd531;
  80         __le16                  acwu;
  81         __u8                    rsvd534[2];
  82         __le32                  sgls;
  83         __u8                    rsvd540[1508];
  84         struct nvme_id_power_state      psd[32];
  85         __u8                    vs[1024];
  86 };
  87
  88 enum {
  89         NVME_CTRL_ONCS_COMPARE                  = 1 << 0,
  90         NVME_CTRL_ONCS_WRITE_UNCORRECTABLE      = 1 << 1,
  91         NVME_CTRL_ONCS_DSM                      = 1 << 2,
  92         NVME_CTRL_VWC_PRESENT                   = 1 << 0,
  93 };
  94
  95 struct nvme_lbaf {
  96         __le16                  ms;
  97         __u8                    ds;
  98         __u8                    rp;
  99 };
 100
 101 struct nvme_id_ns {
 102         __le64                  nsze;
 103         __le64                  ncap;
 104         __le64                  nuse;
 105         __u8                    nsfeat;
 106         __u8                    nlbaf;
 107         __u8                    flbas;
 108         __u8                    mc;
 109         __u8                    dpc;
 110         __u8                    dps;
 111         __u8                    nmic;
 112         __u8                    rescap;
 113         __u8                    fpi;
 114         __u8                    rsvd33;
 115         __le16                  nawun;
 116         __le16                  nawupf;
 117         __le16                  nacwu;
 118         __u8                    rsvd40[80];
 119         __u8                    eui64[8];
 120         struct nvme_lbaf        lbaf[16];
 121         __u8                    rsvd192[192];
 122         __u8                    vs[3712];
 123 };
 124
 125 enum {
 126         NVME_NS_FEAT_THIN       = 1 << 0,
 127         NVME_LBAF_RP_BEST       = 0,
 128         NVME_LBAF_RP_BETTER     = 1,
 129         NVME_LBAF_RP_GOOD       = 2,
 130         NVME_LBAF_RP_DEGRADED   = 3,
 131 };
 132
 133 struct nvme_smart_log {
 134         __u8                    critical_warning;
 135         __u8                    temperature[2];
 136         __u8                    avail_spare;
 137         __u8                    spare_thresh;
 138         __u8                    percent_used;
 139         __u8                    rsvd6[26];
 140         __u8                    data_units_read[16];
 141         __u8                    data_units_written[16];
 142         __u8                    host_reads[16];
 143         __u8                    host_writes[16];
 144         __u8                    ctrl_busy_time[16];
 145         __u8                    power_cycles[16];
 146         __u8                    power_on_hours[16];
 147         __u8                    unsafe_shutdowns[16];
 148         __u8                    media_errors[16];
 149         __u8                    num_err_log_entries[16];
 150         __le32                  warning_temp_time;
 151         __le32                  critical_comp_time;
 152         __le16                  temp_sensor[8];
 153         __u8                    rsvd216[296];
 154 };
 155
 156 enum {
 157         NVME_SMART_CRIT_SPARE           = 1 << 0,
 158         NVME_SMART_CRIT_TEMPERATURE     = 1 << 1,
 159         NVME_SMART_CRIT_RELIABILITY     = 1 << 2,
 160         NVME_SMART_CRIT_MEDIA           = 1 << 3,
 161         NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
 162 };
 163
 164 struct nvme_lba_range_type {
 165         __u8                    type;
 166         __u8                    attributes;
 167         __u8                    rsvd2[14];
 168         __u64                   slba;
 169         __u64                   nlb;
 170         __u8                    guid[16];
 171         __u8                    rsvd48[16];
 172 };
 173
 174 enum {
 175         NVME_LBART_TYPE_FS      = 0x01,
 176         NVME_LBART_TYPE_RAID    = 0x02,
 177         NVME_LBART_TYPE_CACHE   = 0x03,
 178         NVME_LBART_TYPE_SWAP    = 0x04,
 179
 180         NVME_LBART_ATTRIB_TEMP  = 1 << 0,
 181         NVME_LBART_ATTRIB_HIDE  = 1 << 1,
 182 };
 183
 184 struct nvme_reservation_status {
 185         __le32  gen;
 186         __u8    rtype;
 187         __u8    regctl[2];
 188         __u8    resv5[2];
 189         __u8    ptpls;
 190         __u8    resv10[13];
 191         struct {
 192                 __le16  cntlid;
 193                 __u8    rcsts;
 194                 __u8    resv3[5];
 195                 __le64  hostid;
 196                 __le64  rkey;
 197         } regctl_ds[];
 198 };
 199
 200 /* I/O commands */
 201
 202 enum nvme_opcode {
 203         nvme_cmd_flush          = 0x00,
 204         nvme_cmd_write          = 0x01,
 205         nvme_cmd_read           = 0x02,
 206         nvme_cmd_write_uncor    = 0x04,
 207         nvme_cmd_compare        = 0x05,
 208         nvme_cmd_write_zeroes   = 0x08,
 209         nvme_cmd_dsm            = 0x09,
 210         nvme_cmd_resv_register  = 0x0d,
 211         nvme_cmd_resv_report    = 0x0e,
 212         nvme_cmd_resv_acquire   = 0x11,
 213         nvme_cmd_resv_release   = 0x15,
 214 };
 215
 216 struct nvme_common_command {
 217         __u8                    opcode;
 218         __u8                    flags;
 219         __u16                   command_id;
 220         __le32                  nsid;
 221         __le32                  cdw2[2];
 222         __le64                  metadata;
 223         __le64                  prp1;
 224         __le64                  prp2;
 225         __le32                  cdw10[6];
 226 };
 227
 228 struct nvme_rw_command {
 229         __u8                    opcode;
 230         __u8                    flags;
 231         __u16                   command_id;
 232         __le32                  nsid;
 233         __u64                   rsvd2;
 234         __le64                  metadata;
 235         __le64                  prp1;
 236         __le64                  prp2;
 237         __le64                  slba;
 238         __le16                  length;
 239         __le16                  control;
 240         __le32                  dsmgmt;
 241         __le32                  reftag;
 242         __le16                  apptag;
 243         __le16                  appmask;
 244 };
 245
 246 enum {
 247         NVME_RW_LR                      = 1 << 15,
 248         NVME_RW_FUA                     = 1 << 14,
 249         NVME_RW_DSM_FREQ_UNSPEC         = 0,
 250         NVME_RW_DSM_FREQ_TYPICAL        = 1,
 251         NVME_RW_DSM_FREQ_RARE           = 2,
 252         NVME_RW_DSM_FREQ_READS          = 3,
 253         NVME_RW_DSM_FREQ_WRITES         = 4,
 254         NVME_RW_DSM_FREQ_RW             = 5,
 255         NVME_RW_DSM_FREQ_ONCE           = 6,
 256         NVME_RW_DSM_FREQ_PREFETCH       = 7,
 257         NVME_RW_DSM_FREQ_TEMP           = 8,
 258         NVME_RW_DSM_LATENCY_NONE        = 0 << 4,
 259         NVME_RW_DSM_LATENCY_IDLE        = 1 << 4,
 260         NVME_RW_DSM_LATENCY_NORM        = 2 << 4,
 261         NVME_RW_DSM_LATENCY_LOW         = 3 << 4,
 262         NVME_RW_DSM_SEQ_REQ             = 1 << 6,
 263         NVME_RW_DSM_COMPRESSED          = 1 << 7,
 264 };
 265
 266 struct nvme_dsm_cmd {
 267         __u8                    opcode;
 268         __u8                    flags;
 269         __u16                   command_id;
 270         __le32                  nsid;
 271         __u64                   rsvd2[2];
 272         __le64                  prp1;
 273         __le64                  prp2;
 274         __le32                  nr;
 275         __le32                  attributes;
 276         __u32                   rsvd12[4];
 277 };
 278
 279 enum {
 280         NVME_DSMGMT_IDR         = 1 << 0,
 281         NVME_DSMGMT_IDW         = 1 << 1,
 282         NVME_DSMGMT_AD          = 1 << 2,
 283 };
 284
 285 struct nvme_dsm_range {
 286         __le32                  cattr;
 287         __le32                  nlb;
 288         __le64                  slba;
 289 };
 290
 291 /* Admin commands */
 292
 293 enum nvme_admin_opcode {
 294         nvme_admin_delete_sq            = 0x00,
 295         nvme_admin_create_sq            = 0x01,
 296         nvme_admin_get_log_page         = 0x02,
 297         nvme_admin_delete_cq            = 0x04,
 298         nvme_admin_create_cq            = 0x05,
 299         nvme_admin_identify             = 0x06,
 300         nvme_admin_abort_cmd            = 0x08,
 301         nvme_admin_set_features         = 0x09,
 302         nvme_admin_get_features         = 0x0a,
 303         nvme_admin_async_event          = 0x0c,
 304         nvme_admin_activate_fw          = 0x10,
 305         nvme_admin_download_fw          = 0x11,
 306         nvme_admin_format_nvm           = 0x80,
 307         nvme_admin_security_send        = 0x81,
 308         nvme_admin_security_recv        = 0x82,
 309 };
 310
 311 enum {
 312         NVME_QUEUE_PHYS_CONTIG  = (1 << 0),
 313         NVME_CQ_IRQ_ENABLED     = (1 << 1),
 314         NVME_SQ_PRIO_URGENT     = (0 << 1),
 315         NVME_SQ_PRIO_HIGH       = (1 << 1),
 316         NVME_SQ_PRIO_MEDIUM     = (2 << 1),
 317         NVME_SQ_PRIO_LOW        = (3 << 1),
 318         NVME_FEAT_ARBITRATION   = 0x01,
 319         NVME_FEAT_POWER_MGMT    = 0x02,
 320         NVME_FEAT_LBA_RANGE     = 0x03,
 321         NVME_FEAT_TEMP_THRESH   = 0x04,
 322         NVME_FEAT_ERR_RECOVERY  = 0x05,
 323         NVME_FEAT_VOLATILE_WC   = 0x06,
 324         NVME_FEAT_NUM_QUEUES    = 0x07,
 325         NVME_FEAT_IRQ_COALESCE  = 0x08,
 326         NVME_FEAT_IRQ_CONFIG    = 0x09,
 327         NVME_FEAT_WRITE_ATOMIC  = 0x0a,
 328         NVME_FEAT_ASYNC_EVENT   = 0x0b,
 329         NVME_FEAT_AUTO_PST      = 0x0c,
 330         NVME_FEAT_SW_PROGRESS   = 0x80,
 331         NVME_FEAT_HOST_ID       = 0x81,
 332         NVME_FEAT_RESV_MASK     = 0x82,
 333         NVME_FEAT_RESV_PERSIST  = 0x83,
 334         NVME_LOG_ERROR          = 0x01,
 335         NVME_LOG_SMART          = 0x02,
 336         NVME_LOG_FW_SLOT        = 0x03,
 337         NVME_LOG_RESERVATION    = 0x80,
 338         NVME_FWACT_REPL         = (0 << 3),
 339         NVME_FWACT_REPL_ACTV    = (1 << 3),
 340         NVME_FWACT_ACTV         = (2 << 3),
 341 };
 342
 343 struct nvme_identify {
 344         __u8                    opcode;
 345         __u8                    flags;
 346         __u16                   command_id;
 347         __le32                  nsid;
 348         __u64                   rsvd2[2];
 349         __le64                  prp1;
 350         __le64                  prp2;
 351         __le32                  cns;
 352         __u32                   rsvd11[5];
 353 };
 354
 355 struct nvme_features {
 356         __u8                    opcode;
 357         __u8                    flags;
 358         __u16                   command_id;
 359         __le32                  nsid;
 360         __u64                   rsvd2[2];
 361         __le64                  prp1;
 362         __le64                  prp2;
 363         __le32                  fid;
 364         __le32                  dword11;
 365         __u32                   rsvd12[4];
 366 };
 367
 368 struct nvme_create_cq {
 369         __u8                    opcode;
 370         __u8                    flags;
 371         __u16                   command_id;
 372         __u32                   rsvd1[5];
 373         __le64                  prp1;
 374         __u64                   rsvd8;
 375         __le16                  cqid;
 376         __le16                  qsize;
 377         __le16                  cq_flags;
 378         __le16                  irq_vector;
 379         __u32                   rsvd12[4];
 380 };
 381
 382 struct nvme_create_sq {
 383         __u8                    opcode;
 384         __u8                    flags;
 385         __u16                   command_id;
 386         __u32                   rsvd1[5];
 387         __le64                  prp1;
 388         __u64                   rsvd8;
 389         __le16                  sqid;
 390         __le16                  qsize;
 391         __le16                  sq_flags;
 392         __le16                  cqid;
 393         __u32                   rsvd12[4];
 394 };
 395
 396 struct nvme_delete_queue {
 397         __u8                    opcode;
 398         __u8                    flags;
 399         __u16                   command_id;
 400         __u32                   rsvd1[9];
 401         __le16                  qid;
 402         __u16                   rsvd10;
 403         __u32                   rsvd11[5];
 404 };
 405
 406 struct nvme_abort_cmd {
 407         __u8                    opcode;
 408         __u8                    flags;
 409         __u16                   command_id;
 410         __u32                   rsvd1[9];
 411         __le16                  sqid;
 412         __u16                   cid;
 413         __u32                   rsvd11[5];
 414 };
 415
 416 struct nvme_download_firmware {
 417         __u8                    opcode;
 418         __u8                    flags;
 419         __u16                   command_id;
 420         __u32                   rsvd1[5];
 421         __le64                  prp1;
 422         __le64                  prp2;
 423         __le32                  numd;
 424         __le32                  offset;
 425         __u32                   rsvd12[4];
 426 };
 427
 428 struct nvme_format_cmd {
 429         __u8                    opcode;
 430         __u8                    flags;
 431         __u16                   command_id;
 432         __le32                  nsid;
 433         __u64                   rsvd2[4];
 434         __le32                  cdw10;
 435         __u32                   rsvd11[5];
 436 };
 437
 438 struct nvme_command {
 439         union {
 440                 struct nvme_common_command common;
 441                 struct nvme_rw_command rw;
 442                 struct nvme_identify identify;
 443                 struct nvme_features features;
 444                 struct nvme_create_cq create_cq;
 445                 struct nvme_create_sq create_sq;
 446                 struct nvme_delete_queue delete_queue;
 447                 struct nvme_download_firmware dlfw;
 448                 struct nvme_format_cmd format;
 449                 struct nvme_dsm_cmd dsm;
 450                 struct nvme_abort_cmd abort;
 451         };
 452 };
 453
 454 enum {
 455         NVME_SC_SUCCESS                 = 0x0,
 456         NVME_SC_INVALID_OPCODE          = 0x1,
 457         NVME_SC_INVALID_FIELD           = 0x2,
 458         NVME_SC_CMDID_CONFLICT          = 0x3,
 459         NVME_SC_DATA_XFER_ERROR         = 0x4,
 460         NVME_SC_POWER_LOSS              = 0x5,
 461         NVME_SC_INTERNAL                = 0x6,
 462         NVME_SC_ABORT_REQ               = 0x7,
 463         NVME_SC_ABORT_QUEUE             = 0x8,
 464         NVME_SC_FUSED_FAIL              = 0x9,
 465         NVME_SC_FUSED_MISSING           = 0xa,
 466         NVME_SC_INVALID_NS              = 0xb,
 467         NVME_SC_CMD_SEQ_ERROR           = 0xc,
 468         NVME_SC_SGL_INVALID_LAST        = 0xd,
 469         NVME_SC_SGL_INVALID_COUNT       = 0xe,
 470         NVME_SC_SGL_INVALID_DATA        = 0xf,
 471         NVME_SC_SGL_INVALID_METADATA    = 0x10,
 472         NVME_SC_SGL_INVALID_TYPE        = 0x11,
 473         NVME_SC_LBA_RANGE               = 0x80,
 474         NVME_SC_CAP_EXCEEDED            = 0x81,
 475         NVME_SC_NS_NOT_READY            = 0x82,
 476         NVME_SC_RESERVATION_CONFLICT    = 0x83,
 477         NVME_SC_CQ_INVALID              = 0x100,
 478         NVME_SC_QID_INVALID             = 0x101,
 479         NVME_SC_QUEUE_SIZE              = 0x102,
 480         NVME_SC_ABORT_LIMIT             = 0x103,
 481         NVME_SC_ABORT_MISSING           = 0x104,
 482         NVME_SC_ASYNC_LIMIT             = 0x105,
 483         NVME_SC_FIRMWARE_SLOT           = 0x106,
 484         NVME_SC_FIRMWARE_IMAGE          = 0x107,
 485         NVME_SC_INVALID_VECTOR          = 0x108,
 486         NVME_SC_INVALID_LOG_PAGE        = 0x109,
 487         NVME_SC_INVALID_FORMAT          = 0x10a,
 488         NVME_SC_FIRMWARE_NEEDS_RESET    = 0x10b,
 489         NVME_SC_INVALID_QUEUE           = 0x10c,
 490         NVME_SC_FEATURE_NOT_SAVEABLE    = 0x10d,
 491         NVME_SC_FEATURE_NOT_CHANGEABLE  = 0x10e,
 492         NVME_SC_FEATURE_NOT_PER_NS      = 0x10f,
 493         NVME_SC_FW_NEEDS_RESET_SUBSYS   = 0x110,
 494         NVME_SC_BAD_ATTRIBUTES          = 0x180,
 495         NVME_SC_INVALID_PI              = 0x181,
 496         NVME_SC_READ_ONLY               = 0x182,
 497         NVME_SC_WRITE_FAULT             = 0x280,
 498         NVME_SC_READ_ERROR              = 0x281,
 499         NVME_SC_GUARD_CHECK             = 0x282,
 500         NVME_SC_APPTAG_CHECK            = 0x283,
 501         NVME_SC_REFTAG_CHECK            = 0x284,
 502         NVME_SC_COMPARE_FAILED          = 0x285,
 503         NVME_SC_ACCESS_DENIED           = 0x286,
 504         NVME_SC_DNR                     = 0x4000,
 505 };
 506
 507 struct nvme_completion {
 508         __le32  result;         /* Used by admin commands to return data */
 509         __u32   rsvd;
 510         __le16  sq_head;        /* how much of this queue may be reclaimed */
 511         __le16  sq_id;          /* submission queue that generated this entry */
 512         __u16   command_id;     /* of the command which completed */
 513         __le16  status;         /* did the command fail, and if so, why? */
 514 };
 515
 516 struct nvme_user_io {
 517         __u8    opcode;
 518         __u8    flags;
 519         __u16   control;
 520         __u16   nblocks;
 521         __u16   rsvd;
 522         __u64   metadata;
 523         __u64   addr;
 524         __u64   slba;
 525         __u32   dsmgmt;
 526         __u32   reftag;
 527         __u16   apptag;
 528         __u16   appmask;
 529 };
 530
 531 struct nvme_passthru_cmd {
 532         __u8    opcode;
 533         __u8    flags;
 534         __u16   rsvd1;
 535         __u32   nsid;
 536         __u32   cdw2;
 537         __u32   cdw3;
 538         __u64   metadata;
 539         __u64   addr;
 540         __u32   metadata_len;
 541         __u32   data_len;
 542         __u32   cdw10;
 543         __u32   cdw11;
 544         __u32   cdw12;
 545         __u32   cdw13;
 546         __u32   cdw14;
 547         __u32   cdw15;
 548         __u32   timeout_ms;
 549         __u32   result;
 550 };
 551
 552 #define nvme_admin_cmd nvme_passthru_cmd
 553
 554 #define NVME_IOCTL_ID           _IO('N', 0x40)
 555 #define NVME_IOCTL_ADMIN_CMD    _IOWR('N', 0x41, struct nvme_admin_cmd)
 556 #define NVME_IOCTL_SUBMIT_IO    _IOW('N', 0x42, struct nvme_user_io)
 557 #define NVME_IOCTL_IO_CMD       _IOWR('N', 0x43, struct nvme_passthru_cmd)
 558
 559 #endif /* _UAPI_LINUX_NVME_H */