2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
25 #define DISPC_IRQ_FRAMEDONE (1 << 0)
26 #define DISPC_IRQ_VSYNC (1 << 1)
27 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
28 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
29 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
30 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
31 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
32 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
33 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
34 #define DISPC_IRQ_OCP_ERR (1 << 9)
35 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
36 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
37 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
38 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
39 #define DISPC_IRQ_SYNC_LOST (1 << 14)
40 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
41 #define DISPC_IRQ_WAKEUP (1 << 16)
42 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
43 #define DISPC_IRQ_VSYNC2 (1 << 18)
44 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
45 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
47 struct omap_dss_device;
48 struct omap_overlay_manager;
50 enum omap_display_type {
51 OMAP_DISPLAY_TYPE_NONE = 0,
52 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
53 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
54 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
55 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
56 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
57 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
67 OMAP_DSS_CHANNEL_LCD = 0,
68 OMAP_DSS_CHANNEL_DIGIT = 1,
69 OMAP_DSS_CHANNEL_LCD2 = 2,
72 enum omap_color_mode {
73 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
74 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
75 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
76 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
77 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
78 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
79 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
80 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
81 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
82 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
83 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
84 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
85 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
86 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
87 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
88 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
89 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
90 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
91 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
94 enum omap_lcd_display_type {
95 OMAP_DSS_LCD_DISPLAY_STN,
96 OMAP_DSS_LCD_DISPLAY_TFT,
99 enum omap_dss_load_mode {
100 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
101 OMAP_DSS_LOAD_CLUT_ONLY = 1,
102 OMAP_DSS_LOAD_FRAME_ONLY = 2,
103 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
106 enum omap_dss_trans_key_type {
107 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
108 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
111 enum omap_rfbi_te_mode {
112 OMAP_DSS_RFBI_TE_MODE_1 = 1,
113 OMAP_DSS_RFBI_TE_MODE_2 = 2,
116 enum omap_panel_config {
117 OMAP_DSS_LCD_IVS = 1<<0,
118 OMAP_DSS_LCD_IHS = 1<<1,
119 OMAP_DSS_LCD_IPC = 1<<2,
120 OMAP_DSS_LCD_IEO = 1<<3,
121 OMAP_DSS_LCD_RF = 1<<4,
122 OMAP_DSS_LCD_ONOFF = 1<<5,
124 OMAP_DSS_LCD_TFT = 1<<20,
127 enum omap_dss_venc_type {
128 OMAP_DSS_VENC_TYPE_COMPOSITE,
129 OMAP_DSS_VENC_TYPE_SVIDEO,
132 enum omap_dss_dsi_mode {
133 OMAP_DSS_DSI_CMD_MODE = 0,
134 OMAP_DSS_DSI_VIDEO_MODE,
137 enum omap_display_caps {
138 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
139 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
142 enum omap_dss_display_state {
143 OMAP_DSS_DISPLAY_DISABLED = 0,
144 OMAP_DSS_DISPLAY_ACTIVE,
145 OMAP_DSS_DISPLAY_SUSPENDED,
148 /* XXX perhaps this should be removed */
149 enum omap_dss_overlay_managers {
150 OMAP_DSS_OVL_MGR_LCD,
152 OMAP_DSS_OVL_MGR_LCD2,
155 enum omap_dss_rotation_type {
156 OMAP_DSS_ROT_DMA = 0,
157 OMAP_DSS_ROT_VRFB = 1,
160 /* clockwise rotation angle */
161 enum omap_dss_rotation_angle {
164 OMAP_DSS_ROT_180 = 2,
165 OMAP_DSS_ROT_270 = 3,
168 enum omap_overlay_caps {
169 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
170 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
171 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
174 enum omap_overlay_manager_caps {
175 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
178 enum omap_dss_clk_source {
179 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
181 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
182 * OMAP4: PLL1_CLK1 */
183 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
184 * OMAP4: PLL1_CLK2 */
185 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
186 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
191 struct rfbi_timings {
205 u32 tim[5]; /* set by rfbi_convert_timings() */
210 void omap_rfbi_write_command(const void *buf, u32 len);
211 void omap_rfbi_read_data(void *buf, u32 len);
212 void omap_rfbi_write_data(const void *buf, u32 len);
213 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
216 int omap_rfbi_enable_te(bool enable, unsigned line);
217 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
218 unsigned hs_pulse_time, unsigned vs_pulse_time,
219 int hs_pol_inv, int vs_pol_inv, int extif_div);
220 void rfbi_bus_lock(void);
221 void rfbi_bus_unlock(void);
224 void dsi_bus_lock(struct omap_dss_device *dssdev);
225 void dsi_bus_unlock(struct omap_dss_device *dssdev);
226 int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
228 int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
230 int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
231 int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
232 int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
234 int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
236 int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
237 u8 param1, u8 param2);
238 int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
240 int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
242 int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
243 u8 *buf, int buflen);
244 int dsi_vc_dcs_read_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
246 int dsi_vc_dcs_read_2(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
247 u8 *data1, u8 *data2);
248 int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
250 int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
251 int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
253 /* Board specific data */
254 struct omap_dss_board_info {
255 int (*get_context_loss_count)(struct device *dev);
257 struct omap_dss_device **devices;
258 struct omap_dss_device *default_device;
259 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
260 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
263 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
264 /* Init with the board info */
265 extern int omap_display_init(struct omap_dss_board_info *board_data);
267 static inline int omap_display_init(struct omap_dss_board_info *board_data)
273 struct omap_display_platform_data {
274 struct omap_dss_board_info *board_data;
275 /* TODO: Additional members to be added when PM is considered */
278 struct omap_video_timings {
285 /* Unit: pixel clocks */
286 u16 hsw; /* Horizontal synchronization pulse width */
287 /* Unit: pixel clocks */
288 u16 hfp; /* Horizontal front porch */
289 /* Unit: pixel clocks */
290 u16 hbp; /* Horizontal back porch */
291 /* Unit: line clocks */
292 u16 vsw; /* Vertical synchronization pulse width */
293 /* Unit: line clocks */
294 u16 vfp; /* Vertical front porch */
295 /* Unit: line clocks */
296 u16 vbp; /* Vertical back porch */
299 #ifdef CONFIG_OMAP2_DSS_VENC
300 /* Hardcoded timings for tv modes. Venc only uses these to
301 * identify the mode, and does not actually use the configs
302 * itself. However, the configs should be something that
303 * a normal monitor can also show */
304 extern const struct omap_video_timings omap_dss_pal_timings;
305 extern const struct omap_video_timings omap_dss_ntsc_timings;
308 struct omap_dss_cpr_coefs {
314 struct omap_overlay_info {
319 u32 p_uv_addr; /* for NV12 format */
323 enum omap_color_mode color_mode;
325 enum omap_dss_rotation_type rotation_type;
330 u16 out_width; /* if 0, out_width == width */
331 u16 out_height; /* if 0, out_height == height */
336 struct omap_overlay {
338 struct list_head list;
343 enum omap_color_mode supported_modes;
344 enum omap_overlay_caps caps;
347 struct omap_overlay_manager *manager;
348 struct omap_overlay_info info;
350 bool manager_changed;
351 /* if true, info has been changed, but not applied() yet */
354 int (*set_manager)(struct omap_overlay *ovl,
355 struct omap_overlay_manager *mgr);
356 int (*unset_manager)(struct omap_overlay *ovl);
358 int (*set_overlay_info)(struct omap_overlay *ovl,
359 struct omap_overlay_info *info);
360 void (*get_overlay_info)(struct omap_overlay *ovl,
361 struct omap_overlay_info *info);
363 int (*wait_for_go)(struct omap_overlay *ovl);
366 struct omap_overlay_manager_info {
369 enum omap_dss_trans_key_type trans_key_type;
376 struct omap_dss_cpr_coefs cpr_coefs;
379 struct omap_overlay_manager {
381 struct list_head list;
385 enum omap_channel id;
386 enum omap_overlay_manager_caps caps;
388 struct omap_overlay **overlays;
389 enum omap_display_type supported_displays;
392 struct omap_dss_device *device;
393 struct omap_overlay_manager_info info;
396 /* if true, info has been changed but not applied() yet */
399 int (*set_device)(struct omap_overlay_manager *mgr,
400 struct omap_dss_device *dssdev);
401 int (*unset_device)(struct omap_overlay_manager *mgr);
403 int (*set_manager_info)(struct omap_overlay_manager *mgr,
404 struct omap_overlay_manager_info *info);
405 void (*get_manager_info)(struct omap_overlay_manager *mgr,
406 struct omap_overlay_manager_info *info);
408 int (*apply)(struct omap_overlay_manager *mgr);
409 int (*wait_for_go)(struct omap_overlay_manager *mgr);
410 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
412 int (*enable)(struct omap_overlay_manager *mgr);
413 int (*disable)(struct omap_overlay_manager *mgr);
416 struct omap_dss_device {
419 enum omap_display_type type;
421 enum omap_channel channel;
456 enum omap_dss_venc_type type;
457 bool invert_polarity;
466 enum omap_dss_clk_source lcd_clk_src;
469 enum omap_dss_clk_source dispc_fclk_src;
479 enum omap_dss_clk_source dsi_fclk_src;
489 struct omap_video_timings timings;
491 int acbi; /* ac-bias pin transitions per interrupt */
492 /* Unit: line clocks */
493 int acb; /* ac-bias pin frequency */
495 enum omap_panel_config config;
497 enum omap_dss_dsi_mode dsi_mode;
502 struct rfbi_timings rfbi_timings;
507 int max_backlight_level;
511 /* used to match device to driver */
512 const char *driver_name;
516 struct omap_dss_driver *driver;
518 /* helper variable for driver suspend/resume */
519 bool activate_after_resume;
521 enum omap_display_caps caps;
523 struct omap_overlay_manager *manager;
525 enum omap_dss_display_state state;
527 /* platform specific */
528 int (*platform_enable)(struct omap_dss_device *dssdev);
529 void (*platform_disable)(struct omap_dss_device *dssdev);
530 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
531 int (*get_backlight)(struct omap_dss_device *dssdev);
534 struct omap_dss_driver {
535 struct device_driver driver;
537 int (*probe)(struct omap_dss_device *);
538 void (*remove)(struct omap_dss_device *);
540 int (*enable)(struct omap_dss_device *display);
541 void (*disable)(struct omap_dss_device *display);
542 int (*suspend)(struct omap_dss_device *display);
543 int (*resume)(struct omap_dss_device *display);
544 int (*run_test)(struct omap_dss_device *display, int test);
546 int (*update)(struct omap_dss_device *dssdev,
547 u16 x, u16 y, u16 w, u16 h);
548 int (*sync)(struct omap_dss_device *dssdev);
550 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
551 int (*get_te)(struct omap_dss_device *dssdev);
553 u8 (*get_rotate)(struct omap_dss_device *dssdev);
554 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
556 bool (*get_mirror)(struct omap_dss_device *dssdev);
557 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
559 int (*memory_read)(struct omap_dss_device *dssdev,
560 void *buf, size_t size,
561 u16 x, u16 y, u16 w, u16 h);
563 void (*get_resolution)(struct omap_dss_device *dssdev,
564 u16 *xres, u16 *yres);
565 void (*get_dimensions)(struct omap_dss_device *dssdev,
566 u32 *width, u32 *height);
567 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
569 int (*check_timings)(struct omap_dss_device *dssdev,
570 struct omap_video_timings *timings);
571 void (*set_timings)(struct omap_dss_device *dssdev,
572 struct omap_video_timings *timings);
573 void (*get_timings)(struct omap_dss_device *dssdev,
574 struct omap_video_timings *timings);
576 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
577 u32 (*get_wss)(struct omap_dss_device *dssdev);
580 int omap_dss_register_driver(struct omap_dss_driver *);
581 void omap_dss_unregister_driver(struct omap_dss_driver *);
583 void omap_dss_get_device(struct omap_dss_device *dssdev);
584 void omap_dss_put_device(struct omap_dss_device *dssdev);
585 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
586 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
587 struct omap_dss_device *omap_dss_find_device(void *data,
588 int (*match)(struct omap_dss_device *dssdev, void *data));
590 int omap_dss_start_device(struct omap_dss_device *dssdev);
591 void omap_dss_stop_device(struct omap_dss_device *dssdev);
593 int omap_dss_get_num_overlay_managers(void);
594 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
596 int omap_dss_get_num_overlays(void);
597 struct omap_overlay *omap_dss_get_overlay(int num);
599 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
600 u16 *xres, u16 *yres);
601 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
603 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
604 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
605 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
607 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
608 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
609 unsigned long timeout);
611 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
612 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
614 void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
616 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
618 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
619 u16 *x, u16 *y, u16 *w, u16 *h,
620 bool enlarge_update_area);
621 int omap_dsi_update(struct omap_dss_device *dssdev,
623 u16 x, u16 y, u16 w, u16 h,
624 void (*callback)(int, void *), void *data);
625 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
626 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
627 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
629 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
630 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
631 bool disconnect_lanes, bool enter_ulps);
633 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
634 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
635 void dpi_set_timings(struct omap_dss_device *dssdev,
636 struct omap_video_timings *timings);
637 int dpi_check_timings(struct omap_dss_device *dssdev,
638 struct omap_video_timings *timings);
640 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
641 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
643 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
644 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
645 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
646 u16 *x, u16 *y, u16 *w, u16 *h);
647 int omap_rfbi_update(struct omap_dss_device *dssdev,
648 u16 x, u16 y, u16 w, u16 h,
649 void (*callback)(void *), void *data);
650 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,