2 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __OMAP_OMAPDSS_H
19 #define __OMAP_OMAPDSS_H
21 #include <linux/list.h>
22 #include <linux/kobject.h>
23 #include <linux/device.h>
24 #include <linux/platform_device.h>
25 #include <asm/atomic.h>
27 #define DISPC_IRQ_FRAMEDONE (1 << 0)
28 #define DISPC_IRQ_VSYNC (1 << 1)
29 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
30 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
31 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
32 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
33 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
34 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
35 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
36 #define DISPC_IRQ_OCP_ERR (1 << 9)
37 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
38 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
39 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
40 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
41 #define DISPC_IRQ_SYNC_LOST (1 << 14)
42 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
43 #define DISPC_IRQ_WAKEUP (1 << 16)
44 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
45 #define DISPC_IRQ_VSYNC2 (1 << 18)
46 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
47 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
49 struct omap_dss_device;
50 struct omap_overlay_manager;
52 enum omap_display_type {
53 OMAP_DISPLAY_TYPE_NONE = 0,
54 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
55 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
56 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
57 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
58 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
59 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
69 OMAP_DSS_CHANNEL_LCD = 0,
70 OMAP_DSS_CHANNEL_DIGIT = 1,
71 OMAP_DSS_CHANNEL_LCD2 = 2,
74 enum omap_color_mode {
75 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
76 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
77 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
78 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
79 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
80 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
81 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
82 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
83 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
84 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
85 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
86 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
87 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
88 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
91 enum omap_lcd_display_type {
92 OMAP_DSS_LCD_DISPLAY_STN,
93 OMAP_DSS_LCD_DISPLAY_TFT,
96 enum omap_dss_load_mode {
97 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
98 OMAP_DSS_LOAD_CLUT_ONLY = 1,
99 OMAP_DSS_LOAD_FRAME_ONLY = 2,
100 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
103 enum omap_dss_trans_key_type {
104 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
105 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
108 enum omap_rfbi_te_mode {
109 OMAP_DSS_RFBI_TE_MODE_1 = 1,
110 OMAP_DSS_RFBI_TE_MODE_2 = 2,
113 enum omap_panel_config {
114 OMAP_DSS_LCD_IVS = 1<<0,
115 OMAP_DSS_LCD_IHS = 1<<1,
116 OMAP_DSS_LCD_IPC = 1<<2,
117 OMAP_DSS_LCD_IEO = 1<<3,
118 OMAP_DSS_LCD_RF = 1<<4,
119 OMAP_DSS_LCD_ONOFF = 1<<5,
121 OMAP_DSS_LCD_TFT = 1<<20,
124 enum omap_dss_venc_type {
125 OMAP_DSS_VENC_TYPE_COMPOSITE,
126 OMAP_DSS_VENC_TYPE_SVIDEO,
129 enum omap_display_caps {
130 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
131 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
134 enum omap_dss_update_mode {
135 OMAP_DSS_UPDATE_DISABLED = 0,
136 OMAP_DSS_UPDATE_AUTO,
137 OMAP_DSS_UPDATE_MANUAL,
140 enum omap_dss_display_state {
141 OMAP_DSS_DISPLAY_DISABLED = 0,
142 OMAP_DSS_DISPLAY_ACTIVE,
143 OMAP_DSS_DISPLAY_SUSPENDED,
146 /* XXX perhaps this should be removed */
147 enum omap_dss_overlay_managers {
148 OMAP_DSS_OVL_MGR_LCD,
150 OMAP_DSS_OVL_MGR_LCD2,
153 enum omap_dss_rotation_type {
154 OMAP_DSS_ROT_DMA = 0,
155 OMAP_DSS_ROT_VRFB = 1,
158 /* clockwise rotation angle */
159 enum omap_dss_rotation_angle {
162 OMAP_DSS_ROT_180 = 2,
163 OMAP_DSS_ROT_270 = 3,
166 enum omap_overlay_caps {
167 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
168 OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
171 enum omap_overlay_manager_caps {
172 OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
175 enum omap_dss_clk_source {
176 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
178 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
179 * OMAP4: PLL1_CLK1 */
180 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
181 * OMAP4: PLL1_CLK2 */
186 struct rfbi_timings {
200 u32 tim[5]; /* set by rfbi_convert_timings() */
205 void omap_rfbi_write_command(const void *buf, u32 len);
206 void omap_rfbi_read_data(void *buf, u32 len);
207 void omap_rfbi_write_data(const void *buf, u32 len);
208 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
211 int omap_rfbi_enable_te(bool enable, unsigned line);
212 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
213 unsigned hs_pulse_time, unsigned vs_pulse_time,
214 int hs_pol_inv, int vs_pol_inv, int extif_div);
217 void dsi_bus_lock(void);
218 void dsi_bus_unlock(void);
219 int dsi_vc_dcs_write(int channel, u8 *data, int len);
220 int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
221 int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
222 int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
223 int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
224 int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
225 int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
226 int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
227 int dsi_vc_send_null(int channel);
228 int dsi_vc_send_bta_sync(int channel);
230 /* Board specific data */
231 struct omap_dss_board_info {
232 int (*get_last_off_on_transaction_id)(struct device *dev);
234 struct omap_dss_device **devices;
235 struct omap_dss_device *default_device;
238 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
239 /* Init with the board info */
240 extern int omap_display_init(struct omap_dss_board_info *board_data);
242 static inline int omap_display_init(struct omap_dss_board_info *board_data)
248 struct omap_display_platform_data {
249 struct omap_dss_board_info *board_data;
250 /* TODO: Additional members to be added when PM is considered */
252 bool (*opt_clock_available)(const char *clk_role);
255 struct omap_video_timings {
262 /* Unit: pixel clocks */
263 u16 hsw; /* Horizontal synchronization pulse width */
264 /* Unit: pixel clocks */
265 u16 hfp; /* Horizontal front porch */
266 /* Unit: pixel clocks */
267 u16 hbp; /* Horizontal back porch */
268 /* Unit: line clocks */
269 u16 vsw; /* Vertical synchronization pulse width */
270 /* Unit: line clocks */
271 u16 vfp; /* Vertical front porch */
272 /* Unit: line clocks */
273 u16 vbp; /* Vertical back porch */
276 #ifdef CONFIG_OMAP2_DSS_VENC
277 /* Hardcoded timings for tv modes. Venc only uses these to
278 * identify the mode, and does not actually use the configs
279 * itself. However, the configs should be something that
280 * a normal monitor can also show */
281 extern const struct omap_video_timings omap_dss_pal_timings;
282 extern const struct omap_video_timings omap_dss_ntsc_timings;
285 struct omap_overlay_info {
293 enum omap_color_mode color_mode;
295 enum omap_dss_rotation_type rotation_type;
300 u16 out_width; /* if 0, out_width == width */
301 u16 out_height; /* if 0, out_height == height */
306 struct omap_overlay {
308 struct list_head list;
313 enum omap_color_mode supported_modes;
314 enum omap_overlay_caps caps;
317 struct omap_overlay_manager *manager;
318 struct omap_overlay_info info;
320 /* if true, info has been changed, but not applied() yet */
323 int (*set_manager)(struct omap_overlay *ovl,
324 struct omap_overlay_manager *mgr);
325 int (*unset_manager)(struct omap_overlay *ovl);
327 int (*set_overlay_info)(struct omap_overlay *ovl,
328 struct omap_overlay_info *info);
329 void (*get_overlay_info)(struct omap_overlay *ovl,
330 struct omap_overlay_info *info);
332 int (*wait_for_go)(struct omap_overlay *ovl);
335 struct omap_overlay_manager_info {
338 enum omap_dss_trans_key_type trans_key_type;
345 struct omap_overlay_manager {
347 struct list_head list;
352 enum omap_overlay_manager_caps caps;
354 struct omap_overlay **overlays;
355 enum omap_display_type supported_displays;
358 struct omap_dss_device *device;
359 struct omap_overlay_manager_info info;
362 /* if true, info has been changed but not applied() yet */
365 int (*set_device)(struct omap_overlay_manager *mgr,
366 struct omap_dss_device *dssdev);
367 int (*unset_device)(struct omap_overlay_manager *mgr);
369 int (*set_manager_info)(struct omap_overlay_manager *mgr,
370 struct omap_overlay_manager_info *info);
371 void (*get_manager_info)(struct omap_overlay_manager *mgr,
372 struct omap_overlay_manager_info *info);
374 int (*apply)(struct omap_overlay_manager *mgr);
375 int (*wait_for_go)(struct omap_overlay_manager *mgr);
376 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
378 int (*enable)(struct omap_overlay_manager *mgr);
379 int (*disable)(struct omap_overlay_manager *mgr);
382 struct omap_dss_device {
385 enum omap_display_type type;
387 enum omap_channel channel;
416 enum omap_dss_venc_type type;
417 bool invert_polarity;
426 enum omap_dss_clk_source lcd_clk_src;
429 enum omap_dss_clk_source dispc_fclk_src;
439 enum omap_dss_clk_source dsi_fclk_src;
449 struct omap_video_timings timings;
451 int acbi; /* ac-bias pin transitions per interrupt */
452 /* Unit: line clocks */
453 int acb; /* ac-bias pin frequency */
455 enum omap_panel_config config;
460 struct rfbi_timings rfbi_timings;
465 int max_backlight_level;
469 /* used to match device to driver */
470 const char *driver_name;
474 struct omap_dss_driver *driver;
476 /* helper variable for driver suspend/resume */
477 bool activate_after_resume;
479 enum omap_display_caps caps;
481 struct omap_overlay_manager *manager;
483 enum omap_dss_display_state state;
485 /* platform specific */
486 int (*platform_enable)(struct omap_dss_device *dssdev);
487 void (*platform_disable)(struct omap_dss_device *dssdev);
488 int (*set_backlight)(struct omap_dss_device *dssdev, int level);
489 int (*get_backlight)(struct omap_dss_device *dssdev);
492 struct omap_dss_driver {
493 struct device_driver driver;
495 int (*probe)(struct omap_dss_device *);
496 void (*remove)(struct omap_dss_device *);
498 int (*enable)(struct omap_dss_device *display);
499 void (*disable)(struct omap_dss_device *display);
500 int (*suspend)(struct omap_dss_device *display);
501 int (*resume)(struct omap_dss_device *display);
502 int (*run_test)(struct omap_dss_device *display, int test);
504 int (*set_update_mode)(struct omap_dss_device *dssdev,
505 enum omap_dss_update_mode);
506 enum omap_dss_update_mode (*get_update_mode)(
507 struct omap_dss_device *dssdev);
509 int (*update)(struct omap_dss_device *dssdev,
510 u16 x, u16 y, u16 w, u16 h);
511 int (*sync)(struct omap_dss_device *dssdev);
513 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
514 int (*get_te)(struct omap_dss_device *dssdev);
516 u8 (*get_rotate)(struct omap_dss_device *dssdev);
517 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
519 bool (*get_mirror)(struct omap_dss_device *dssdev);
520 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
522 int (*memory_read)(struct omap_dss_device *dssdev,
523 void *buf, size_t size,
524 u16 x, u16 y, u16 w, u16 h);
526 void (*get_resolution)(struct omap_dss_device *dssdev,
527 u16 *xres, u16 *yres);
528 void (*get_dimensions)(struct omap_dss_device *dssdev,
529 u32 *width, u32 *height);
530 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
532 int (*check_timings)(struct omap_dss_device *dssdev,
533 struct omap_video_timings *timings);
534 void (*set_timings)(struct omap_dss_device *dssdev,
535 struct omap_video_timings *timings);
536 void (*get_timings)(struct omap_dss_device *dssdev,
537 struct omap_video_timings *timings);
539 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
540 u32 (*get_wss)(struct omap_dss_device *dssdev);
543 int omap_dss_register_driver(struct omap_dss_driver *);
544 void omap_dss_unregister_driver(struct omap_dss_driver *);
546 void omap_dss_get_device(struct omap_dss_device *dssdev);
547 void omap_dss_put_device(struct omap_dss_device *dssdev);
548 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
549 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
550 struct omap_dss_device *omap_dss_find_device(void *data,
551 int (*match)(struct omap_dss_device *dssdev, void *data));
553 int omap_dss_start_device(struct omap_dss_device *dssdev);
554 void omap_dss_stop_device(struct omap_dss_device *dssdev);
556 int omap_dss_get_num_overlay_managers(void);
557 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
559 int omap_dss_get_num_overlays(void);
560 struct omap_overlay *omap_dss_get_overlay(int num);
562 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
563 u16 *xres, u16 *yres);
564 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
566 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
567 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
568 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
570 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
571 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
572 unsigned long timeout);
574 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
575 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
577 void omapdss_dsi_vc_enable_hs(int channel, bool enable);
578 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
580 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
581 u16 *x, u16 *y, u16 *w, u16 *h,
582 bool enlarge_update_area);
583 int omap_dsi_update(struct omap_dss_device *dssdev,
585 u16 x, u16 y, u16 w, u16 h,
586 void (*callback)(int, void *), void *data);
587 int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
588 int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
589 void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
591 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
592 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
594 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
595 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
596 void dpi_set_timings(struct omap_dss_device *dssdev,
597 struct omap_video_timings *timings);
598 int dpi_check_timings(struct omap_dss_device *dssdev,
599 struct omap_video_timings *timings);
601 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
602 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
604 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
605 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
606 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
607 u16 *x, u16 *y, u16 *w, u16 *h);
608 int omap_rfbi_update(struct omap_dss_device *dssdev,
609 u16 x, u16 y, u16 w, u16 h,
610 void (*callback)(void *), void *data);