1 //===- CostModel.cpp ------ Cost Model Analysis ---------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the cost model analysis. It provides a very basic cost
11 // estimation for LLVM-IR. This analysis uses the services of the codegen
12 // to approximate the cost of any IR instruction when lowered to machine
13 // instructions. The cost results are unit-less and the cost number represents
14 // the throughput of the machine assuming that all loads hit the cache, all
15 // branches are predicted, etc. The cost numbers can be added in order to
16 // compare two or more transformation alternatives.
18 //===----------------------------------------------------------------------===//
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/Analysis/Passes.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/IR/Function.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/IntrinsicInst.h"
26 #include "llvm/IR/Value.h"
27 #include "llvm/Pass.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/raw_ostream.h"
33 #define CM_NAME "cost-model"
34 #define DEBUG_TYPE CM_NAME
36 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
38 cl::desc("Recognize reduction patterns."));
41 class CostModelAnalysis : public FunctionPass {
44 static char ID; // Class identification, replacement for typeinfo
45 CostModelAnalysis() : FunctionPass(ID), F(nullptr), TTI(nullptr) {
46 initializeCostModelAnalysisPass(
47 *PassRegistry::getPassRegistry());
50 /// Returns the expected cost of the instruction.
51 /// Returns -1 if the cost is unknown.
52 /// Note, this method does not cache the cost calculation and it
53 /// can be expensive in some cases.
54 unsigned getInstructionCost(const Instruction *I) const;
57 void getAnalysisUsage(AnalysisUsage &AU) const override;
58 bool runOnFunction(Function &F) override;
59 void print(raw_ostream &OS, const Module*) const override;
61 /// The function that we analyze.
63 /// Target information.
64 const TargetTransformInfo *TTI;
66 } // End of anonymous namespace
68 // Register this pass.
69 char CostModelAnalysis::ID = 0;
70 static const char cm_name[] = "Cost Model Analysis";
71 INITIALIZE_PASS_BEGIN(CostModelAnalysis, CM_NAME, cm_name, false, true)
72 INITIALIZE_PASS_END (CostModelAnalysis, CM_NAME, cm_name, false, true)
74 FunctionPass *llvm::createCostModelAnalysisPass() {
75 return new CostModelAnalysis();
79 CostModelAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
84 CostModelAnalysis::runOnFunction(Function &F) {
86 TTI = getAnalysisIfAvailable<TargetTransformInfo>();
91 static bool isReverseVectorMask(SmallVectorImpl<int> &Mask) {
92 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
93 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i))
98 static TargetTransformInfo::OperandValueKind getOperandInfo(Value *V) {
99 TargetTransformInfo::OperandValueKind OpInfo =
100 TargetTransformInfo::OK_AnyValue;
102 // Check for a splat of a constant or for a non uniform vector of constants.
103 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
104 OpInfo = TargetTransformInfo::OK_NonUniformConstantValue;
105 if (cast<Constant>(V)->getSplatValue() != nullptr)
106 OpInfo = TargetTransformInfo::OK_UniformConstantValue;
112 static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
114 // We don't need a shuffle if we just want to have element 0 in position 0 of
116 if (!SI && Level == 0 && IsLeft)
121 SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
123 // Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
124 // we look at the left or right side.
125 for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
128 SmallVector<int, 16> ActualMask = SI->getShuffleMask();
129 if (Mask != ActualMask)
135 static bool matchPairwiseReductionAtLevel(const BinaryOperator *BinOp,
136 unsigned Level, unsigned NumLevels) {
137 // Match one level of pairwise operations.
138 // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
139 // <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
140 // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
141 // <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
142 // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
143 if (BinOp == nullptr)
146 assert(BinOp->getType()->isVectorTy() && "Expecting a vector type");
148 unsigned Opcode = BinOp->getOpcode();
149 Value *L = BinOp->getOperand(0);
150 Value *R = BinOp->getOperand(1);
152 ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(L);
155 ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(R);
159 // On level 0 we can omit one shufflevector instruction.
160 if (!Level && !RS && !LS)
163 // Shuffle inputs must match.
164 Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
165 Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
166 Value *NextLevelOp = nullptr;
167 if (NextLevelOpR && NextLevelOpL) {
168 // If we have two shuffles their operands must match.
169 if (NextLevelOpL != NextLevelOpR)
172 NextLevelOp = NextLevelOpL;
173 } else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
174 // On the first level we can omit the shufflevector <0, undef,...>. So the
175 // input to the other shufflevector <1, undef> must match with one of the
176 // inputs to the current binary operation.
178 // %NextLevelOpL = shufflevector %R, <1, undef ...>
179 // %BinOp = fadd %NextLevelOpL, %R
180 if (NextLevelOpL && NextLevelOpL != R)
182 else if (NextLevelOpR && NextLevelOpR != L)
185 NextLevelOp = NextLevelOpL ? R : L;
189 // Check that the next levels binary operation exists and matches with the
191 BinaryOperator *NextLevelBinOp = nullptr;
192 if (Level + 1 != NumLevels) {
193 if (!(NextLevelBinOp = dyn_cast<BinaryOperator>(NextLevelOp)))
195 else if (NextLevelBinOp->getOpcode() != Opcode)
199 // Shuffle mask for pairwise operation must match.
200 if (matchPairwiseShuffleMask(LS, true, Level)) {
201 if (!matchPairwiseShuffleMask(RS, false, Level))
203 } else if (matchPairwiseShuffleMask(RS, true, Level)) {
204 if (!matchPairwiseShuffleMask(LS, false, Level))
209 if (++Level == NumLevels)
213 return matchPairwiseReductionAtLevel(NextLevelBinOp, Level, NumLevels);
216 static bool matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
217 unsigned &Opcode, Type *&Ty) {
218 if (!EnableReduxCost)
221 // Need to extract the first element.
222 ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
225 Idx = CI->getZExtValue();
229 BinaryOperator *RdxStart = dyn_cast<BinaryOperator>(ReduxRoot->getOperand(0));
233 Type *VecTy = ReduxRoot->getOperand(0)->getType();
234 unsigned NumVecElems = VecTy->getVectorNumElements();
235 if (!isPowerOf2_32(NumVecElems))
238 // We look for a sequence of shuffle,shuffle,add triples like the following
239 // that builds a pairwise reduction tree.
242 // (X0 + X1, X2 + X3, undef, undef)
243 // ((X0 + X1) + (X2 + X3), undef, undef, undef)
245 // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
246 // <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
247 // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
248 // <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
249 // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
250 // %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
251 // <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
252 // %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
253 // <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
254 // %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
255 // %r = extractelement <4 x float> %bin.rdx8, i32 0
256 if (!matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)))
259 Opcode = RdxStart->getOpcode();
265 static std::pair<Value *, ShuffleVectorInst *>
266 getShuffleAndOtherOprd(BinaryOperator *B) {
268 Value *L = B->getOperand(0);
269 Value *R = B->getOperand(1);
270 ShuffleVectorInst *S = nullptr;
272 if ((S = dyn_cast<ShuffleVectorInst>(L)))
273 return std::make_pair(R, S);
275 S = dyn_cast<ShuffleVectorInst>(R);
276 return std::make_pair(L, S);
279 static bool matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
280 unsigned &Opcode, Type *&Ty) {
281 if (!EnableReduxCost)
284 // Need to extract the first element.
285 ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
288 Idx = CI->getZExtValue();
292 BinaryOperator *RdxStart = dyn_cast<BinaryOperator>(ReduxRoot->getOperand(0));
295 unsigned RdxOpcode = RdxStart->getOpcode();
297 Type *VecTy = ReduxRoot->getOperand(0)->getType();
298 unsigned NumVecElems = VecTy->getVectorNumElements();
299 if (!isPowerOf2_32(NumVecElems))
302 // We look for a sequence of shuffles and adds like the following matching one
303 // fadd, shuffle vector pair at a time.
305 // %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
306 // <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
307 // %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
308 // %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
309 // <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
310 // %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
311 // %r = extractelement <4 x float> %bin.rdx8, i32 0
313 unsigned MaskStart = 1;
314 Value *RdxOp = RdxStart;
315 SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
316 unsigned NumVecElemsRemain = NumVecElems;
317 while (NumVecElemsRemain - 1) {
318 // Check for the right reduction operation.
319 BinaryOperator *BinOp;
320 if (!(BinOp = dyn_cast<BinaryOperator>(RdxOp)))
322 if (BinOp->getOpcode() != RdxOpcode)
326 ShuffleVectorInst *Shuffle;
327 std::tie(NextRdxOp, Shuffle) = getShuffleAndOtherOprd(BinOp);
329 // Check the current reduction operation and the shuffle use the same value.
330 if (Shuffle == nullptr)
332 if (Shuffle->getOperand(0) != NextRdxOp)
335 // Check that shuffle masks matches.
336 for (unsigned j = 0; j != MaskStart; ++j)
337 ShuffleMask[j] = MaskStart + j;
338 // Fill the rest of the mask with -1 for undef.
339 std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
341 SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
342 if (ShuffleMask != Mask)
346 NumVecElemsRemain /= 2;
355 unsigned CostModelAnalysis::getInstructionCost(const Instruction *I) const {
359 switch (I->getOpcode()) {
360 case Instruction::GetElementPtr:{
361 Type *ValTy = I->getOperand(0)->getType()->getPointerElementType();
362 return TTI->getAddressComputationCost(ValTy);
365 case Instruction::Ret:
366 case Instruction::PHI:
367 case Instruction::Br: {
368 return TTI->getCFInstrCost(I->getOpcode());
370 case Instruction::Add:
371 case Instruction::FAdd:
372 case Instruction::Sub:
373 case Instruction::FSub:
374 case Instruction::Mul:
375 case Instruction::FMul:
376 case Instruction::UDiv:
377 case Instruction::SDiv:
378 case Instruction::FDiv:
379 case Instruction::URem:
380 case Instruction::SRem:
381 case Instruction::FRem:
382 case Instruction::Shl:
383 case Instruction::LShr:
384 case Instruction::AShr:
385 case Instruction::And:
386 case Instruction::Or:
387 case Instruction::Xor: {
388 TargetTransformInfo::OperandValueKind Op1VK =
389 getOperandInfo(I->getOperand(0));
390 TargetTransformInfo::OperandValueKind Op2VK =
391 getOperandInfo(I->getOperand(1));
392 return TTI->getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK,
395 case Instruction::Select: {
396 const SelectInst *SI = cast<SelectInst>(I);
397 Type *CondTy = SI->getCondition()->getType();
398 return TTI->getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy);
400 case Instruction::ICmp:
401 case Instruction::FCmp: {
402 Type *ValTy = I->getOperand(0)->getType();
403 return TTI->getCmpSelInstrCost(I->getOpcode(), ValTy);
405 case Instruction::Store: {
406 const StoreInst *SI = cast<StoreInst>(I);
407 Type *ValTy = SI->getValueOperand()->getType();
408 return TTI->getMemoryOpCost(I->getOpcode(), ValTy,
410 SI->getPointerAddressSpace());
412 case Instruction::Load: {
413 const LoadInst *LI = cast<LoadInst>(I);
414 return TTI->getMemoryOpCost(I->getOpcode(), I->getType(),
416 LI->getPointerAddressSpace());
418 case Instruction::ZExt:
419 case Instruction::SExt:
420 case Instruction::FPToUI:
421 case Instruction::FPToSI:
422 case Instruction::FPExt:
423 case Instruction::PtrToInt:
424 case Instruction::IntToPtr:
425 case Instruction::SIToFP:
426 case Instruction::UIToFP:
427 case Instruction::Trunc:
428 case Instruction::FPTrunc:
429 case Instruction::BitCast:
430 case Instruction::AddrSpaceCast: {
431 Type *SrcTy = I->getOperand(0)->getType();
432 return TTI->getCastInstrCost(I->getOpcode(), I->getType(), SrcTy);
434 case Instruction::ExtractElement: {
435 const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
436 ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
439 Idx = CI->getZExtValue();
441 // Try to match a reduction sequence (series of shufflevector and vector
442 // adds followed by a extractelement).
443 unsigned ReduxOpCode;
446 if (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType))
447 return TTI->getReductionCost(ReduxOpCode, ReduxType, false);
448 else if (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType))
449 return TTI->getReductionCost(ReduxOpCode, ReduxType, true);
451 return TTI->getVectorInstrCost(I->getOpcode(),
452 EEI->getOperand(0)->getType(), Idx);
454 case Instruction::InsertElement: {
455 const InsertElementInst * IE = cast<InsertElementInst>(I);
456 ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
459 Idx = CI->getZExtValue();
460 return TTI->getVectorInstrCost(I->getOpcode(),
463 case Instruction::ShuffleVector: {
464 const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
465 Type *VecTypOp0 = Shuffle->getOperand(0)->getType();
466 unsigned NumVecElems = VecTypOp0->getVectorNumElements();
467 SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
469 if (NumVecElems == Mask.size() && isReverseVectorMask(Mask))
470 return TTI->getShuffleCost(TargetTransformInfo::SK_Reverse, VecTypOp0, 0,
474 case Instruction::Call:
475 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
476 SmallVector<Type*, 4> Tys;
477 for (unsigned J = 0, JE = II->getNumArgOperands(); J != JE; ++J)
478 Tys.push_back(II->getArgOperand(J)->getType());
480 return TTI->getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
485 // We don't have any information on this instruction.
490 void CostModelAnalysis::print(raw_ostream &OS, const Module*) const {
494 for (Function::iterator B = F->begin(), BE = F->end(); B != BE; ++B) {
495 for (BasicBlock::iterator it = B->begin(), e = B->end(); it != e; ++it) {
496 Instruction *Inst = it;
497 unsigned Cost = getInstructionCost(Inst);
498 if (Cost != (unsigned)-1)
499 OS << "Cost Model: Found an estimated cost of " << Cost;
501 OS << "Cost Model: Unknown cost";
503 OS << " for instruction: "<< *Inst << "\n";