1 //===---- DemandedBits.cpp - Determine demanded bits ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass implements a demanded bits analysis. A demanded bit is one that
11 // contributes to a result; bits that are not demanded can be either zero or
12 // one without affecting control or data flow. For example in this sequence:
14 // %1 = add i32 %x, %y
15 // %2 = trunc i32 %1 to i16
17 // Only the lowest 16 bits of %1 are demanded; the rest are removed by the
20 //===----------------------------------------------------------------------===//
22 #include "llvm/Analysis/DemandedBits.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/ADT/DenseMap.h"
25 #include "llvm/ADT/DepthFirstIterator.h"
26 #include "llvm/ADT/SmallPtrSet.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/StringExtras.h"
29 #include "llvm/Analysis/AssumptionCache.h"
30 #include "llvm/Analysis/ValueTracking.h"
31 #include "llvm/IR/BasicBlock.h"
32 #include "llvm/IR/CFG.h"
33 #include "llvm/IR/DataLayout.h"
34 #include "llvm/IR/Dominators.h"
35 #include "llvm/IR/InstIterator.h"
36 #include "llvm/IR/Instructions.h"
37 #include "llvm/IR/IntrinsicInst.h"
38 #include "llvm/IR/Module.h"
39 #include "llvm/IR/Operator.h"
40 #include "llvm/Pass.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/raw_ostream.h"
45 #define DEBUG_TYPE "demanded-bits"
47 char DemandedBits::ID = 0;
48 INITIALIZE_PASS_BEGIN(DemandedBits, "demanded-bits", "Demanded bits analysis",
50 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
51 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
52 INITIALIZE_PASS_END(DemandedBits, "demanded-bits", "Demanded bits analysis",
55 DemandedBits::DemandedBits() : FunctionPass(ID), F(nullptr), Analyzed(false) {
56 initializeDemandedBitsPass(*PassRegistry::getPassRegistry());
59 void DemandedBits::getAnalysisUsage(AnalysisUsage &AU) const {
61 AU.addRequired<AssumptionCacheTracker>();
62 AU.addRequired<DominatorTreeWrapperPass>();
66 static bool isAlwaysLive(Instruction *I) {
67 return isa<TerminatorInst>(I) || isa<DbgInfoIntrinsic>(I) ||
68 I->isEHPad() || I->mayHaveSideEffects();
71 void DemandedBits::determineLiveOperandBits(
72 const Instruction *UserI, const Instruction *I, unsigned OperandNo,
73 const APInt &AOut, APInt &AB, APInt &KnownZero, APInt &KnownOne,
74 APInt &KnownZero2, APInt &KnownOne2) {
75 unsigned BitWidth = AB.getBitWidth();
77 // We're called once per operand, but for some instructions, we need to
78 // compute known bits of both operands in order to determine the live bits of
79 // either (when both operands are instructions themselves). We don't,
80 // however, want to do this twice, so we cache the result in APInts that live
81 // in the caller. For the two-relevant-operands case, both operand values are
83 auto ComputeKnownBits =
84 [&](unsigned BitWidth, const Value *V1, const Value *V2) {
85 const DataLayout &DL = I->getModule()->getDataLayout();
86 KnownZero = APInt(BitWidth, 0);
87 KnownOne = APInt(BitWidth, 0);
88 computeKnownBits(const_cast<Value *>(V1), KnownZero, KnownOne, DL, 0,
92 KnownZero2 = APInt(BitWidth, 0);
93 KnownOne2 = APInt(BitWidth, 0);
94 computeKnownBits(const_cast<Value *>(V2), KnownZero2, KnownOne2, DL,
99 switch (UserI->getOpcode()) {
101 case Instruction::Call:
102 case Instruction::Invoke:
103 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(UserI))
104 switch (II->getIntrinsicID()) {
106 case Intrinsic::bswap:
107 // The alive bits of the input are the swapped alive bits of
109 AB = AOut.byteSwap();
111 case Intrinsic::ctlz:
112 if (OperandNo == 0) {
113 // We need some output bits, so we need all bits of the
114 // input to the left of, and including, the leftmost bit
116 ComputeKnownBits(BitWidth, I, nullptr);
117 AB = APInt::getHighBitsSet(BitWidth,
118 std::min(BitWidth, KnownOne.countLeadingZeros()+1));
121 case Intrinsic::cttz:
122 if (OperandNo == 0) {
123 // We need some output bits, so we need all bits of the
124 // input to the right of, and including, the rightmost bit
126 ComputeKnownBits(BitWidth, I, nullptr);
127 AB = APInt::getLowBitsSet(BitWidth,
128 std::min(BitWidth, KnownOne.countTrailingZeros()+1));
133 case Instruction::Add:
134 case Instruction::Sub:
135 case Instruction::Mul:
136 // Find the highest live output bit. We don't need any more input
137 // bits than that (adds, and thus subtracts, ripple only to the
139 AB = APInt::getLowBitsSet(BitWidth, AOut.getActiveBits());
141 case Instruction::Shl:
143 if (ConstantInt *CI =
144 dyn_cast<ConstantInt>(UserI->getOperand(1))) {
145 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
146 AB = AOut.lshr(ShiftAmt);
148 // If the shift is nuw/nsw, then the high bits are not dead
149 // (because we've promised that they *must* be zero).
150 const ShlOperator *S = cast<ShlOperator>(UserI);
151 if (S->hasNoSignedWrap())
152 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
153 else if (S->hasNoUnsignedWrap())
154 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
157 case Instruction::LShr:
159 if (ConstantInt *CI =
160 dyn_cast<ConstantInt>(UserI->getOperand(1))) {
161 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
162 AB = AOut.shl(ShiftAmt);
164 // If the shift is exact, then the low bits are not dead
165 // (they must be zero).
166 if (cast<LShrOperator>(UserI)->isExact())
167 AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
170 case Instruction::AShr:
172 if (ConstantInt *CI =
173 dyn_cast<ConstantInt>(UserI->getOperand(1))) {
174 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
175 AB = AOut.shl(ShiftAmt);
176 // Because the high input bit is replicated into the
177 // high-order bits of the result, if we need any of those
178 // bits, then we must keep the highest input bit.
179 if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt))
181 AB.setBit(BitWidth-1);
183 // If the shift is exact, then the low bits are not dead
184 // (they must be zero).
185 if (cast<AShrOperator>(UserI)->isExact())
186 AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
189 case Instruction::And:
192 // For bits that are known zero, the corresponding bits in the
193 // other operand are dead (unless they're both zero, in which
194 // case they can't both be dead, so just mark the LHS bits as
196 if (OperandNo == 0) {
197 ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
200 if (!isa<Instruction>(UserI->getOperand(0)))
201 ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
202 AB &= ~(KnownZero & ~KnownZero2);
205 case Instruction::Or:
208 // For bits that are known one, the corresponding bits in the
209 // other operand are dead (unless they're both one, in which
210 // case they can't both be dead, so just mark the LHS bits as
212 if (OperandNo == 0) {
213 ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
216 if (!isa<Instruction>(UserI->getOperand(0)))
217 ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
218 AB &= ~(KnownOne & ~KnownOne2);
221 case Instruction::Xor:
222 case Instruction::PHI:
225 case Instruction::Trunc:
226 AB = AOut.zext(BitWidth);
228 case Instruction::ZExt:
229 AB = AOut.trunc(BitWidth);
231 case Instruction::SExt:
232 AB = AOut.trunc(BitWidth);
233 // Because the high input bit is replicated into the
234 // high-order bits of the result, if we need any of those
235 // bits, then we must keep the highest input bit.
236 if ((AOut & APInt::getHighBitsSet(AOut.getBitWidth(),
237 AOut.getBitWidth() - BitWidth))
239 AB.setBit(BitWidth-1);
241 case Instruction::Select:
248 bool DemandedBits::runOnFunction(Function& Fn) {
254 void DemandedBits::performAnalysis() {
256 // Analysis already completed for this function.
259 AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(*F);
260 DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
265 SmallVector<Instruction*, 128> Worklist;
267 // Collect the set of "root" instructions that are known live.
268 for (Instruction &I : instructions(*F)) {
269 if (!isAlwaysLive(&I))
272 DEBUG(dbgs() << "DemandedBits: Root: " << I << "\n");
273 // For integer-valued instructions, set up an initial empty set of alive
274 // bits and add the instruction to the work list. For other instructions
275 // add their operands to the work list (for integer values operands, mark
276 // all bits as live).
277 if (IntegerType *IT = dyn_cast<IntegerType>(I.getType())) {
278 if (!AliveBits.count(&I)) {
279 AliveBits[&I] = APInt(IT->getBitWidth(), 0);
280 Worklist.push_back(&I);
286 // Non-integer-typed instructions...
287 for (Use &OI : I.operands()) {
288 if (Instruction *J = dyn_cast<Instruction>(OI)) {
289 if (IntegerType *IT = dyn_cast<IntegerType>(J->getType()))
290 AliveBits[J] = APInt::getAllOnesValue(IT->getBitWidth());
291 Worklist.push_back(J);
294 // To save memory, we don't add I to the Visited set here. Instead, we
295 // check isAlwaysLive on every instruction when searching for dead
296 // instructions later (we need to check isAlwaysLive for the
297 // integer-typed instructions anyway).
300 // Propagate liveness backwards to operands.
301 while (!Worklist.empty()) {
302 Instruction *UserI = Worklist.pop_back_val();
304 DEBUG(dbgs() << "DemandedBits: Visiting: " << *UserI);
306 if (UserI->getType()->isIntegerTy()) {
307 AOut = AliveBits[UserI];
308 DEBUG(dbgs() << " Alive Out: " << AOut);
310 DEBUG(dbgs() << "\n");
312 if (!UserI->getType()->isIntegerTy())
313 Visited.insert(UserI);
315 APInt KnownZero, KnownOne, KnownZero2, KnownOne2;
316 // Compute the set of alive bits for each operand. These are anded into the
317 // existing set, if any, and if that changes the set of alive bits, the
318 // operand is added to the work-list.
319 for (Use &OI : UserI->operands()) {
320 if (Instruction *I = dyn_cast<Instruction>(OI)) {
321 if (IntegerType *IT = dyn_cast<IntegerType>(I->getType())) {
322 unsigned BitWidth = IT->getBitWidth();
323 APInt AB = APInt::getAllOnesValue(BitWidth);
324 if (UserI->getType()->isIntegerTy() && !AOut &&
325 !isAlwaysLive(UserI)) {
326 AB = APInt(BitWidth, 0);
328 // If all bits of the output are dead, then all bits of the input
329 // Bits of each operand that are used to compute alive bits of the
330 // output are alive, all others are dead.
331 determineLiveOperandBits(UserI, I, OI.getOperandNo(), AOut, AB,
333 KnownZero2, KnownOne2);
336 // If we've added to the set of alive bits (or the operand has not
337 // been previously visited), then re-queue the operand to be visited
339 APInt ABPrev(BitWidth, 0);
340 auto ABI = AliveBits.find(I);
341 if (ABI != AliveBits.end())
342 ABPrev = ABI->second;
344 APInt ABNew = AB | ABPrev;
345 if (ABNew != ABPrev || ABI == AliveBits.end()) {
346 AliveBits[I] = std::move(ABNew);
347 Worklist.push_back(I);
349 } else if (!Visited.count(I)) {
350 Worklist.push_back(I);
357 APInt DemandedBits::getDemandedBits(Instruction *I) {
360 const DataLayout &DL = I->getParent()->getModule()->getDataLayout();
361 if (AliveBits.count(I))
363 return APInt::getAllOnesValue(DL.getTypeSizeInBits(I->getType()));
366 bool DemandedBits::isInstructionDead(Instruction *I) {
369 return !Visited.count(I) && AliveBits.find(I) == AliveBits.end() &&
373 void DemandedBits::print(raw_ostream &OS, const Module *M) const {
374 // This is gross. But the alternative is making all the state mutable
375 // just because of this one debugging method.
376 const_cast<DemandedBits*>(this)->performAnalysis();
377 for (auto &KV : AliveBits) {
378 OS << "DemandedBits: 0x" << utohexstr(KV.second.getLimitedValue()) << " for "
379 << *KV.first << "\n";
383 FunctionPass *llvm::createDemandedBitsPass() {
384 return new DemandedBits();