1 //===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains support for writing dwarf compile unit.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
17 #include "llvm/Support/DataTypes.h"
23 /// Base class containing the logic for constructing DWARF expressions
24 /// independently of whether they are emitted into a DIE or into a .debug_loc
26 class DwarfExpression {
29 DwarfExpression(TargetMachine &TM) : TM(TM) {}
31 virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
32 virtual void EmitSigned(int Value) = 0;
33 virtual void EmitUnsigned(unsigned Value) = 0;
34 /// Emit a dwarf register operation.
35 void AddReg(int DwarfReg, const char* Comment = nullptr);
36 /// Emit an (double-)indirect dwarf register operation.
37 void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
39 /// Emit a dwarf register operation for describing
40 /// - a small value occupying only part of a register or
41 /// - a register representing only part of a value.
42 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
43 /// Emit a shift-right dwarf expression.
44 void AddShr(unsigned ShiftBy);
46 /// \brief Emit a partial DWARF register operation.
47 /// \param MLoc the register
48 /// \param PieceSize size and
49 /// \param PieceOffset offset of the piece in bits, if this is one
50 /// piece of an aggregate value.
52 /// If size and offset is zero an operation for the entire
53 /// register is emitted: Some targets do not provide a DWARF
54 /// register number for every register. If this is the case, this
55 /// function will attempt to emit a DWARF register by emitting a
56 /// piece of a super-register or by piecing together multiple
57 /// subregisters that alias the register.
58 void AddMachineRegPiece(unsigned MachineReg,
59 unsigned PieceSizeInBits = 0,
60 unsigned PieceOffsetInBits = 0);