1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "codegen-dce"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/Pass.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
26 STATISTIC(NumDeletes, "Number of dead instructions deleted");
29 class DeadMachineInstructionElim : public MachineFunctionPass {
30 bool runOnMachineFunction(MachineFunction &MF) override;
32 const TargetRegisterInfo *TRI;
33 const MachineRegisterInfo *MRI;
34 const TargetInstrInfo *TII;
35 BitVector LivePhysRegs;
38 static char ID; // Pass identification, replacement for typeid
39 DeadMachineInstructionElim() : MachineFunctionPass(ID) {
40 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
44 bool isDead(const MachineInstr *MI) const;
47 char DeadMachineInstructionElim::ID = 0;
48 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
50 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
51 "Remove dead machine instructions", false, false)
53 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
54 // Technically speaking inline asm without side effects and no defs can still
55 // be deleted. But there is so much bad inline asm code out there, we should
57 if (MI->isInlineAsm())
60 // Don't delete instructions with side effects.
61 bool SawStore = false;
62 if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI())
65 // Examine each operand.
66 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
67 const MachineOperand &MO = MI->getOperand(i);
68 if (MO.isReg() && MO.isDef()) {
69 unsigned Reg = MO.getReg();
70 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
71 // Don't delete live physreg defs, or any reserved register defs.
72 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
75 if (!MRI->use_nodbg_empty(Reg))
76 // This def has a non-debug use. Don't delete the instruction!
82 // If there are no defs with uses, the instruction is dead.
86 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
87 if (skipOptnoneFunction(*MF.getFunction()))
90 bool AnyChanges = false;
91 MRI = &MF.getRegInfo();
92 TRI = MF.getTarget().getRegisterInfo();
93 TII = MF.getTarget().getInstrInfo();
95 // Loop over all instructions in all blocks, from bottom to top, so that it's
96 // more likely that chains of dependent but ultimately dead instructions will
98 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
100 MachineBasicBlock *MBB = &*I;
102 // Start out assuming that reserved registers are live out of this block.
103 LivePhysRegs = MRI->getReservedRegs();
105 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
106 // live across blocks, but some targets (x86) can have flags live out of a
108 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
109 E = MBB->succ_end(); S != E; S++)
110 for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
111 LI != (*S)->livein_end(); LI++)
112 LivePhysRegs.set(*LI);
114 // Now scan the instructions and delete dead ones, tracking physreg
115 // liveness as we go.
116 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
117 MIE = MBB->rend(); MII != MIE; ) {
118 MachineInstr *MI = &*MII;
120 // If the instruction is dead, delete it!
122 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
123 // It is possible that some DBG_VALUE instructions refer to this
124 // instruction. Examine each def operand for such references;
125 // if found, mark the DBG_VALUE as undef (but don't delete it).
126 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
127 const MachineOperand &MO = MI->getOperand(i);
128 if (!MO.isReg() || !MO.isDef())
130 unsigned Reg = MO.getReg();
131 if (!TargetRegisterInfo::isVirtualRegister(Reg))
133 MRI->markUsesInDebugValueAsUndef(Reg);
136 MI->eraseFromParent();
139 // MII is now pointing to the next instruction to process,
140 // so don't increment it.
144 // Record the physreg defs.
145 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
146 const MachineOperand &MO = MI->getOperand(i);
147 if (MO.isReg() && MO.isDef()) {
148 unsigned Reg = MO.getReg();
149 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
150 // Check the subreg set, not the alias set, because a def
151 // of a super-register may still be partially live after
153 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
155 LivePhysRegs.reset(*SR);
157 } else if (MO.isRegMask()) {
158 // Register mask of preserved registers. All clobbers are dead.
159 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
162 // Record the physreg uses, after the defs, in case a physreg is
163 // both defined and used in the same instruction.
164 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
165 const MachineOperand &MO = MI->getOperand(i);
166 if (MO.isReg() && MO.isUse()) {
167 unsigned Reg = MO.getReg();
168 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
169 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
170 LivePhysRegs.set(*AI);
175 // We didn't delete the current instruction, so increment MII to
181 LivePhysRegs.clear();