1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/Passes.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/CodeGen/MachineFunctionPass.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetSubtargetInfo.h"
27 #define DEBUG_TYPE "codegen-dce"
29 STATISTIC(NumDeletes, "Number of dead instructions deleted");
32 class DeadMachineInstructionElim : public MachineFunctionPass {
33 bool runOnMachineFunction(MachineFunction &MF) override;
35 const TargetRegisterInfo *TRI;
36 const MachineRegisterInfo *MRI;
37 const TargetInstrInfo *TII;
38 BitVector LivePhysRegs;
41 static char ID; // Pass identification, replacement for typeid
42 DeadMachineInstructionElim() : MachineFunctionPass(ID) {
43 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
47 bool isDead(const MachineInstr *MI) const;
50 char DeadMachineInstructionElim::ID = 0;
51 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
53 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
54 "Remove dead machine instructions", false, false)
56 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
57 // Technically speaking inline asm without side effects and no defs can still
58 // be deleted. But there is so much bad inline asm code out there, we should
60 if (MI->isInlineAsm())
63 // Don't delete instructions with side effects.
64 bool SawStore = false;
65 if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI())
68 // Examine each operand.
69 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
70 const MachineOperand &MO = MI->getOperand(i);
71 if (MO.isReg() && MO.isDef()) {
72 unsigned Reg = MO.getReg();
73 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
74 // Don't delete live physreg defs, or any reserved register defs.
75 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
78 if (!MRI->use_nodbg_empty(Reg))
79 // This def has a non-debug use. Don't delete the instruction!
85 // If there are no defs with uses, the instruction is dead.
89 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
90 if (skipOptnoneFunction(*MF.getFunction()))
93 bool AnyChanges = false;
94 MRI = &MF.getRegInfo();
95 TRI = MF.getSubtarget().getRegisterInfo();
96 TII = MF.getSubtarget().getInstrInfo();
98 // Loop over all instructions in all blocks, from bottom to top, so that it's
99 // more likely that chains of dependent but ultimately dead instructions will
101 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
103 MachineBasicBlock *MBB = &*I;
105 // Start out assuming that reserved registers are live out of this block.
106 LivePhysRegs = MRI->getReservedRegs();
108 // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
109 // live across blocks, but some targets (x86) can have flags live out of a
111 for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
112 E = MBB->succ_end(); S != E; S++)
113 for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
114 LI != (*S)->livein_end(); LI++)
115 LivePhysRegs.set(*LI);
117 // Now scan the instructions and delete dead ones, tracking physreg
118 // liveness as we go.
119 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
120 MIE = MBB->rend(); MII != MIE; ) {
121 MachineInstr *MI = &*MII;
123 // If the instruction is dead, delete it!
125 DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
126 // It is possible that some DBG_VALUE instructions refer to this
127 // instruction. They get marked as undef and will be deleted
128 // in the live debug variable analysis.
129 MI->eraseFromParentAndMarkDBGValuesForRemoval();
133 // MII is now pointing to the next instruction to process,
134 // so don't increment it.
138 // Record the physreg defs.
139 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
140 const MachineOperand &MO = MI->getOperand(i);
141 if (MO.isReg() && MO.isDef()) {
142 unsigned Reg = MO.getReg();
143 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
144 // Check the subreg set, not the alias set, because a def
145 // of a super-register may still be partially live after
147 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
149 LivePhysRegs.reset(*SR);
151 } else if (MO.isRegMask()) {
152 // Register mask of preserved registers. All clobbers are dead.
153 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
156 // Record the physreg uses, after the defs, in case a physreg is
157 // both defined and used in the same instruction.
158 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
159 const MachineOperand &MO = MI->getOperand(i);
160 if (MO.isReg() && MO.isUse()) {
161 unsigned Reg = MO.getReg();
162 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
163 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
164 LivePhysRegs.set(*AI);
169 // We didn't delete the current instruction, so increment MII to
175 LivePhysRegs.clear();