1 //===-- ExpandPostRAPseudos.cpp - Pseudo instruction expansion pass -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines a pass that expands COPY and SUBREG_TO_REG pseudo
11 // instructions after register allocation.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "postrapseudos"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
29 struct ExpandPostRA : public MachineFunctionPass {
31 const TargetRegisterInfo *TRI;
32 const TargetInstrInfo *TII;
35 static char ID; // Pass identification, replacement for typeid
36 ExpandPostRA() : MachineFunctionPass(ID) {}
38 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
40 AU.addPreservedID(MachineLoopInfoID);
41 AU.addPreservedID(MachineDominatorsID);
42 MachineFunctionPass::getAnalysisUsage(AU);
45 /// runOnMachineFunction - pass entry point
46 bool runOnMachineFunction(MachineFunction&);
49 bool LowerSubregToReg(MachineInstr *MI);
50 bool LowerCopy(MachineInstr *MI);
52 void TransferImplicitDefs(MachineInstr *MI);
54 } // end anonymous namespace
56 char ExpandPostRA::ID = 0;
57 char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
59 INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
60 "Post-RA pseudo instruction expansion pass", false, false)
62 /// TransferImplicitDefs - MI is a pseudo-instruction, and the lowered
63 /// replacement instructions immediately precede it. Copy any implicit-def
64 /// operands from MI to the replacement instruction.
66 ExpandPostRA::TransferImplicitDefs(MachineInstr *MI) {
67 MachineBasicBlock::iterator CopyMI = MI;
70 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
71 MachineOperand &MO = MI->getOperand(i);
72 if (!MO.isReg() || !MO.isImplicit() || MO.isUse())
74 CopyMI->addOperand(MachineOperand::CreateReg(MO.getReg(), true, true));
78 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
79 MachineBasicBlock *MBB = MI->getParent();
80 assert((MI->getOperand(0).isReg() && MI->getOperand(0).isDef()) &&
81 MI->getOperand(1).isImm() &&
82 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) &&
83 MI->getOperand(3).isImm() && "Invalid subreg_to_reg");
85 unsigned DstReg = MI->getOperand(0).getReg();
86 unsigned InsReg = MI->getOperand(2).getReg();
87 assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?");
88 unsigned SubIdx = MI->getOperand(3).getImm();
90 assert(SubIdx != 0 && "Invalid index for insert_subreg");
91 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
93 assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
94 "Insert destination must be in a physical register");
95 assert(TargetRegisterInfo::isPhysicalRegister(InsReg) &&
96 "Inserted value must be in a physical register");
98 DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
100 if (DstSubReg == InsReg) {
101 // No need to insert an identify copy instruction.
102 // Watch out for case like this:
103 // %RAX<def> = SUBREG_TO_REG 0, %EAX<kill>, 3
104 // We must leave %RAX live.
105 if (DstReg != InsReg) {
106 MI->setDesc(TII->get(TargetOpcode::KILL));
107 MI->RemoveOperand(3); // SubIdx
108 MI->RemoveOperand(1); // Imm
109 DEBUG(dbgs() << "subreg: replace by: " << *MI);
112 DEBUG(dbgs() << "subreg: eliminated!");
114 if (MI->getOperand(0).isDead()) {
115 MI->setDesc(TII->get(TargetOpcode::KILL));
116 DEBUG(dbgs() << "subreg: replaced by: " << *MI);
119 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
120 MI->getOperand(2).isKill());
121 // Implicitly define DstReg for subsequent uses.
122 MachineBasicBlock::iterator CopyMI = MI;
124 CopyMI->addRegisterDefined(DstReg);
125 DEBUG(dbgs() << "subreg: " << *CopyMI);
128 DEBUG(dbgs() << '\n');
133 bool ExpandPostRA::LowerCopy(MachineInstr *MI) {
134 MachineOperand &DstMO = MI->getOperand(0);
135 MachineOperand &SrcMO = MI->getOperand(1);
137 if (DstMO.isDead()) {
138 DEBUG(dbgs() << "dead copy: " << *MI);
139 MI->setDesc(TII->get(TargetOpcode::KILL));
140 DEBUG(dbgs() << "replaced by: " << *MI);
144 if (SrcMO.getReg() == DstMO.getReg()) {
145 DEBUG(dbgs() << "identity copy: " << *MI);
146 // No need to insert an identity copy instruction, but replace with a KILL
147 // if liveness is changed.
148 if (SrcMO.isUndef() || MI->getNumOperands() > 2) {
149 // We must make sure the super-register gets killed. Replace the
150 // instruction with KILL.
151 MI->setDesc(TII->get(TargetOpcode::KILL));
152 DEBUG(dbgs() << "replaced by: " << *MI);
155 // Vanilla identity copy.
156 MI->eraseFromParent();
160 DEBUG(dbgs() << "real copy: " << *MI);
161 TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
162 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
164 if (MI->getNumOperands() > 2)
165 TransferImplicitDefs(MI);
167 MachineBasicBlock::iterator dMI = MI;
168 dbgs() << "replaced by: " << *(--dMI);
170 MI->eraseFromParent();
174 /// runOnMachineFunction - Reduce subregister inserts and extracts to register
177 bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
178 DEBUG(dbgs() << "Machine Function\n"
179 << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
180 << "********** Function: " << MF.getName() << '\n');
181 TRI = MF.getTarget().getRegisterInfo();
182 TII = MF.getTarget().getInstrInfo();
184 bool MadeChange = false;
186 for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
187 mbbi != mbbe; ++mbbi) {
188 for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
190 MachineInstr *MI = mi;
191 // Advance iterator here because MI may be erased.
194 // Only expand pseudos.
198 // Give targets a chance to expand even standard pseudos.
199 if (TII->expandPostRAPseudo(MI)) {
204 // Expand standard pseudos.
205 switch (MI->getOpcode()) {
206 case TargetOpcode::SUBREG_TO_REG:
207 MadeChange |= LowerSubregToReg(MI);
209 case TargetOpcode::COPY:
210 MadeChange |= LowerCopy(MI);
212 case TargetOpcode::DBG_VALUE:
214 case TargetOpcode::INSERT_SUBREG:
215 case TargetOpcode::EXTRACT_SUBREG:
216 llvm_unreachable("Sub-register pseudos should have been eliminated.");