1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level if-conversion pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "ifcvt"
15 #include "BranchFolding.h"
16 #include "llvm/Function.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineLoopInfo.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/Target/TargetInstrItineraries.h"
23 #include "llvm/Target/TargetLowering.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/ADT/DepthFirstIterator.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
35 // Hidden options for help debugging.
36 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
37 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
38 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
39 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
40 cl::init(false), cl::Hidden);
41 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
42 cl::init(false), cl::Hidden);
43 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
44 cl::init(false), cl::Hidden);
45 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
46 cl::init(false), cl::Hidden);
47 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
48 cl::init(false), cl::Hidden);
49 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
50 cl::init(false), cl::Hidden);
51 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
52 cl::init(false), cl::Hidden);
53 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
54 cl::init(true), cl::Hidden);
56 STATISTIC(NumSimple, "Number of simple if-conversions performed");
57 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
58 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
59 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
60 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
61 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
62 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
63 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
64 STATISTIC(NumDupBBs, "Number of duplicated blocks");
67 class IfConverter : public MachineFunctionPass {
69 ICNotClassfied, // BB data valid, but not classified.
70 ICSimpleFalse, // Same as ICSimple, but on the false path.
71 ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
72 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
73 ICTriangleRev, // Same as ICTriangle, but true path rev condition.
74 ICTriangleFalse, // Same as ICTriangle, but on the false path.
75 ICTriangle, // BB is entry of a triangle sub-CFG.
76 ICDiamond // BB is entry of a diamond sub-CFG.
79 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
80 /// if-conversion feasibility analysis. This includes results from
81 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
82 /// classification, and common tail block of its successors (if it's a
83 /// diamond shape), its size, whether it's predicable, and whether any
84 /// instruction can clobber the 'would-be' predicate.
86 /// IsDone - True if BB is not to be considered for ifcvt.
87 /// IsBeingAnalyzed - True if BB is currently being analyzed.
88 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
89 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
90 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
91 /// HasFallThrough - True if BB may fallthrough to the following BB.
92 /// IsUnpredicable - True if BB is known to be unpredicable.
93 /// ClobbersPred - True if BB could modify predicates (e.g. has
95 /// NonPredSize - Number of non-predicated instructions.
96 /// BB - Corresponding MachineBasicBlock.
97 /// TrueBB / FalseBB- See AnalyzeBranch().
98 /// BrCond - Conditions for end of block conditional branches.
99 /// Predicate - Predicate used in the BB.
102 bool IsBeingAnalyzed : 1;
105 bool IsBrAnalyzable : 1;
106 bool HasFallThrough : 1;
107 bool IsUnpredicable : 1;
108 bool CannotBeCopied : 1;
109 bool ClobbersPred : 1;
110 unsigned NonPredSize;
111 MachineBasicBlock *BB;
112 MachineBasicBlock *TrueBB;
113 MachineBasicBlock *FalseBB;
114 SmallVector<MachineOperand, 4> BrCond;
115 SmallVector<MachineOperand, 4> Predicate;
116 BBInfo() : IsDone(false), IsBeingAnalyzed(false),
117 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
118 HasFallThrough(false), IsUnpredicable(false),
119 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
120 BB(0), TrueBB(0), FalseBB(0) {}
123 /// IfcvtToken - Record information about pending if-conversions to attempt:
124 /// BBI - Corresponding BBInfo.
125 /// Kind - Type of block. See IfcvtKind.
126 /// NeedSubsumption - True if the to-be-predicated BB has already been
128 /// NumDups - Number of instructions that would be duplicated due
129 /// to this if-conversion. (For diamonds, the number of
130 /// identical instructions at the beginnings of both
132 /// NumDups2 - For diamonds, the number of identical instructions
133 /// at the ends of both paths.
137 bool NeedSubsumption;
140 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
141 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
144 /// Roots - Basic blocks that do not have successors. These are the starting
145 /// points of Graph traversal.
146 std::vector<MachineBasicBlock*> Roots;
148 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
149 /// basic block number.
150 std::vector<BBInfo> BBAnalysis;
152 const TargetLowering *TLI;
153 const TargetInstrInfo *TII;
154 const TargetRegisterInfo *TRI;
155 const InstrItineraryData *InstrItins;
156 const MachineLoopInfo *MLI;
161 IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
162 initializeIfConverterPass(*PassRegistry::getPassRegistry());
165 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
166 AU.addRequired<MachineLoopInfo>();
167 MachineFunctionPass::getAnalysisUsage(AU);
170 virtual bool runOnMachineFunction(MachineFunction &MF);
171 virtual const char *getPassName() const { return "If Converter"; }
174 bool ReverseBranchCondition(BBInfo &BBI);
175 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
176 float Prediction, float Confidence) const;
177 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
178 bool FalseBranch, unsigned &Dups,
179 float Prediction, float Confidence) const;
180 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
181 unsigned &Dups1, unsigned &Dups2) const;
182 void ScanInstructions(BBInfo &BBI);
183 BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
184 std::vector<IfcvtToken*> &Tokens);
185 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
186 bool isTriangle = false, bool RevBranch = false);
187 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
188 void InvalidatePreds(MachineBasicBlock *BB);
189 void RemoveExtraEdges(BBInfo &BBI);
190 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
191 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
192 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
193 unsigned NumDups1, unsigned NumDups2);
194 void PredicateBlock(BBInfo &BBI,
195 MachineBasicBlock::iterator E,
196 SmallVectorImpl<MachineOperand> &Cond,
197 SmallSet<unsigned, 4> &Redefs);
198 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
199 SmallVectorImpl<MachineOperand> &Cond,
200 SmallSet<unsigned, 4> &Redefs,
201 bool IgnoreBr = false);
202 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
204 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB, unsigned Size,
205 float Prediction, float Confidence) const {
206 return Size > 0 && TII->isProfitableToIfCvt(BB, Size,
207 Prediction, Confidence);
210 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, unsigned TSize,
211 MachineBasicBlock &FBB, unsigned FSize,
212 float Prediction, float Confidence) const {
213 return TSize > 0 && FSize > 0 &&
214 TII->isProfitableToIfCvt(TBB, TSize, FBB, FSize,
215 Prediction, Confidence);
218 // blockAlwaysFallThrough - Block ends without a terminator.
219 bool blockAlwaysFallThrough(BBInfo &BBI) const {
220 return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
223 // IfcvtTokenCmp - Used to sort if-conversion candidates.
224 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
225 int Incr1 = (C1->Kind == ICDiamond)
226 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
227 int Incr2 = (C2->Kind == ICDiamond)
228 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
231 else if (Incr1 == Incr2) {
232 // Favors subsumption.
233 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
235 else if (C1->NeedSubsumption == C2->NeedSubsumption) {
236 // Favors diamond over triangle, etc.
237 if ((unsigned)C1->Kind < (unsigned)C2->Kind)
239 else if (C1->Kind == C2->Kind)
240 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
247 char IfConverter::ID = 0;
250 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
251 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
252 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
254 FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
256 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
257 TLI = MF.getTarget().getTargetLowering();
258 TII = MF.getTarget().getInstrInfo();
259 TRI = MF.getTarget().getRegisterInfo();
260 MLI = &getAnalysis<MachineLoopInfo>();
261 InstrItins = MF.getTarget().getInstrItineraryData();
262 if (!TII) return false;
264 // Tail merge tend to expose more if-conversion opportunities.
265 BranchFolder BF(true);
266 bool BFChange = BF.OptimizeFunction(MF, TII,
267 MF.getTarget().getRegisterInfo(),
268 getAnalysisIfAvailable<MachineModuleInfo>());
270 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
271 << MF.getFunction()->getName() << "\'");
273 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
274 DEBUG(dbgs() << " skipped\n");
277 DEBUG(dbgs() << "\n");
280 BBAnalysis.resize(MF.getNumBlockIDs());
282 // Look for root nodes, i.e. blocks without successors.
283 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
287 std::vector<IfcvtToken*> Tokens;
289 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
290 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
291 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
292 // Do an initial analysis for each basic block and find all the potential
293 // candidates to perform if-conversion.
295 AnalyzeBlocks(MF, Tokens);
296 while (!Tokens.empty()) {
297 IfcvtToken *Token = Tokens.back();
299 BBInfo &BBI = Token->BBI;
300 IfcvtKind Kind = Token->Kind;
301 unsigned NumDups = Token->NumDups;
302 unsigned NumDups2 = Token->NumDups2;
306 // If the block has been evicted out of the queue or it has already been
307 // marked dead (due to it being predicated), then skip it.
309 BBI.IsEnqueued = false;
313 BBI.IsEnqueued = false;
317 default: assert(false && "Unexpected!");
320 case ICSimpleFalse: {
321 bool isFalse = Kind == ICSimpleFalse;
322 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
323 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
325 << "): BB#" << BBI.BB->getNumber() << " ("
326 << ((Kind == ICSimpleFalse)
327 ? BBI.FalseBB->getNumber()
328 : BBI.TrueBB->getNumber()) << ") ");
329 RetVal = IfConvertSimple(BBI, Kind);
330 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
332 if (isFalse) ++NumSimpleFalse;
339 case ICTriangleFalse:
340 case ICTriangleFRev: {
341 bool isFalse = Kind == ICTriangleFalse;
342 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
343 if (DisableTriangle && !isFalse && !isRev) break;
344 if (DisableTriangleR && !isFalse && isRev) break;
345 if (DisableTriangleF && isFalse && !isRev) break;
346 if (DisableTriangleFR && isFalse && isRev) break;
347 DEBUG(dbgs() << "Ifcvt (Triangle");
349 DEBUG(dbgs() << " false");
351 DEBUG(dbgs() << " rev");
352 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
353 << BBI.TrueBB->getNumber() << ",F:"
354 << BBI.FalseBB->getNumber() << ") ");
355 RetVal = IfConvertTriangle(BBI, Kind);
356 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
359 if (isRev) ++NumTriangleFRev;
360 else ++NumTriangleFalse;
362 if (isRev) ++NumTriangleRev;
369 if (DisableDiamond) break;
370 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
371 << BBI.TrueBB->getNumber() << ",F:"
372 << BBI.FalseBB->getNumber() << ") ");
373 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
374 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
375 if (RetVal) ++NumDiamonds;
382 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
383 NumTriangleFalse + NumTriangleFRev + NumDiamonds;
384 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
390 MadeChange |= Change;
393 // Delete tokens in case of early exit.
394 while (!Tokens.empty()) {
395 IfcvtToken *Token = Tokens.back();
404 if (MadeChange && IfCvtBranchFold) {
405 BranchFolder BF(false);
406 BF.OptimizeFunction(MF, TII,
407 MF.getTarget().getRegisterInfo(),
408 getAnalysisIfAvailable<MachineModuleInfo>());
411 MadeChange |= BFChange;
415 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
416 /// its 'true' successor.
417 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
418 MachineBasicBlock *TrueBB) {
419 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
420 E = BB->succ_end(); SI != E; ++SI) {
421 MachineBasicBlock *SuccBB = *SI;
422 if (SuccBB != TrueBB)
428 /// ReverseBranchCondition - Reverse the condition of the end of the block
429 /// branch. Swap block's 'true' and 'false' successors.
430 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
431 DebugLoc dl; // FIXME: this is nowhere
432 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
433 TII->RemoveBranch(*BBI.BB);
434 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
435 std::swap(BBI.TrueBB, BBI.FalseBB);
441 /// getNextBlock - Returns the next block in the function blocks ordering. If
442 /// it is the end, returns NULL.
443 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
444 MachineFunction::iterator I = BB;
445 MachineFunction::iterator E = BB->getParent()->end();
451 /// ValidSimple - Returns true if the 'true' block (along with its
452 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
453 /// number of instructions that the ifcvt would need to duplicate if performed
455 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
456 float Prediction, float Confidence) const {
458 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
461 if (TrueBBI.IsBrAnalyzable)
464 if (TrueBBI.BB->pred_size() > 1) {
465 if (TrueBBI.CannotBeCopied ||
466 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
467 Prediction, Confidence))
469 Dups = TrueBBI.NonPredSize;
475 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
476 /// with their common predecessor) forms a valid triangle shape for ifcvt.
477 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
478 /// branches to the 'false' block rather than the other way around. It also
479 /// returns the number of instructions that the ifcvt would need to duplicate
480 /// if performed in 'Dups'.
481 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
482 bool FalseBranch, unsigned &Dups,
483 float Prediction, float Confidence) const {
485 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
488 if (TrueBBI.BB->pred_size() > 1) {
489 if (TrueBBI.CannotBeCopied)
492 unsigned Size = TrueBBI.NonPredSize;
493 if (TrueBBI.IsBrAnalyzable) {
494 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
495 // Ends with an unconditional branch. It will be removed.
498 MachineBasicBlock *FExit = FalseBranch
499 ? TrueBBI.TrueBB : TrueBBI.FalseBB;
501 // Require a conditional branch
505 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size,
506 Prediction, Confidence))
511 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
512 if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
513 MachineFunction::iterator I = TrueBBI.BB;
514 if (++I == TrueBBI.BB->getParent()->end())
518 return TExit && TExit == FalseBBI.BB;
522 MachineBasicBlock::iterator firstNonBranchInst(MachineBasicBlock *BB,
523 const TargetInstrInfo *TII) {
524 MachineBasicBlock::iterator I = BB->end();
525 while (I != BB->begin()) {
527 if (!I->getDesc().isBranch())
533 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
534 /// with their common predecessor) forms a valid diamond shape for ifcvt.
535 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
536 unsigned &Dups1, unsigned &Dups2) const {
538 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
539 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
542 MachineBasicBlock *TT = TrueBBI.TrueBB;
543 MachineBasicBlock *FT = FalseBBI.TrueBB;
545 if (!TT && blockAlwaysFallThrough(TrueBBI))
546 TT = getNextBlock(TrueBBI.BB);
547 if (!FT && blockAlwaysFallThrough(FalseBBI))
548 FT = getNextBlock(FalseBBI.BB);
551 if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
553 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
556 // FIXME: Allow true block to have an early exit?
557 if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
558 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
561 MachineBasicBlock::iterator TI = TrueBBI.BB->begin();
562 MachineBasicBlock::iterator FI = FalseBBI.BB->begin();
563 MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
564 MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
565 // Skip dbg_value instructions
566 while (TI != TIE && TI->isDebugValue())
568 while (FI != FIE && FI->isDebugValue())
570 while (TI != TIE && FI != FIE) {
571 // Skip dbg_value instructions. These do not count.
572 if (TI->isDebugValue()) {
573 while (TI != TIE && TI->isDebugValue())
578 if (FI->isDebugValue()) {
579 while (FI != FIE && FI->isDebugValue())
584 if (!TI->isIdenticalTo(FI))
591 TI = firstNonBranchInst(TrueBBI.BB, TII);
592 FI = firstNonBranchInst(FalseBBI.BB, TII);
593 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
594 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
595 // Skip dbg_value instructions at end of the bb's.
596 while (TI != TIB && TI->isDebugValue())
598 while (FI != FIB && FI->isDebugValue())
600 while (TI != TIB && FI != FIB) {
601 // Skip dbg_value instructions. These do not count.
602 if (TI->isDebugValue()) {
603 while (TI != TIB && TI->isDebugValue())
608 if (FI->isDebugValue()) {
609 while (FI != FIB && FI->isDebugValue())
614 if (!TI->isIdenticalTo(FI))
624 /// ScanInstructions - Scan all the instructions in the block to determine if
625 /// the block is predicable. In most cases, that means all the instructions
626 /// in the block are isPredicable(). Also checks if the block contains any
627 /// instruction which can clobber a predicate (e.g. condition code register).
628 /// If so, the block is not predicable unless it's the last instruction.
629 void IfConverter::ScanInstructions(BBInfo &BBI) {
633 bool AlreadyPredicated = BBI.Predicate.size() > 0;
634 // First analyze the end of BB branches.
635 BBI.TrueBB = BBI.FalseBB = NULL;
638 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
639 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
641 if (BBI.BrCond.size()) {
642 // No false branch. This BB must end with a conditional branch and a
645 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
647 // Malformed bcc? True and false blocks are the same?
648 BBI.IsUnpredicable = true;
653 // Then scan all the instructions.
655 BBI.ClobbersPred = false;
656 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
658 if (I->isDebugValue())
661 const TargetInstrDesc &TID = I->getDesc();
662 if (TID.isNotDuplicable())
663 BBI.CannotBeCopied = true;
665 bool isPredicated = TII->isPredicated(I);
666 bool isCondBr = BBI.IsBrAnalyzable && TID.isConditionalBranch();
670 unsigned NumOps = TII->getNumMicroOps(&*I, InstrItins);
671 BBI.NonPredSize += NumOps;
672 } else if (!AlreadyPredicated) {
673 // FIXME: This instruction is already predicated before the
674 // if-conversion pass. It's probably something like a conditional move.
675 // Mark this block unpredicable for now.
676 BBI.IsUnpredicable = true;
681 if (BBI.ClobbersPred && !isPredicated) {
682 // Predicate modification instruction should end the block (except for
683 // already predicated instructions and end of block branches).
685 // A conditional branch is not predicable, but it may be eliminated.
689 // Predicate may have been modified, the subsequent (currently)
690 // unpredicated instructions cannot be correctly predicated.
691 BBI.IsUnpredicable = true;
695 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
696 // still potentially predicable.
697 std::vector<MachineOperand> PredDefs;
698 if (TII->DefinesPredicate(I, PredDefs))
699 BBI.ClobbersPred = true;
701 if (!TII->isPredicable(I)) {
702 BBI.IsUnpredicable = true;
708 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
709 /// predicated by the specified predicate.
710 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
711 SmallVectorImpl<MachineOperand> &Pred,
712 bool isTriangle, bool RevBranch) {
713 // If the block is dead or unpredicable, then it cannot be predicated.
714 if (BBI.IsDone || BBI.IsUnpredicable)
717 // If it is already predicated, check if its predicate subsumes the new
719 if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
722 if (BBI.BrCond.size()) {
726 // Test predicate subsumption.
727 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
728 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
730 if (TII->ReverseBranchCondition(Cond))
733 if (TII->ReverseBranchCondition(RevPred) ||
734 !TII->SubsumesPredicate(Cond, RevPred))
741 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
742 /// the specified block. Record its successors and whether it looks like an
743 /// if-conversion candidate.
744 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
745 std::vector<IfcvtToken*> &Tokens) {
746 BBInfo &BBI = BBAnalysis[BB->getNumber()];
748 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
752 BBI.IsBeingAnalyzed = true;
754 ScanInstructions(BBI);
756 // Unanalyzable or ends with fallthrough or unconditional branch.
757 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty()) {
758 BBI.IsBeingAnalyzed = false;
759 BBI.IsAnalyzed = true;
763 // Do not ifcvt if either path is a back edge to the entry block.
764 if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
765 BBI.IsBeingAnalyzed = false;
766 BBI.IsAnalyzed = true;
770 // Do not ifcvt if true and false fallthrough blocks are the same.
772 BBI.IsBeingAnalyzed = false;
773 BBI.IsAnalyzed = true;
777 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
778 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
780 if (TrueBBI.IsDone && FalseBBI.IsDone) {
781 BBI.IsBeingAnalyzed = false;
782 BBI.IsAnalyzed = true;
786 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
787 bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
791 bool TNeedSub = TrueBBI.Predicate.size() > 0;
792 bool FNeedSub = FalseBBI.Predicate.size() > 0;
793 bool Enqueued = false;
795 // Try to predict the branch, using loop info to guide us.
796 // General heuristics are:
797 // - backedge -> 90% taken
798 // - early exit -> 20% taken
799 // - branch predictor confidence -> 90%
800 float Prediction = 0.5f;
801 float Confidence = 0.9f;
802 MachineLoop *Loop = MLI->getLoopFor(BB);
804 if (TrueBBI.BB == Loop->getHeader())
806 else if (FalseBBI.BB == Loop->getHeader())
809 MachineLoop *TrueLoop = MLI->getLoopFor(TrueBBI.BB);
810 MachineLoop *FalseLoop = MLI->getLoopFor(FalseBBI.BB);
811 if (!TrueLoop || TrueLoop->getParentLoop() == Loop)
813 else if (!FalseLoop || FalseLoop->getParentLoop() == Loop)
817 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
818 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize - (Dups + Dups2),
819 *FalseBBI.BB, FalseBBI.NonPredSize - (Dups + Dups2),
820 Prediction, Confidence) &&
821 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
822 FeasibilityAnalysis(FalseBBI, RevCond)) {
830 // Note TailBB can be empty.
831 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
836 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction, Confidence) &&
837 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize,
838 Prediction, Confidence) &&
839 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
847 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
851 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction, Confidence) &&
852 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize,
853 Prediction, Confidence) &&
854 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
855 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
859 if (ValidSimple(TrueBBI, Dups, Prediction, Confidence) &&
860 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize,
861 Prediction, Confidence) &&
862 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
863 // Simple (split, no rejoin):
870 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
875 // Try the other path...
876 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
877 1.0-Prediction, Confidence) &&
878 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize,
879 1.0-Prediction, Confidence) &&
880 FeasibilityAnalysis(FalseBBI, RevCond, true)) {
881 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
885 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
886 1.0-Prediction, Confidence) &&
887 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize,
888 1.0-Prediction, Confidence) &&
889 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
890 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
894 if (ValidSimple(FalseBBI, Dups, 1.0-Prediction, Confidence) &&
895 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize,
896 1.0-Prediction, Confidence) &&
897 FeasibilityAnalysis(FalseBBI, RevCond)) {
898 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
903 BBI.IsEnqueued = Enqueued;
904 BBI.IsBeingAnalyzed = false;
905 BBI.IsAnalyzed = true;
909 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
911 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
912 std::vector<IfcvtToken*> &Tokens) {
913 std::set<MachineBasicBlock*> Visited;
914 for (unsigned i = 0, e = Roots.size(); i != e; ++i) {
915 for (idf_ext_iterator<MachineBasicBlock*> I=idf_ext_begin(Roots[i],Visited),
916 E = idf_ext_end(Roots[i], Visited); I != E; ++I) {
917 MachineBasicBlock *BB = *I;
918 AnalyzeBlock(BB, Tokens);
922 // Sort to favor more complex ifcvt scheme.
923 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
926 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
927 /// that all the intervening blocks are empty (given BB can fall through to its
929 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
930 MachineFunction::iterator PI = BB;
931 MachineFunction::iterator I = llvm::next(PI);
932 MachineFunction::iterator TI = ToBB;
933 MachineFunction::iterator E = BB->getParent()->end();
935 // Check isSuccessor to avoid case where the next block is empty, but
936 // it's not a successor.
937 if (I == E || !I->empty() || !PI->isSuccessor(I))
944 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
945 /// to determine if it can be if-converted. If predecessor is already enqueued,
947 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
948 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
949 E = BB->pred_end(); PI != E; ++PI) {
950 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
951 if (PBBI.IsDone || PBBI.BB == BB)
953 PBBI.IsAnalyzed = false;
954 PBBI.IsEnqueued = false;
958 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
960 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
961 const TargetInstrInfo *TII) {
962 DebugLoc dl; // FIXME: this is nowhere
963 SmallVector<MachineOperand, 0> NoCond;
964 TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
967 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
969 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
970 MachineBasicBlock *TBB = NULL, *FBB = NULL;
971 SmallVector<MachineOperand, 4> Cond;
972 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
973 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
976 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are
977 /// modeled as read + write (sort like two-address instructions). These
978 /// routines track register liveness and add implicit uses to if-converted
979 /// instructions to conform to the model.
980 static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs,
981 const TargetRegisterInfo *TRI) {
982 for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
983 E = BB->livein_end(); I != E; ++I) {
986 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
988 Redefs.insert(*Subreg);
992 static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
993 const TargetRegisterInfo *TRI,
994 bool AddImpUse = false) {
995 SmallVector<unsigned, 4> Defs;
996 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
997 const MachineOperand &MO = MI->getOperand(i);
1000 unsigned Reg = MO.getReg();
1004 Defs.push_back(Reg);
1005 else if (MO.isKill()) {
1007 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
1011 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1012 unsigned Reg = Defs[i];
1013 if (Redefs.count(Reg)) {
1015 // Treat predicated update as read + write.
1016 MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
1017 true/*IsImp*/,false/*IsKill*/));
1020 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
1026 static void UpdatePredRedefs(MachineBasicBlock::iterator I,
1027 MachineBasicBlock::iterator E,
1028 SmallSet<unsigned,4> &Redefs,
1029 const TargetRegisterInfo *TRI) {
1031 UpdatePredRedefs(I, Redefs, TRI);
1036 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1038 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1039 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1040 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1041 BBInfo *CvtBBI = &TrueBBI;
1042 BBInfo *NextBBI = &FalseBBI;
1044 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1045 if (Kind == ICSimpleFalse)
1046 std::swap(CvtBBI, NextBBI);
1048 if (CvtBBI->IsDone ||
1049 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1050 // Something has changed. It's no longer safe to predicate this block.
1051 BBI.IsAnalyzed = false;
1052 CvtBBI->IsAnalyzed = false;
1056 if (Kind == ICSimpleFalse)
1057 if (TII->ReverseBranchCondition(Cond))
1058 assert(false && "Unable to reverse branch condition!");
1060 // Initialize liveins to the first BB. These are potentiall redefined by
1061 // predicated instructions.
1062 SmallSet<unsigned, 4> Redefs;
1063 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1064 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1066 if (CvtBBI->BB->pred_size() > 1) {
1067 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1068 // Copy instructions in the true block, predicate them, and add them to
1070 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs);
1072 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1074 // Merge converted block into entry block.
1075 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1076 MergeBlocks(BBI, *CvtBBI);
1079 bool IterIfcvt = true;
1080 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1081 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1082 BBI.HasFallThrough = false;
1083 // Now ifcvt'd block will look like this:
1090 // We cannot further ifcvt this block because the unconditional branch
1091 // will have to be predicated on the new condition, that will not be
1092 // available if cmp executes.
1096 RemoveExtraEdges(BBI);
1098 // Update block info. BB can be iteratively if-converted.
1101 InvalidatePreds(BBI.BB);
1102 CvtBBI->IsDone = true;
1104 // FIXME: Must maintain LiveIns.
1108 /// IfConvertTriangle - If convert a triangle sub-CFG.
1110 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1111 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1112 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1113 BBInfo *CvtBBI = &TrueBBI;
1114 BBInfo *NextBBI = &FalseBBI;
1115 DebugLoc dl; // FIXME: this is nowhere
1117 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1118 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1119 std::swap(CvtBBI, NextBBI);
1121 if (CvtBBI->IsDone ||
1122 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1123 // Something has changed. It's no longer safe to predicate this block.
1124 BBI.IsAnalyzed = false;
1125 CvtBBI->IsAnalyzed = false;
1129 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1130 if (TII->ReverseBranchCondition(Cond))
1131 assert(false && "Unable to reverse branch condition!");
1133 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1134 if (ReverseBranchCondition(*CvtBBI)) {
1135 // BB has been changed, modify its predecessors (except for this
1136 // one) so they don't get ifcvt'ed based on bad intel.
1137 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1138 E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1139 MachineBasicBlock *PBB = *PI;
1142 BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1143 if (PBBI.IsEnqueued) {
1144 PBBI.IsAnalyzed = false;
1145 PBBI.IsEnqueued = false;
1151 // Initialize liveins to the first BB. These are potentially redefined by
1152 // predicated instructions.
1153 SmallSet<unsigned, 4> Redefs;
1154 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1155 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1157 bool HasEarlyExit = CvtBBI->FalseBB != NULL;
1158 if (CvtBBI->BB->pred_size() > 1) {
1159 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1160 // Copy instructions in the true block, predicate them, and add them to
1162 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true);
1164 // Predicate the 'true' block after removing its branch.
1165 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1166 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1168 // Now merge the entry of the triangle with the true block.
1169 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1170 MergeBlocks(BBI, *CvtBBI, false);
1173 // If 'true' block has a 'false' successor, add an exit branch to it.
1175 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1176 CvtBBI->BrCond.end());
1177 if (TII->ReverseBranchCondition(RevCond))
1178 assert(false && "Unable to reverse branch condition!");
1179 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
1180 BBI.BB->addSuccessor(CvtBBI->FalseBB);
1183 // Merge in the 'false' block if the 'false' block has no other
1184 // predecessors. Otherwise, add an unconditional branch to 'false'.
1185 bool FalseBBDead = false;
1186 bool IterIfcvt = true;
1187 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1188 if (!isFallThrough) {
1189 // Only merge them if the true block does not fallthrough to the false
1190 // block. By not merging them, we make it possible to iteratively
1191 // ifcvt the blocks.
1192 if (!HasEarlyExit &&
1193 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) {
1194 MergeBlocks(BBI, *NextBBI);
1197 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1198 BBI.HasFallThrough = false;
1200 // Mixed predicated and unpredicated code. This cannot be iteratively
1205 RemoveExtraEdges(BBI);
1207 // Update block info. BB can be iteratively if-converted.
1210 InvalidatePreds(BBI.BB);
1211 CvtBBI->IsDone = true;
1213 NextBBI->IsDone = true;
1215 // FIXME: Must maintain LiveIns.
1219 /// IfConvertDiamond - If convert a diamond sub-CFG.
1221 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1222 unsigned NumDups1, unsigned NumDups2) {
1223 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1224 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1225 MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1226 // True block must fall through or end with an unanalyzable terminator.
1228 if (blockAlwaysFallThrough(TrueBBI))
1229 TailBB = FalseBBI.TrueBB;
1230 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1233 if (TrueBBI.IsDone || FalseBBI.IsDone ||
1234 TrueBBI.BB->pred_size() > 1 ||
1235 FalseBBI.BB->pred_size() > 1) {
1236 // Something has changed. It's no longer safe to predicate these blocks.
1237 BBI.IsAnalyzed = false;
1238 TrueBBI.IsAnalyzed = false;
1239 FalseBBI.IsAnalyzed = false;
1243 // Put the predicated instructions from the 'true' block before the
1244 // instructions from the 'false' block, unless the true block would clobber
1245 // the predicate, in which case, do the opposite.
1246 BBInfo *BBI1 = &TrueBBI;
1247 BBInfo *BBI2 = &FalseBBI;
1248 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1249 if (TII->ReverseBranchCondition(RevCond))
1250 assert(false && "Unable to reverse branch condition!");
1251 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1252 SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1254 // Figure out the more profitable ordering.
1255 bool DoSwap = false;
1256 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1258 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1259 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1263 std::swap(BBI1, BBI2);
1264 std::swap(Cond1, Cond2);
1267 // Remove the conditional branch from entry to the blocks.
1268 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1270 // Initialize liveins to the first BB. These are potentially redefined by
1271 // predicated instructions.
1272 SmallSet<unsigned, 4> Redefs;
1273 InitPredRedefs(BBI1->BB, Redefs, TRI);
1275 // Remove the duplicated instructions at the beginnings of both paths.
1276 MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1277 MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1278 MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1279 MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1280 // Skip dbg_value instructions
1281 while (DI1 != DIE1 && DI1->isDebugValue())
1283 while (DI2 != DIE2 && DI2->isDebugValue())
1285 BBI1->NonPredSize -= NumDups1;
1286 BBI2->NonPredSize -= NumDups1;
1288 // Skip past the dups on each side separately since there may be
1289 // differing dbg_value entries.
1290 for (unsigned i = 0; i < NumDups1; ++DI1) {
1291 if (!DI1->isDebugValue())
1294 while (NumDups1 != 0) {
1296 if (!DI2->isDebugValue())
1300 UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI);
1301 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1302 BBI2->BB->erase(BBI2->BB->begin(), DI2);
1304 // Predicate the 'true' block after removing its branch.
1305 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1306 DI1 = BBI1->BB->end();
1307 for (unsigned i = 0; i != NumDups2; ) {
1308 // NumDups2 only counted non-dbg_value instructions, so this won't
1309 // run off the head of the list.
1310 assert (DI1 != BBI1->BB->begin());
1312 // skip dbg_value instructions
1313 if (!DI1->isDebugValue())
1316 BBI1->BB->erase(DI1, BBI1->BB->end());
1317 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs);
1319 // Predicate the 'false' block.
1320 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1321 DI2 = BBI2->BB->end();
1322 while (NumDups2 != 0) {
1323 // NumDups2 only counted non-dbg_value instructions, so this won't
1324 // run off the head of the list.
1325 assert (DI2 != BBI2->BB->begin());
1327 // skip dbg_value instructions
1328 if (!DI2->isDebugValue())
1331 PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
1333 // Merge the true block into the entry of the diamond.
1334 MergeBlocks(BBI, *BBI1, TailBB == 0);
1335 MergeBlocks(BBI, *BBI2, TailBB == 0);
1337 // If the if-converted block falls through or unconditionally branches into
1338 // the tail block, and the tail block does not have other predecessors, then
1339 // fold the tail block in as well. Otherwise, unless it falls through to the
1340 // tail, add a unconditional branch to it.
1342 BBInfo TailBBI = BBAnalysis[TailBB->getNumber()];
1343 bool CanMergeTail = !TailBBI.HasFallThrough;
1344 // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1345 // check if there are any other predecessors besides those.
1346 unsigned NumPreds = TailBB->pred_size();
1348 CanMergeTail = false;
1349 else if (NumPreds == 1 && CanMergeTail) {
1350 MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1351 if (*PI != BBI1->BB && *PI != BBI2->BB)
1352 CanMergeTail = false;
1355 MergeBlocks(BBI, TailBBI);
1356 TailBBI.IsDone = true;
1358 BBI.BB->addSuccessor(TailBB);
1359 InsertUncondBranch(BBI.BB, TailBB, TII);
1360 BBI.HasFallThrough = false;
1364 // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1365 // which can happen here if TailBB is unanalyzable and is merged, so
1366 // explicitly remove BBI1 and BBI2 as successors.
1367 BBI.BB->removeSuccessor(BBI1->BB);
1368 BBI.BB->removeSuccessor(BBI2->BB);
1369 RemoveExtraEdges(BBI);
1371 // Update block info.
1372 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1373 InvalidatePreds(BBI.BB);
1375 // FIXME: Must maintain LiveIns.
1379 /// PredicateBlock - Predicate instructions from the start of the block to the
1380 /// specified end with the specified condition.
1381 void IfConverter::PredicateBlock(BBInfo &BBI,
1382 MachineBasicBlock::iterator E,
1383 SmallVectorImpl<MachineOperand> &Cond,
1384 SmallSet<unsigned, 4> &Redefs) {
1385 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1386 if (I->isDebugValue() || TII->isPredicated(I))
1388 if (!TII->PredicateInstruction(I, Cond)) {
1390 dbgs() << "Unable to predicate " << *I << "!\n";
1392 llvm_unreachable(0);
1395 // If the predicated instruction now redefines a register as the result of
1396 // if-conversion, add an implicit kill.
1397 UpdatePredRedefs(I, Redefs, TRI, true);
1400 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
1402 BBI.IsAnalyzed = false;
1403 BBI.NonPredSize = 0;
1408 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1409 /// the destination block. Skip end of block branches if IgnoreBr is true.
1410 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1411 SmallVectorImpl<MachineOperand> &Cond,
1412 SmallSet<unsigned, 4> &Redefs,
1414 MachineFunction &MF = *ToBBI.BB->getParent();
1416 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1417 E = FromBBI.BB->end(); I != E; ++I) {
1418 const TargetInstrDesc &TID = I->getDesc();
1419 // Do not copy the end of the block branches.
1420 if (IgnoreBr && TID.isBranch())
1423 MachineInstr *MI = MF.CloneMachineInstr(I);
1424 ToBBI.BB->insert(ToBBI.BB->end(), MI);
1425 unsigned NumOps = TII->getNumMicroOps(MI, InstrItins);
1426 ToBBI.NonPredSize += NumOps;
1428 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1429 if (!TII->PredicateInstruction(MI, Cond)) {
1431 dbgs() << "Unable to predicate " << *I << "!\n";
1433 llvm_unreachable(0);
1437 // If the predicated instruction now redefines a register as the result of
1438 // if-conversion, add an implicit kill.
1439 UpdatePredRedefs(MI, Redefs, TRI, true);
1443 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1444 FromBBI.BB->succ_end());
1445 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1446 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1448 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1449 MachineBasicBlock *Succ = Succs[i];
1450 // Fallthrough edge can't be transferred.
1451 if (Succ == FallThrough)
1453 ToBBI.BB->addSuccessor(Succ);
1457 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1458 std::back_inserter(ToBBI.Predicate));
1459 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
1461 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1462 ToBBI.IsAnalyzed = false;
1467 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1468 /// This will leave FromBB as an empty block, so remove all of its
1469 /// successor edges except for the fall-through edge. If AddEdges is true,
1470 /// i.e., when FromBBI's branch is being moved, add those successor edges to
1472 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1473 ToBBI.BB->splice(ToBBI.BB->end(),
1474 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1476 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1477 FromBBI.BB->succ_end());
1478 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1479 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1481 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1482 MachineBasicBlock *Succ = Succs[i];
1483 // Fallthrough edge can't be transferred.
1484 if (Succ == FallThrough)
1486 FromBBI.BB->removeSuccessor(Succ);
1488 ToBBI.BB->addSuccessor(Succ);
1491 // Now FromBBI always falls through to the next block!
1492 if (NBB && !FromBBI.BB->isSuccessor(NBB))
1493 FromBBI.BB->addSuccessor(NBB);
1495 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1496 std::back_inserter(ToBBI.Predicate));
1497 FromBBI.Predicate.clear();
1499 ToBBI.NonPredSize += FromBBI.NonPredSize;
1500 FromBBI.NonPredSize = 0;
1502 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1503 ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1504 ToBBI.IsAnalyzed = false;
1505 FromBBI.IsAnalyzed = false;