1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level if-conversion pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "ifcvt"
15 #include "BranchFolding.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/MachineModuleInfo.h"
18 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/MC/MCInstrItineraries.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetLowering.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/ADT/SmallSet.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
35 // Hidden options for help debugging.
36 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
37 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
38 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
39 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
40 cl::init(false), cl::Hidden);
41 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
42 cl::init(false), cl::Hidden);
43 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
44 cl::init(false), cl::Hidden);
45 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
46 cl::init(false), cl::Hidden);
47 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
48 cl::init(false), cl::Hidden);
49 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
50 cl::init(false), cl::Hidden);
51 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
52 cl::init(false), cl::Hidden);
53 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
54 cl::init(true), cl::Hidden);
56 STATISTIC(NumSimple, "Number of simple if-conversions performed");
57 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
58 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
59 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
60 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
61 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
62 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
63 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
64 STATISTIC(NumDupBBs, "Number of duplicated blocks");
65 STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated");
68 class IfConverter : public MachineFunctionPass {
70 ICNotClassfied, // BB data valid, but not classified.
71 ICSimpleFalse, // Same as ICSimple, but on the false path.
72 ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
73 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
74 ICTriangleRev, // Same as ICTriangle, but true path rev condition.
75 ICTriangleFalse, // Same as ICTriangle, but on the false path.
76 ICTriangle, // BB is entry of a triangle sub-CFG.
77 ICDiamond // BB is entry of a diamond sub-CFG.
80 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
81 /// if-conversion feasibility analysis. This includes results from
82 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
83 /// classification, and common tail block of its successors (if it's a
84 /// diamond shape), its size, whether it's predicable, and whether any
85 /// instruction can clobber the 'would-be' predicate.
87 /// IsDone - True if BB is not to be considered for ifcvt.
88 /// IsBeingAnalyzed - True if BB is currently being analyzed.
89 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
90 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
91 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
92 /// HasFallThrough - True if BB may fallthrough to the following BB.
93 /// IsUnpredicable - True if BB is known to be unpredicable.
94 /// ClobbersPred - True if BB could modify predicates (e.g. has
96 /// NonPredSize - Number of non-predicated instructions.
97 /// ExtraCost - Extra cost for multi-cycle instructions.
98 /// ExtraCost2 - Some instructions are slower when predicated
99 /// BB - Corresponding MachineBasicBlock.
100 /// TrueBB / FalseBB- See AnalyzeBranch().
101 /// BrCond - Conditions for end of block conditional branches.
102 /// Predicate - Predicate used in the BB.
105 bool IsBeingAnalyzed : 1;
108 bool IsBrAnalyzable : 1;
109 bool HasFallThrough : 1;
110 bool IsUnpredicable : 1;
111 bool CannotBeCopied : 1;
112 bool ClobbersPred : 1;
113 unsigned NonPredSize;
116 MachineBasicBlock *BB;
117 MachineBasicBlock *TrueBB;
118 MachineBasicBlock *FalseBB;
119 SmallVector<MachineOperand, 4> BrCond;
120 SmallVector<MachineOperand, 4> Predicate;
121 BBInfo() : IsDone(false), IsBeingAnalyzed(false),
122 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
123 HasFallThrough(false), IsUnpredicable(false),
124 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
125 ExtraCost(0), ExtraCost2(0), BB(0), TrueBB(0), FalseBB(0) {}
128 /// IfcvtToken - Record information about pending if-conversions to attempt:
129 /// BBI - Corresponding BBInfo.
130 /// Kind - Type of block. See IfcvtKind.
131 /// NeedSubsumption - True if the to-be-predicated BB has already been
133 /// NumDups - Number of instructions that would be duplicated due
134 /// to this if-conversion. (For diamonds, the number of
135 /// identical instructions at the beginnings of both
137 /// NumDups2 - For diamonds, the number of identical instructions
138 /// at the ends of both paths.
142 bool NeedSubsumption;
145 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
146 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
149 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
150 /// basic block number.
151 std::vector<BBInfo> BBAnalysis;
153 const TargetLowering *TLI;
154 const TargetInstrInfo *TII;
155 const TargetRegisterInfo *TRI;
156 const InstrItineraryData *InstrItins;
157 const MachineBranchProbabilityInfo *MBPI;
158 MachineRegisterInfo *MRI;
165 IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
166 initializeIfConverterPass(*PassRegistry::getPassRegistry());
169 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
170 AU.addRequired<MachineBranchProbabilityInfo>();
171 MachineFunctionPass::getAnalysisUsage(AU);
174 virtual bool runOnMachineFunction(MachineFunction &MF);
177 bool ReverseBranchCondition(BBInfo &BBI);
178 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
179 const BranchProbability &Prediction) const;
180 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
181 bool FalseBranch, unsigned &Dups,
182 const BranchProbability &Prediction) const;
183 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
184 unsigned &Dups1, unsigned &Dups2) const;
185 void ScanInstructions(BBInfo &BBI);
186 BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
187 std::vector<IfcvtToken*> &Tokens);
188 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
189 bool isTriangle = false, bool RevBranch = false);
190 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
191 void InvalidatePreds(MachineBasicBlock *BB);
192 void RemoveExtraEdges(BBInfo &BBI);
193 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
194 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
195 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
196 unsigned NumDups1, unsigned NumDups2);
197 void PredicateBlock(BBInfo &BBI,
198 MachineBasicBlock::iterator E,
199 SmallVectorImpl<MachineOperand> &Cond,
200 SmallSet<unsigned, 4> &Redefs,
201 SmallSet<unsigned, 4> *LaterRedefs = 0);
202 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
203 SmallVectorImpl<MachineOperand> &Cond,
204 SmallSet<unsigned, 4> &Redefs,
205 bool IgnoreBr = false);
206 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
208 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
209 unsigned Cycle, unsigned Extra,
210 const BranchProbability &Prediction) const {
211 return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
215 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
216 unsigned TCycle, unsigned TExtra,
217 MachineBasicBlock &FBB,
218 unsigned FCycle, unsigned FExtra,
219 const BranchProbability &Prediction) const {
220 return TCycle > 0 && FCycle > 0 &&
221 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
225 // blockAlwaysFallThrough - Block ends without a terminator.
226 bool blockAlwaysFallThrough(BBInfo &BBI) const {
227 return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
230 // IfcvtTokenCmp - Used to sort if-conversion candidates.
231 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
232 int Incr1 = (C1->Kind == ICDiamond)
233 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
234 int Incr2 = (C2->Kind == ICDiamond)
235 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
238 else if (Incr1 == Incr2) {
239 // Favors subsumption.
240 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
242 else if (C1->NeedSubsumption == C2->NeedSubsumption) {
243 // Favors diamond over triangle, etc.
244 if ((unsigned)C1->Kind < (unsigned)C2->Kind)
246 else if (C1->Kind == C2->Kind)
247 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
254 char IfConverter::ID = 0;
257 char &llvm::IfConverterID = IfConverter::ID;
259 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
260 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
261 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
263 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
264 TLI = MF.getTarget().getTargetLowering();
265 TII = MF.getTarget().getInstrInfo();
266 TRI = MF.getTarget().getRegisterInfo();
267 MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
268 MRI = &MF.getRegInfo();
269 InstrItins = MF.getTarget().getInstrItineraryData();
270 if (!TII) return false;
272 PreRegAlloc = MRI->isSSA();
274 bool BFChange = false;
276 // Tail merge tend to expose more if-conversion opportunities.
277 BranchFolder BF(true, false);
278 BFChange = BF.OptimizeFunction(MF, TII,
279 MF.getTarget().getRegisterInfo(),
280 getAnalysisIfAvailable<MachineModuleInfo>());
283 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
284 << MF.getName() << "\'");
286 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
287 DEBUG(dbgs() << " skipped\n");
290 DEBUG(dbgs() << "\n");
293 BBAnalysis.resize(MF.getNumBlockIDs());
295 std::vector<IfcvtToken*> Tokens;
297 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
298 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
299 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
300 // Do an initial analysis for each basic block and find all the potential
301 // candidates to perform if-conversion.
303 AnalyzeBlocks(MF, Tokens);
304 while (!Tokens.empty()) {
305 IfcvtToken *Token = Tokens.back();
307 BBInfo &BBI = Token->BBI;
308 IfcvtKind Kind = Token->Kind;
309 unsigned NumDups = Token->NumDups;
310 unsigned NumDups2 = Token->NumDups2;
314 // If the block has been evicted out of the queue or it has already been
315 // marked dead (due to it being predicated), then skip it.
317 BBI.IsEnqueued = false;
321 BBI.IsEnqueued = false;
325 default: llvm_unreachable("Unexpected!");
327 case ICSimpleFalse: {
328 bool isFalse = Kind == ICSimpleFalse;
329 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
330 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
332 << "): BB#" << BBI.BB->getNumber() << " ("
333 << ((Kind == ICSimpleFalse)
334 ? BBI.FalseBB->getNumber()
335 : BBI.TrueBB->getNumber()) << ") ");
336 RetVal = IfConvertSimple(BBI, Kind);
337 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
339 if (isFalse) ++NumSimpleFalse;
346 case ICTriangleFalse:
347 case ICTriangleFRev: {
348 bool isFalse = Kind == ICTriangleFalse;
349 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
350 if (DisableTriangle && !isFalse && !isRev) break;
351 if (DisableTriangleR && !isFalse && isRev) break;
352 if (DisableTriangleF && isFalse && !isRev) break;
353 if (DisableTriangleFR && isFalse && isRev) break;
354 DEBUG(dbgs() << "Ifcvt (Triangle");
356 DEBUG(dbgs() << " false");
358 DEBUG(dbgs() << " rev");
359 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
360 << BBI.TrueBB->getNumber() << ",F:"
361 << BBI.FalseBB->getNumber() << ") ");
362 RetVal = IfConvertTriangle(BBI, Kind);
363 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
366 if (isRev) ++NumTriangleFRev;
367 else ++NumTriangleFalse;
369 if (isRev) ++NumTriangleRev;
376 if (DisableDiamond) break;
377 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
378 << BBI.TrueBB->getNumber() << ",F:"
379 << BBI.FalseBB->getNumber() << ") ");
380 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
381 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
382 if (RetVal) ++NumDiamonds;
389 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
390 NumTriangleFalse + NumTriangleFRev + NumDiamonds;
391 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
397 MadeChange |= Change;
400 // Delete tokens in case of early exit.
401 while (!Tokens.empty()) {
402 IfcvtToken *Token = Tokens.back();
410 if (MadeChange && IfCvtBranchFold) {
411 BranchFolder BF(false, false);
412 BF.OptimizeFunction(MF, TII,
413 MF.getTarget().getRegisterInfo(),
414 getAnalysisIfAvailable<MachineModuleInfo>());
417 MadeChange |= BFChange;
421 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
422 /// its 'true' successor.
423 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
424 MachineBasicBlock *TrueBB) {
425 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
426 E = BB->succ_end(); SI != E; ++SI) {
427 MachineBasicBlock *SuccBB = *SI;
428 if (SuccBB != TrueBB)
434 /// ReverseBranchCondition - Reverse the condition of the end of the block
435 /// branch. Swap block's 'true' and 'false' successors.
436 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
437 DebugLoc dl; // FIXME: this is nowhere
438 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
439 TII->RemoveBranch(*BBI.BB);
440 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
441 std::swap(BBI.TrueBB, BBI.FalseBB);
447 /// getNextBlock - Returns the next block in the function blocks ordering. If
448 /// it is the end, returns NULL.
449 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
450 MachineFunction::iterator I = BB;
451 MachineFunction::iterator E = BB->getParent()->end();
457 /// ValidSimple - Returns true if the 'true' block (along with its
458 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
459 /// number of instructions that the ifcvt would need to duplicate if performed
461 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
462 const BranchProbability &Prediction) const {
464 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
467 if (TrueBBI.IsBrAnalyzable)
470 if (TrueBBI.BB->pred_size() > 1) {
471 if (TrueBBI.CannotBeCopied ||
472 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
475 Dups = TrueBBI.NonPredSize;
481 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
482 /// with their common predecessor) forms a valid triangle shape for ifcvt.
483 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
484 /// branches to the 'false' block rather than the other way around. It also
485 /// returns the number of instructions that the ifcvt would need to duplicate
486 /// if performed in 'Dups'.
487 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
488 bool FalseBranch, unsigned &Dups,
489 const BranchProbability &Prediction) const {
491 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
494 if (TrueBBI.BB->pred_size() > 1) {
495 if (TrueBBI.CannotBeCopied)
498 unsigned Size = TrueBBI.NonPredSize;
499 if (TrueBBI.IsBrAnalyzable) {
500 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
501 // Ends with an unconditional branch. It will be removed.
504 MachineBasicBlock *FExit = FalseBranch
505 ? TrueBBI.TrueBB : TrueBBI.FalseBB;
507 // Require a conditional branch
511 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
516 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
517 if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
518 MachineFunction::iterator I = TrueBBI.BB;
519 if (++I == TrueBBI.BB->getParent()->end())
523 return TExit && TExit == FalseBBI.BB;
526 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
527 /// with their common predecessor) forms a valid diamond shape for ifcvt.
528 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
529 unsigned &Dups1, unsigned &Dups2) const {
531 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
532 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
535 MachineBasicBlock *TT = TrueBBI.TrueBB;
536 MachineBasicBlock *FT = FalseBBI.TrueBB;
538 if (!TT && blockAlwaysFallThrough(TrueBBI))
539 TT = getNextBlock(TrueBBI.BB);
540 if (!FT && blockAlwaysFallThrough(FalseBBI))
541 FT = getNextBlock(FalseBBI.BB);
544 if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
546 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
549 // FIXME: Allow true block to have an early exit?
550 if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
551 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
554 // Count duplicate instructions at the beginning of the true and false blocks.
555 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
556 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
557 MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
558 MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
559 while (TIB != TIE && FIB != FIE) {
560 // Skip dbg_value instructions. These do not count.
561 if (TIB->isDebugValue()) {
562 while (TIB != TIE && TIB->isDebugValue())
567 if (FIB->isDebugValue()) {
568 while (FIB != FIE && FIB->isDebugValue())
573 if (!TIB->isIdenticalTo(FIB))
580 // Now, in preparation for counting duplicate instructions at the ends of the
581 // blocks, move the end iterators up past any branch instructions.
584 if (!TIE->isBranch())
589 if (!FIE->isBranch())
593 // If Dups1 includes all of a block, then don't count duplicate
594 // instructions at the end of the blocks.
595 if (TIB == TIE || FIB == FIE)
598 // Count duplicate instructions at the ends of the blocks.
599 while (TIE != TIB && FIE != FIB) {
600 // Skip dbg_value instructions. These do not count.
601 if (TIE->isDebugValue()) {
602 while (TIE != TIB && TIE->isDebugValue())
607 if (FIE->isDebugValue()) {
608 while (FIE != FIB && FIE->isDebugValue())
613 if (!TIE->isIdenticalTo(FIE))
623 /// ScanInstructions - Scan all the instructions in the block to determine if
624 /// the block is predicable. In most cases, that means all the instructions
625 /// in the block are isPredicable(). Also checks if the block contains any
626 /// instruction which can clobber a predicate (e.g. condition code register).
627 /// If so, the block is not predicable unless it's the last instruction.
628 void IfConverter::ScanInstructions(BBInfo &BBI) {
632 bool AlreadyPredicated = !BBI.Predicate.empty();
633 // First analyze the end of BB branches.
634 BBI.TrueBB = BBI.FalseBB = NULL;
637 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
638 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
640 if (BBI.BrCond.size()) {
641 // No false branch. This BB must end with a conditional branch and a
644 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
646 // Malformed bcc? True and false blocks are the same?
647 BBI.IsUnpredicable = true;
652 // Then scan all the instructions.
656 BBI.ClobbersPred = false;
657 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
659 if (I->isDebugValue())
662 if (I->isNotDuplicable())
663 BBI.CannotBeCopied = true;
665 bool isPredicated = TII->isPredicated(I);
666 bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
671 unsigned ExtraPredCost = 0;
672 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I,
675 BBI.ExtraCost += NumCycles-1;
676 BBI.ExtraCost2 += ExtraPredCost;
677 } else if (!AlreadyPredicated) {
678 // FIXME: This instruction is already predicated before the
679 // if-conversion pass. It's probably something like a conditional move.
680 // Mark this block unpredicable for now.
681 BBI.IsUnpredicable = true;
686 if (BBI.ClobbersPred && !isPredicated) {
687 // Predicate modification instruction should end the block (except for
688 // already predicated instructions and end of block branches).
690 // A conditional branch is not predicable, but it may be eliminated.
694 // Predicate may have been modified, the subsequent (currently)
695 // unpredicated instructions cannot be correctly predicated.
696 BBI.IsUnpredicable = true;
700 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
701 // still potentially predicable.
702 std::vector<MachineOperand> PredDefs;
703 if (TII->DefinesPredicate(I, PredDefs))
704 BBI.ClobbersPred = true;
706 if (!TII->isPredicable(I)) {
707 BBI.IsUnpredicable = true;
713 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
714 /// predicated by the specified predicate.
715 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
716 SmallVectorImpl<MachineOperand> &Pred,
717 bool isTriangle, bool RevBranch) {
718 // If the block is dead or unpredicable, then it cannot be predicated.
719 if (BBI.IsDone || BBI.IsUnpredicable)
722 // If it is already predicated, check if its predicate subsumes the new
724 if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
727 if (BBI.BrCond.size()) {
731 // Test predicate subsumption.
732 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
733 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
735 if (TII->ReverseBranchCondition(Cond))
738 if (TII->ReverseBranchCondition(RevPred) ||
739 !TII->SubsumesPredicate(Cond, RevPred))
746 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
747 /// the specified block. Record its successors and whether it looks like an
748 /// if-conversion candidate.
749 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
750 std::vector<IfcvtToken*> &Tokens) {
751 BBInfo &BBI = BBAnalysis[BB->getNumber()];
753 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
757 BBI.IsBeingAnalyzed = true;
759 ScanInstructions(BBI);
761 // Unanalyzable or ends with fallthrough or unconditional branch, or if is not
762 // considered for ifcvt anymore.
763 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
764 BBI.IsBeingAnalyzed = false;
765 BBI.IsAnalyzed = true;
769 // Do not ifcvt if either path is a back edge to the entry block.
770 if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
771 BBI.IsBeingAnalyzed = false;
772 BBI.IsAnalyzed = true;
776 // Do not ifcvt if true and false fallthrough blocks are the same.
778 BBI.IsBeingAnalyzed = false;
779 BBI.IsAnalyzed = true;
783 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
784 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
786 if (TrueBBI.IsDone && FalseBBI.IsDone) {
787 BBI.IsBeingAnalyzed = false;
788 BBI.IsAnalyzed = true;
792 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
793 bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
797 bool TNeedSub = !TrueBBI.Predicate.empty();
798 bool FNeedSub = !FalseBBI.Predicate.empty();
799 bool Enqueued = false;
801 BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
803 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
804 MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
805 TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
806 *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
807 FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
809 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
810 FeasibilityAnalysis(FalseBBI, RevCond)) {
818 // Note TailBB can be empty.
819 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
824 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
825 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
826 TrueBBI.ExtraCost2, Prediction) &&
827 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
835 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
839 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
840 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
841 TrueBBI.ExtraCost2, Prediction) &&
842 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
843 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
847 if (ValidSimple(TrueBBI, Dups, Prediction) &&
848 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
849 TrueBBI.ExtraCost2, Prediction) &&
850 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
851 // Simple (split, no rejoin):
858 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
863 // Try the other path...
864 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
865 Prediction.getCompl()) &&
866 MeetIfcvtSizeLimit(*FalseBBI.BB,
867 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
868 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
869 FeasibilityAnalysis(FalseBBI, RevCond, true)) {
870 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
874 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
875 Prediction.getCompl()) &&
876 MeetIfcvtSizeLimit(*FalseBBI.BB,
877 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
878 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
879 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
880 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
884 if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
885 MeetIfcvtSizeLimit(*FalseBBI.BB,
886 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
887 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
888 FeasibilityAnalysis(FalseBBI, RevCond)) {
889 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
894 BBI.IsEnqueued = Enqueued;
895 BBI.IsBeingAnalyzed = false;
896 BBI.IsAnalyzed = true;
900 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
902 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
903 std::vector<IfcvtToken*> &Tokens) {
904 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
905 MachineBasicBlock *BB = I;
906 AnalyzeBlock(BB, Tokens);
909 // Sort to favor more complex ifcvt scheme.
910 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
913 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
914 /// that all the intervening blocks are empty (given BB can fall through to its
916 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
917 MachineFunction::iterator PI = BB;
918 MachineFunction::iterator I = llvm::next(PI);
919 MachineFunction::iterator TI = ToBB;
920 MachineFunction::iterator E = BB->getParent()->end();
922 // Check isSuccessor to avoid case where the next block is empty, but
923 // it's not a successor.
924 if (I == E || !I->empty() || !PI->isSuccessor(I))
931 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
932 /// to determine if it can be if-converted. If predecessor is already enqueued,
934 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
935 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
936 E = BB->pred_end(); PI != E; ++PI) {
937 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
938 if (PBBI.IsDone || PBBI.BB == BB)
940 PBBI.IsAnalyzed = false;
941 PBBI.IsEnqueued = false;
945 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
947 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
948 const TargetInstrInfo *TII) {
949 DebugLoc dl; // FIXME: this is nowhere
950 SmallVector<MachineOperand, 0> NoCond;
951 TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
954 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
956 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
957 MachineBasicBlock *TBB = NULL, *FBB = NULL;
958 SmallVector<MachineOperand, 4> Cond;
959 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
960 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
963 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are
964 /// modeled as read + write (sort like two-address instructions). These
965 /// routines track register liveness and add implicit uses to if-converted
966 /// instructions to conform to the model.
967 static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs,
968 const TargetRegisterInfo *TRI) {
969 for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
970 E = BB->livein_end(); I != E; ++I) {
973 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
974 Redefs.insert(*SubRegs);
978 static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
979 const TargetRegisterInfo *TRI,
980 bool AddImpUse = false) {
981 SmallVector<unsigned, 4> Defs;
982 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
983 const MachineOperand &MO = MI->getOperand(i);
986 unsigned Reg = MO.getReg();
991 else if (MO.isKill()) {
993 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
994 Redefs.erase(*SubRegs);
997 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
998 unsigned Reg = Defs[i];
999 if (!Redefs.insert(Reg)) {
1001 // Treat predicated update as read + write.
1002 MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
1003 true/*IsImp*/,false/*IsKill*/,
1004 false/*IsDead*/,true/*IsUndef*/));
1006 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1007 Redefs.insert(*SubRegs);
1012 static void UpdatePredRedefs(MachineBasicBlock::iterator I,
1013 MachineBasicBlock::iterator E,
1014 SmallSet<unsigned,4> &Redefs,
1015 const TargetRegisterInfo *TRI) {
1017 UpdatePredRedefs(I, Redefs, TRI);
1022 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1024 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1025 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1026 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1027 BBInfo *CvtBBI = &TrueBBI;
1028 BBInfo *NextBBI = &FalseBBI;
1030 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1031 if (Kind == ICSimpleFalse)
1032 std::swap(CvtBBI, NextBBI);
1034 if (CvtBBI->IsDone ||
1035 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1036 // Something has changed. It's no longer safe to predicate this block.
1037 BBI.IsAnalyzed = false;
1038 CvtBBI->IsAnalyzed = false;
1042 if (Kind == ICSimpleFalse)
1043 if (TII->ReverseBranchCondition(Cond))
1044 llvm_unreachable("Unable to reverse branch condition!");
1046 // Initialize liveins to the first BB. These are potentiall redefined by
1047 // predicated instructions.
1048 SmallSet<unsigned, 4> Redefs;
1049 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1050 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1052 if (CvtBBI->BB->pred_size() > 1) {
1053 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1054 // Copy instructions in the true block, predicate them, and add them to
1056 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs);
1058 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1060 // Merge converted block into entry block.
1061 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1062 MergeBlocks(BBI, *CvtBBI);
1065 bool IterIfcvt = true;
1066 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1067 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1068 BBI.HasFallThrough = false;
1069 // Now ifcvt'd block will look like this:
1076 // We cannot further ifcvt this block because the unconditional branch
1077 // will have to be predicated on the new condition, that will not be
1078 // available if cmp executes.
1082 RemoveExtraEdges(BBI);
1084 // Update block info. BB can be iteratively if-converted.
1087 InvalidatePreds(BBI.BB);
1088 CvtBBI->IsDone = true;
1090 // FIXME: Must maintain LiveIns.
1094 /// IfConvertTriangle - If convert a triangle sub-CFG.
1096 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1097 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1098 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1099 BBInfo *CvtBBI = &TrueBBI;
1100 BBInfo *NextBBI = &FalseBBI;
1101 DebugLoc dl; // FIXME: this is nowhere
1103 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1104 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1105 std::swap(CvtBBI, NextBBI);
1107 if (CvtBBI->IsDone ||
1108 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1109 // Something has changed. It's no longer safe to predicate this block.
1110 BBI.IsAnalyzed = false;
1111 CvtBBI->IsAnalyzed = false;
1115 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1116 if (TII->ReverseBranchCondition(Cond))
1117 llvm_unreachable("Unable to reverse branch condition!");
1119 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1120 if (ReverseBranchCondition(*CvtBBI)) {
1121 // BB has been changed, modify its predecessors (except for this
1122 // one) so they don't get ifcvt'ed based on bad intel.
1123 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1124 E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1125 MachineBasicBlock *PBB = *PI;
1128 BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1129 if (PBBI.IsEnqueued) {
1130 PBBI.IsAnalyzed = false;
1131 PBBI.IsEnqueued = false;
1137 // Initialize liveins to the first BB. These are potentially redefined by
1138 // predicated instructions.
1139 SmallSet<unsigned, 4> Redefs;
1140 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1141 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1143 bool HasEarlyExit = CvtBBI->FalseBB != NULL;
1144 if (CvtBBI->BB->pred_size() > 1) {
1145 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1146 // Copy instructions in the true block, predicate them, and add them to
1148 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true);
1150 // Predicate the 'true' block after removing its branch.
1151 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1152 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1154 // Now merge the entry of the triangle with the true block.
1155 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1156 MergeBlocks(BBI, *CvtBBI, false);
1159 // If 'true' block has a 'false' successor, add an exit branch to it.
1161 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1162 CvtBBI->BrCond.end());
1163 if (TII->ReverseBranchCondition(RevCond))
1164 llvm_unreachable("Unable to reverse branch condition!");
1165 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
1166 BBI.BB->addSuccessor(CvtBBI->FalseBB);
1169 // Merge in the 'false' block if the 'false' block has no other
1170 // predecessors. Otherwise, add an unconditional branch to 'false'.
1171 bool FalseBBDead = false;
1172 bool IterIfcvt = true;
1173 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1174 if (!isFallThrough) {
1175 // Only merge them if the true block does not fallthrough to the false
1176 // block. By not merging them, we make it possible to iteratively
1177 // ifcvt the blocks.
1178 if (!HasEarlyExit &&
1179 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) {
1180 MergeBlocks(BBI, *NextBBI);
1183 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1184 BBI.HasFallThrough = false;
1186 // Mixed predicated and unpredicated code. This cannot be iteratively
1191 RemoveExtraEdges(BBI);
1193 // Update block info. BB can be iteratively if-converted.
1196 InvalidatePreds(BBI.BB);
1197 CvtBBI->IsDone = true;
1199 NextBBI->IsDone = true;
1201 // FIXME: Must maintain LiveIns.
1205 /// IfConvertDiamond - If convert a diamond sub-CFG.
1207 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1208 unsigned NumDups1, unsigned NumDups2) {
1209 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1210 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1211 MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1212 // True block must fall through or end with an unanalyzable terminator.
1214 if (blockAlwaysFallThrough(TrueBBI))
1215 TailBB = FalseBBI.TrueBB;
1216 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1219 if (TrueBBI.IsDone || FalseBBI.IsDone ||
1220 TrueBBI.BB->pred_size() > 1 ||
1221 FalseBBI.BB->pred_size() > 1) {
1222 // Something has changed. It's no longer safe to predicate these blocks.
1223 BBI.IsAnalyzed = false;
1224 TrueBBI.IsAnalyzed = false;
1225 FalseBBI.IsAnalyzed = false;
1229 // Put the predicated instructions from the 'true' block before the
1230 // instructions from the 'false' block, unless the true block would clobber
1231 // the predicate, in which case, do the opposite.
1232 BBInfo *BBI1 = &TrueBBI;
1233 BBInfo *BBI2 = &FalseBBI;
1234 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1235 if (TII->ReverseBranchCondition(RevCond))
1236 llvm_unreachable("Unable to reverse branch condition!");
1237 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1238 SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1240 // Figure out the more profitable ordering.
1241 bool DoSwap = false;
1242 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1244 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1245 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1249 std::swap(BBI1, BBI2);
1250 std::swap(Cond1, Cond2);
1253 // Remove the conditional branch from entry to the blocks.
1254 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1256 // Initialize liveins to the first BB. These are potentially redefined by
1257 // predicated instructions.
1258 SmallSet<unsigned, 4> Redefs;
1259 InitPredRedefs(BBI1->BB, Redefs, TRI);
1261 // Remove the duplicated instructions at the beginnings of both paths.
1262 MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1263 MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1264 MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1265 MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1266 // Skip dbg_value instructions
1267 while (DI1 != DIE1 && DI1->isDebugValue())
1269 while (DI2 != DIE2 && DI2->isDebugValue())
1271 BBI1->NonPredSize -= NumDups1;
1272 BBI2->NonPredSize -= NumDups1;
1274 // Skip past the dups on each side separately since there may be
1275 // differing dbg_value entries.
1276 for (unsigned i = 0; i < NumDups1; ++DI1) {
1277 if (!DI1->isDebugValue())
1280 while (NumDups1 != 0) {
1282 if (!DI2->isDebugValue())
1286 UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI);
1287 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1288 BBI2->BB->erase(BBI2->BB->begin(), DI2);
1290 // Remove branch from 'true' block and remove duplicated instructions.
1291 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1292 DI1 = BBI1->BB->end();
1293 for (unsigned i = 0; i != NumDups2; ) {
1294 // NumDups2 only counted non-dbg_value instructions, so this won't
1295 // run off the head of the list.
1296 assert (DI1 != BBI1->BB->begin());
1298 // skip dbg_value instructions
1299 if (!DI1->isDebugValue())
1302 BBI1->BB->erase(DI1, BBI1->BB->end());
1304 // Remove 'false' block branch and find the last instruction to predicate.
1305 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1306 DI2 = BBI2->BB->end();
1307 while (NumDups2 != 0) {
1308 // NumDups2 only counted non-dbg_value instructions, so this won't
1309 // run off the head of the list.
1310 assert (DI2 != BBI2->BB->begin());
1312 // skip dbg_value instructions
1313 if (!DI2->isDebugValue())
1317 // Remember which registers would later be defined by the false block.
1318 // This allows us not to predicate instructions in the true block that would
1319 // later be re-defined. That is, rather than
1325 SmallSet<unsigned, 4> RedefsByFalse;
1326 SmallSet<unsigned, 4> ExtUses;
1327 if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
1328 for (MachineBasicBlock::iterator FI = BBI2->BB->begin(); FI != DI2; ++FI) {
1329 if (FI->isDebugValue())
1331 SmallVector<unsigned, 4> Defs;
1332 for (unsigned i = 0, e = FI->getNumOperands(); i != e; ++i) {
1333 const MachineOperand &MO = FI->getOperand(i);
1336 unsigned Reg = MO.getReg();
1340 Defs.push_back(Reg);
1341 } else if (!RedefsByFalse.count(Reg)) {
1342 // These are defined before ctrl flow reach the 'false' instructions.
1343 // They cannot be modified by the 'true' instructions.
1344 ExtUses.insert(Reg);
1345 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1346 ExtUses.insert(*SubRegs);
1350 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1351 unsigned Reg = Defs[i];
1352 if (!ExtUses.count(Reg)) {
1353 RedefsByFalse.insert(Reg);
1354 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1355 RedefsByFalse.insert(*SubRegs);
1361 // Predicate the 'true' block.
1362 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs, &RedefsByFalse);
1364 // Predicate the 'false' block.
1365 PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
1367 // Merge the true block into the entry of the diamond.
1368 MergeBlocks(BBI, *BBI1, TailBB == 0);
1369 MergeBlocks(BBI, *BBI2, TailBB == 0);
1371 // If the if-converted block falls through or unconditionally branches into
1372 // the tail block, and the tail block does not have other predecessors, then
1373 // fold the tail block in as well. Otherwise, unless it falls through to the
1374 // tail, add a unconditional branch to it.
1376 BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
1377 bool CanMergeTail = !TailBBI.HasFallThrough;
1378 // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1379 // check if there are any other predecessors besides those.
1380 unsigned NumPreds = TailBB->pred_size();
1382 CanMergeTail = false;
1383 else if (NumPreds == 1 && CanMergeTail) {
1384 MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1385 if (*PI != BBI1->BB && *PI != BBI2->BB)
1386 CanMergeTail = false;
1389 MergeBlocks(BBI, TailBBI);
1390 TailBBI.IsDone = true;
1392 BBI.BB->addSuccessor(TailBB);
1393 InsertUncondBranch(BBI.BB, TailBB, TII);
1394 BBI.HasFallThrough = false;
1398 // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1399 // which can happen here if TailBB is unanalyzable and is merged, so
1400 // explicitly remove BBI1 and BBI2 as successors.
1401 BBI.BB->removeSuccessor(BBI1->BB);
1402 BBI.BB->removeSuccessor(BBI2->BB);
1403 RemoveExtraEdges(BBI);
1405 // Update block info.
1406 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1407 InvalidatePreds(BBI.BB);
1409 // FIXME: Must maintain LiveIns.
1413 static bool MaySpeculate(const MachineInstr *MI,
1414 SmallSet<unsigned, 4> &LaterRedefs,
1415 const TargetInstrInfo *TII) {
1416 bool SawStore = true;
1417 if (!MI->isSafeToMove(TII, 0, SawStore))
1420 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
1421 const MachineOperand &MO = MI->getOperand(i);
1424 unsigned Reg = MO.getReg();
1427 if (MO.isDef() && !LaterRedefs.count(Reg))
1434 /// PredicateBlock - Predicate instructions from the start of the block to the
1435 /// specified end with the specified condition.
1436 void IfConverter::PredicateBlock(BBInfo &BBI,
1437 MachineBasicBlock::iterator E,
1438 SmallVectorImpl<MachineOperand> &Cond,
1439 SmallSet<unsigned, 4> &Redefs,
1440 SmallSet<unsigned, 4> *LaterRedefs) {
1441 bool AnyUnpred = false;
1442 bool MaySpec = LaterRedefs != 0;
1443 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1444 if (I->isDebugValue() || TII->isPredicated(I))
1446 // It may be possible not to predicate an instruction if it's the 'true'
1447 // side of a diamond and the 'false' side may re-define the instruction's
1449 if (MaySpec && MaySpeculate(I, *LaterRedefs, TII)) {
1453 // If any instruction is predicated, then every instruction after it must
1456 if (!TII->PredicateInstruction(I, Cond)) {
1458 dbgs() << "Unable to predicate " << *I << "!\n";
1460 llvm_unreachable(0);
1463 // If the predicated instruction now redefines a register as the result of
1464 // if-conversion, add an implicit kill.
1465 UpdatePredRedefs(I, Redefs, TRI, true);
1468 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
1470 BBI.IsAnalyzed = false;
1471 BBI.NonPredSize = 0;
1478 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1479 /// the destination block. Skip end of block branches if IgnoreBr is true.
1480 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1481 SmallVectorImpl<MachineOperand> &Cond,
1482 SmallSet<unsigned, 4> &Redefs,
1484 MachineFunction &MF = *ToBBI.BB->getParent();
1486 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1487 E = FromBBI.BB->end(); I != E; ++I) {
1488 // Do not copy the end of the block branches.
1489 if (IgnoreBr && I->isBranch())
1492 MachineInstr *MI = MF.CloneMachineInstr(I);
1493 ToBBI.BB->insert(ToBBI.BB->end(), MI);
1494 ToBBI.NonPredSize++;
1495 unsigned ExtraPredCost = 0;
1496 unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, &ExtraPredCost);
1498 ToBBI.ExtraCost += NumCycles-1;
1499 ToBBI.ExtraCost2 += ExtraPredCost;
1501 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1502 if (!TII->PredicateInstruction(MI, Cond)) {
1504 dbgs() << "Unable to predicate " << *I << "!\n";
1506 llvm_unreachable(0);
1510 // If the predicated instruction now redefines a register as the result of
1511 // if-conversion, add an implicit kill.
1512 UpdatePredRedefs(MI, Redefs, TRI, true);
1516 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1517 FromBBI.BB->succ_end());
1518 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1519 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1521 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1522 MachineBasicBlock *Succ = Succs[i];
1523 // Fallthrough edge can't be transferred.
1524 if (Succ == FallThrough)
1526 ToBBI.BB->addSuccessor(Succ);
1530 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1531 std::back_inserter(ToBBI.Predicate));
1532 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
1534 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1535 ToBBI.IsAnalyzed = false;
1540 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1541 /// This will leave FromBB as an empty block, so remove all of its
1542 /// successor edges except for the fall-through edge. If AddEdges is true,
1543 /// i.e., when FromBBI's branch is being moved, add those successor edges to
1545 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1546 ToBBI.BB->splice(ToBBI.BB->end(),
1547 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1549 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1550 FromBBI.BB->succ_end());
1551 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1552 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1554 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1555 MachineBasicBlock *Succ = Succs[i];
1556 // Fallthrough edge can't be transferred.
1557 if (Succ == FallThrough)
1559 FromBBI.BB->removeSuccessor(Succ);
1561 ToBBI.BB->addSuccessor(Succ);
1564 // Now FromBBI always falls through to the next block!
1565 if (NBB && !FromBBI.BB->isSuccessor(NBB))
1566 FromBBI.BB->addSuccessor(NBB);
1568 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1569 std::back_inserter(ToBBI.Predicate));
1570 FromBBI.Predicate.clear();
1572 ToBBI.NonPredSize += FromBBI.NonPredSize;
1573 ToBBI.ExtraCost += FromBBI.ExtraCost;
1574 ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
1575 FromBBI.NonPredSize = 0;
1576 FromBBI.ExtraCost = 0;
1577 FromBBI.ExtraCost2 = 0;
1579 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1580 ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1581 ToBBI.IsAnalyzed = false;
1582 FromBBI.IsAnalyzed = false;