1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level if-conversion pass.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "ifcvt"
15 #include "BranchFolding.h"
16 #include "llvm/Function.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/Target/TargetInstrInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/ADT/DepthFirstIterator.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
33 // Hidden options for help debugging.
34 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
35 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
36 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
37 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
38 cl::init(false), cl::Hidden);
39 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
40 cl::init(false), cl::Hidden);
41 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
42 cl::init(false), cl::Hidden);
43 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
44 cl::init(false), cl::Hidden);
45 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
46 cl::init(false), cl::Hidden);
47 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
48 cl::init(false), cl::Hidden);
49 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
50 cl::init(false), cl::Hidden);
51 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
52 cl::init(true), cl::Hidden);
54 STATISTIC(NumSimple, "Number of simple if-conversions performed");
55 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
56 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
57 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
58 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
59 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
60 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
61 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
62 STATISTIC(NumDupBBs, "Number of duplicated blocks");
65 class IfConverter : public MachineFunctionPass {
67 ICNotClassfied, // BB data valid, but not classified.
68 ICSimpleFalse, // Same as ICSimple, but on the false path.
69 ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
70 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
71 ICTriangleRev, // Same as ICTriangle, but true path rev condition.
72 ICTriangleFalse, // Same as ICTriangle, but on the false path.
73 ICTriangle, // BB is entry of a triangle sub-CFG.
74 ICDiamond // BB is entry of a diamond sub-CFG.
77 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
78 /// if-conversion feasibility analysis. This includes results from
79 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
80 /// classification, and common tail block of its successors (if it's a
81 /// diamond shape), its size, whether it's predicable, and whether any
82 /// instruction can clobber the 'would-be' predicate.
84 /// IsDone - True if BB is not to be considered for ifcvt.
85 /// IsBeingAnalyzed - True if BB is currently being analyzed.
86 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
87 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
88 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
89 /// HasFallThrough - True if BB may fallthrough to the following BB.
90 /// IsUnpredicable - True if BB is known to be unpredicable.
91 /// ClobbersPred - True if BB could modify predicates (e.g. has
93 /// NonPredSize - Number of non-predicated instructions.
94 /// BB - Corresponding MachineBasicBlock.
95 /// TrueBB / FalseBB- See AnalyzeBranch().
96 /// BrCond - Conditions for end of block conditional branches.
97 /// Predicate - Predicate used in the BB.
100 bool IsBeingAnalyzed : 1;
103 bool IsBrAnalyzable : 1;
104 bool HasFallThrough : 1;
105 bool IsUnpredicable : 1;
106 bool CannotBeCopied : 1;
107 bool ClobbersPred : 1;
108 unsigned NonPredSize;
109 MachineBasicBlock *BB;
110 MachineBasicBlock *TrueBB;
111 MachineBasicBlock *FalseBB;
112 SmallVector<MachineOperand, 4> BrCond;
113 SmallVector<MachineOperand, 4> Predicate;
114 BBInfo() : IsDone(false), IsBeingAnalyzed(false),
115 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
116 HasFallThrough(false), IsUnpredicable(false),
117 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
118 BB(0), TrueBB(0), FalseBB(0) {}
121 /// IfcvtToken - Record information about pending if-conversions to attempt:
122 /// BBI - Corresponding BBInfo.
123 /// Kind - Type of block. See IfcvtKind.
124 /// NeedSubsumption - True if the to-be-predicated BB has already been
126 /// NumDups - Number of instructions that would be duplicated due
127 /// to this if-conversion. (For diamonds, the number of
128 /// identical instructions at the beginnings of both
130 /// NumDups2 - For diamonds, the number of identical instructions
131 /// at the ends of both paths.
135 bool NeedSubsumption;
138 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
139 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
142 /// Roots - Basic blocks that do not have successors. These are the starting
143 /// points of Graph traversal.
144 std::vector<MachineBasicBlock*> Roots;
146 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
147 /// basic block number.
148 std::vector<BBInfo> BBAnalysis;
150 const TargetLowering *TLI;
151 const TargetInstrInfo *TII;
152 const TargetRegisterInfo *TRI;
157 IfConverter() : MachineFunctionPass(&ID), FnNum(-1) {}
159 virtual bool runOnMachineFunction(MachineFunction &MF);
160 virtual const char *getPassName() const { return "If Converter"; }
163 bool ReverseBranchCondition(BBInfo &BBI);
164 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups) const;
165 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
166 bool FalseBranch, unsigned &Dups) const;
167 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
168 unsigned &Dups1, unsigned &Dups2) const;
169 void ScanInstructions(BBInfo &BBI);
170 BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
171 std::vector<IfcvtToken*> &Tokens);
172 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
173 bool isTriangle = false, bool RevBranch = false);
174 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
175 void InvalidatePreds(MachineBasicBlock *BB);
176 void RemoveExtraEdges(BBInfo &BBI);
177 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
178 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
179 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
180 unsigned NumDups1, unsigned NumDups2);
181 void PredicateBlock(BBInfo &BBI,
182 MachineBasicBlock::iterator E,
183 SmallVectorImpl<MachineOperand> &Cond,
184 SmallSet<unsigned, 4> &Redefs);
185 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
186 SmallVectorImpl<MachineOperand> &Cond,
187 SmallSet<unsigned, 4> &Redefs,
188 bool IgnoreBr = false);
189 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI);
191 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB, unsigned Size) const {
192 return Size > 0 && TII->isProfitableToIfCvt(BB, Size);
195 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB, unsigned TSize,
196 MachineBasicBlock &FBB, unsigned FSize) const {
197 return TSize > 0 && FSize > 0 &&
198 TII->isProfitableToIfCvt(TBB, TSize, FBB, FSize);
201 // blockAlwaysFallThrough - Block ends without a terminator.
202 bool blockAlwaysFallThrough(BBInfo &BBI) const {
203 return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
206 // IfcvtTokenCmp - Used to sort if-conversion candidates.
207 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
208 int Incr1 = (C1->Kind == ICDiamond)
209 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
210 int Incr2 = (C2->Kind == ICDiamond)
211 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
214 else if (Incr1 == Incr2) {
215 // Favors subsumption.
216 if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
218 else if (C1->NeedSubsumption == C2->NeedSubsumption) {
219 // Favors diamond over triangle, etc.
220 if ((unsigned)C1->Kind < (unsigned)C2->Kind)
222 else if (C1->Kind == C2->Kind)
223 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
230 char IfConverter::ID = 0;
233 static RegisterPass<IfConverter>
234 X("if-converter", "If Converter");
236 FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
238 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
239 TLI = MF.getTarget().getTargetLowering();
240 TII = MF.getTarget().getInstrInfo();
241 TRI = MF.getTarget().getRegisterInfo();
242 if (!TII) return false;
244 // Tail merge tend to expose more if-conversion opportunities.
245 BranchFolder BF(true);
246 bool BFChange = BF.OptimizeFunction(MF, TII,
247 MF.getTarget().getRegisterInfo(),
248 getAnalysisIfAvailable<MachineModuleInfo>());
250 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
251 << MF.getFunction()->getName() << "\'");
253 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
254 DEBUG(dbgs() << " skipped\n");
257 DEBUG(dbgs() << "\n");
260 BBAnalysis.resize(MF.getNumBlockIDs());
262 // Look for root nodes, i.e. blocks without successors.
263 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
267 std::vector<IfcvtToken*> Tokens;
269 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
270 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
271 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
272 // Do an initial analysis for each basic block and find all the potential
273 // candidates to perform if-conversion.
275 AnalyzeBlocks(MF, Tokens);
276 while (!Tokens.empty()) {
277 IfcvtToken *Token = Tokens.back();
279 BBInfo &BBI = Token->BBI;
280 IfcvtKind Kind = Token->Kind;
281 unsigned NumDups = Token->NumDups;
282 unsigned NumDups2 = Token->NumDups2;
286 // If the block has been evicted out of the queue or it has already been
287 // marked dead (due to it being predicated), then skip it.
289 BBI.IsEnqueued = false;
293 BBI.IsEnqueued = false;
297 default: assert(false && "Unexpected!");
300 case ICSimpleFalse: {
301 bool isFalse = Kind == ICSimpleFalse;
302 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
303 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
305 << "): BB#" << BBI.BB->getNumber() << " ("
306 << ((Kind == ICSimpleFalse)
307 ? BBI.FalseBB->getNumber()
308 : BBI.TrueBB->getNumber()) << ") ");
309 RetVal = IfConvertSimple(BBI, Kind);
310 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
312 if (isFalse) ++NumSimpleFalse;
319 case ICTriangleFalse:
320 case ICTriangleFRev: {
321 bool isFalse = Kind == ICTriangleFalse;
322 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
323 if (DisableTriangle && !isFalse && !isRev) break;
324 if (DisableTriangleR && !isFalse && isRev) break;
325 if (DisableTriangleF && isFalse && !isRev) break;
326 if (DisableTriangleFR && isFalse && isRev) break;
327 DEBUG(dbgs() << "Ifcvt (Triangle");
329 DEBUG(dbgs() << " false");
331 DEBUG(dbgs() << " rev");
332 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
333 << BBI.TrueBB->getNumber() << ",F:"
334 << BBI.FalseBB->getNumber() << ") ");
335 RetVal = IfConvertTriangle(BBI, Kind);
336 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
339 if (isRev) ++NumTriangleFRev;
340 else ++NumTriangleFalse;
342 if (isRev) ++NumTriangleRev;
349 if (DisableDiamond) break;
350 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
351 << BBI.TrueBB->getNumber() << ",F:"
352 << BBI.FalseBB->getNumber() << ") ");
353 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
354 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
355 if (RetVal) ++NumDiamonds;
362 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
363 NumTriangleFalse + NumTriangleFRev + NumDiamonds;
364 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
370 MadeChange |= Change;
373 // Delete tokens in case of early exit.
374 while (!Tokens.empty()) {
375 IfcvtToken *Token = Tokens.back();
384 if (MadeChange && IfCvtBranchFold) {
385 BranchFolder BF(false);
386 BF.OptimizeFunction(MF, TII,
387 MF.getTarget().getRegisterInfo(),
388 getAnalysisIfAvailable<MachineModuleInfo>());
391 MadeChange |= BFChange;
395 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
396 /// its 'true' successor.
397 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
398 MachineBasicBlock *TrueBB) {
399 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
400 E = BB->succ_end(); SI != E; ++SI) {
401 MachineBasicBlock *SuccBB = *SI;
402 if (SuccBB != TrueBB)
408 /// ReverseBranchCondition - Reverse the condition of the end of the block
409 /// branch. Swap block's 'true' and 'false' successors.
410 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
411 DebugLoc dl; // FIXME: this is nowhere
412 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
413 TII->RemoveBranch(*BBI.BB);
414 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
415 std::swap(BBI.TrueBB, BBI.FalseBB);
421 /// getNextBlock - Returns the next block in the function blocks ordering. If
422 /// it is the end, returns NULL.
423 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
424 MachineFunction::iterator I = BB;
425 MachineFunction::iterator E = BB->getParent()->end();
431 /// ValidSimple - Returns true if the 'true' block (along with its
432 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
433 /// number of instructions that the ifcvt would need to duplicate if performed
435 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups) const {
437 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
440 if (TrueBBI.IsBrAnalyzable)
443 if (TrueBBI.BB->pred_size() > 1) {
444 if (TrueBBI.CannotBeCopied ||
445 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize))
447 Dups = TrueBBI.NonPredSize;
453 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
454 /// with their common predecessor) forms a valid triangle shape for ifcvt.
455 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
456 /// branches to the 'false' block rather than the other way around. It also
457 /// returns the number of instructions that the ifcvt would need to duplicate
458 /// if performed in 'Dups'.
459 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
460 bool FalseBranch, unsigned &Dups) const {
462 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
465 if (TrueBBI.BB->pred_size() > 1) {
466 if (TrueBBI.CannotBeCopied)
469 unsigned Size = TrueBBI.NonPredSize;
470 if (TrueBBI.IsBrAnalyzable) {
471 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
472 // Ends with an unconditional branch. It will be removed.
475 MachineBasicBlock *FExit = FalseBranch
476 ? TrueBBI.TrueBB : TrueBBI.FalseBB;
478 // Require a conditional branch
482 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size))
487 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
488 if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
489 MachineFunction::iterator I = TrueBBI.BB;
490 if (++I == TrueBBI.BB->getParent()->end())
494 return TExit && TExit == FalseBBI.BB;
498 MachineBasicBlock::iterator firstNonBranchInst(MachineBasicBlock *BB,
499 const TargetInstrInfo *TII) {
500 MachineBasicBlock::iterator I = BB->end();
501 while (I != BB->begin()) {
503 if (!I->getDesc().isBranch())
509 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
510 /// with their common predecessor) forms a valid diamond shape for ifcvt.
511 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
512 unsigned &Dups1, unsigned &Dups2) const {
514 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
515 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
518 MachineBasicBlock *TT = TrueBBI.TrueBB;
519 MachineBasicBlock *FT = FalseBBI.TrueBB;
521 if (!TT && blockAlwaysFallThrough(TrueBBI))
522 TT = getNextBlock(TrueBBI.BB);
523 if (!FT && blockAlwaysFallThrough(FalseBBI))
524 FT = getNextBlock(FalseBBI.BB);
527 if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
529 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
532 // FIXME: Allow true block to have an early exit?
533 if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
534 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
537 MachineBasicBlock::iterator TI = TrueBBI.BB->begin();
538 MachineBasicBlock::iterator FI = FalseBBI.BB->begin();
539 MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
540 MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
541 // Skip dbg_value instructions
542 while (TI != TIE && TI->isDebugValue())
544 while (FI != FIE && FI->isDebugValue())
546 while (TI != TIE && FI != FIE) {
547 // Skip dbg_value instructions. These do not count.
548 if (TI->isDebugValue()) {
549 while (TI != TIE && TI->isDebugValue())
554 if (FI->isDebugValue()) {
555 while (FI != FIE && FI->isDebugValue())
560 if (!TI->isIdenticalTo(FI))
567 TI = firstNonBranchInst(TrueBBI.BB, TII);
568 FI = firstNonBranchInst(FalseBBI.BB, TII);
569 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
570 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
571 // Skip dbg_value instructions at end of the bb's.
572 while (TI != TIB && TI->isDebugValue())
574 while (FI != FIB && FI->isDebugValue())
576 while (TI != TIB && FI != FIB) {
577 // Skip dbg_value instructions. These do not count.
578 if (TI->isDebugValue()) {
579 while (TI != TIB && TI->isDebugValue())
584 if (FI->isDebugValue()) {
585 while (FI != FIB && FI->isDebugValue())
590 if (!TI->isIdenticalTo(FI))
600 /// ScanInstructions - Scan all the instructions in the block to determine if
601 /// the block is predicable. In most cases, that means all the instructions
602 /// in the block are isPredicable(). Also checks if the block contains any
603 /// instruction which can clobber a predicate (e.g. condition code register).
604 /// If so, the block is not predicable unless it's the last instruction.
605 void IfConverter::ScanInstructions(BBInfo &BBI) {
609 bool AlreadyPredicated = BBI.Predicate.size() > 0;
610 // First analyze the end of BB branches.
611 BBI.TrueBB = BBI.FalseBB = NULL;
614 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
615 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
617 if (BBI.BrCond.size()) {
618 // No false branch. This BB must end with a conditional branch and a
621 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
623 // Malformed bcc? True and false blocks are the same?
624 BBI.IsUnpredicable = true;
629 // Then scan all the instructions.
631 BBI.ClobbersPred = false;
632 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
634 if (I->isDebugValue())
637 const TargetInstrDesc &TID = I->getDesc();
638 if (TID.isNotDuplicable())
639 BBI.CannotBeCopied = true;
641 bool isPredicated = TII->isPredicated(I);
642 bool isCondBr = BBI.IsBrAnalyzable && TID.isConditionalBranch();
647 else if (!AlreadyPredicated) {
648 // FIXME: This instruction is already predicated before the
649 // if-conversion pass. It's probably something like a conditional move.
650 // Mark this block unpredicable for now.
651 BBI.IsUnpredicable = true;
656 if (BBI.ClobbersPred && !isPredicated) {
657 // Predicate modification instruction should end the block (except for
658 // already predicated instructions and end of block branches).
660 // A conditional branch is not predicable, but it may be eliminated.
664 // Predicate may have been modified, the subsequent (currently)
665 // unpredicated instructions cannot be correctly predicated.
666 BBI.IsUnpredicable = true;
670 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
671 // still potentially predicable.
672 std::vector<MachineOperand> PredDefs;
673 if (TII->DefinesPredicate(I, PredDefs))
674 BBI.ClobbersPred = true;
676 if (!TII->isPredicable(I)) {
677 BBI.IsUnpredicable = true;
683 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
684 /// predicated by the specified predicate.
685 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
686 SmallVectorImpl<MachineOperand> &Pred,
687 bool isTriangle, bool RevBranch) {
688 // If the block is dead or unpredicable, then it cannot be predicated.
689 if (BBI.IsDone || BBI.IsUnpredicable)
692 // If it is already predicated, check if its predicate subsumes the new
694 if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
697 if (BBI.BrCond.size()) {
701 // Test predicate subsumption.
702 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
703 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
705 if (TII->ReverseBranchCondition(Cond))
708 if (TII->ReverseBranchCondition(RevPred) ||
709 !TII->SubsumesPredicate(Cond, RevPred))
716 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
717 /// the specified block. Record its successors and whether it looks like an
718 /// if-conversion candidate.
719 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
720 std::vector<IfcvtToken*> &Tokens) {
721 BBInfo &BBI = BBAnalysis[BB->getNumber()];
723 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
727 BBI.IsBeingAnalyzed = true;
729 ScanInstructions(BBI);
731 // Unanalyzable or ends with fallthrough or unconditional branch.
732 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty()) {
733 BBI.IsBeingAnalyzed = false;
734 BBI.IsAnalyzed = true;
738 // Do not ifcvt if either path is a back edge to the entry block.
739 if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
740 BBI.IsBeingAnalyzed = false;
741 BBI.IsAnalyzed = true;
745 // Do not ifcvt if true and false fallthrough blocks are the same.
747 BBI.IsBeingAnalyzed = false;
748 BBI.IsAnalyzed = true;
752 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
753 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
755 if (TrueBBI.IsDone && FalseBBI.IsDone) {
756 BBI.IsBeingAnalyzed = false;
757 BBI.IsAnalyzed = true;
761 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
762 bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
766 bool TNeedSub = TrueBBI.Predicate.size() > 0;
767 bool FNeedSub = FalseBBI.Predicate.size() > 0;
768 bool Enqueued = false;
769 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
770 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize - (Dups + Dups2),
771 *FalseBBI.BB, FalseBBI.NonPredSize - (Dups + Dups2)) &&
772 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
773 FeasibilityAnalysis(FalseBBI, RevCond)) {
781 // Note TailBB can be empty.
782 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
787 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups) &&
788 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize) &&
789 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
797 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
801 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups) &&
802 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize) &&
803 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
804 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
808 if (ValidSimple(TrueBBI, Dups) &&
809 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize) &&
810 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
811 // Simple (split, no rejoin):
818 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
823 // Try the other path...
824 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups) &&
825 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize) &&
826 FeasibilityAnalysis(FalseBBI, RevCond, true)) {
827 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
831 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups) &&
832 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize) &&
833 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
834 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
838 if (ValidSimple(FalseBBI, Dups) &&
839 MeetIfcvtSizeLimit(*FalseBBI.BB, FalseBBI.NonPredSize) &&
840 FeasibilityAnalysis(FalseBBI, RevCond)) {
841 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
846 BBI.IsEnqueued = Enqueued;
847 BBI.IsBeingAnalyzed = false;
848 BBI.IsAnalyzed = true;
852 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
854 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
855 std::vector<IfcvtToken*> &Tokens) {
856 std::set<MachineBasicBlock*> Visited;
857 for (unsigned i = 0, e = Roots.size(); i != e; ++i) {
858 for (idf_ext_iterator<MachineBasicBlock*> I=idf_ext_begin(Roots[i],Visited),
859 E = idf_ext_end(Roots[i], Visited); I != E; ++I) {
860 MachineBasicBlock *BB = *I;
861 AnalyzeBlock(BB, Tokens);
865 // Sort to favor more complex ifcvt scheme.
866 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
869 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
870 /// that all the intervening blocks are empty (given BB can fall through to its
872 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
873 MachineFunction::iterator PI = BB;
874 MachineFunction::iterator I = llvm::next(PI);
875 MachineFunction::iterator TI = ToBB;
876 MachineFunction::iterator E = BB->getParent()->end();
878 // Check isSuccessor to avoid case where the next block is empty, but
879 // it's not a successor.
880 if (I == E || !I->empty() || !PI->isSuccessor(I))
887 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
888 /// to determine if it can be if-converted. If predecessor is already enqueued,
890 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
891 for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
892 E = BB->pred_end(); PI != E; ++PI) {
893 BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
894 if (PBBI.IsDone || PBBI.BB == BB)
896 PBBI.IsAnalyzed = false;
897 PBBI.IsEnqueued = false;
901 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
903 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
904 const TargetInstrInfo *TII) {
905 DebugLoc dl; // FIXME: this is nowhere
906 SmallVector<MachineOperand, 0> NoCond;
907 TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
910 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
912 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
913 MachineBasicBlock *TBB = NULL, *FBB = NULL;
914 SmallVector<MachineOperand, 4> Cond;
915 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
916 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
919 /// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are
920 /// modeled as read + write (sort like two-address instructions). These
921 /// routines track register liveness and add implicit uses to if-converted
922 /// instructions to conform to the model.
923 static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs,
924 const TargetRegisterInfo *TRI) {
925 for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
926 E = BB->livein_end(); I != E; ++I) {
929 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
931 Redefs.insert(*Subreg);
935 static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
936 const TargetRegisterInfo *TRI,
937 bool AddImpUse = false) {
938 SmallVector<unsigned, 4> Defs;
939 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
940 const MachineOperand &MO = MI->getOperand(i);
943 unsigned Reg = MO.getReg();
948 else if (MO.isKill()) {
950 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
954 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
955 unsigned Reg = Defs[i];
956 if (Redefs.count(Reg)) {
958 // Treat predicated update as read + write.
959 MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
960 true/*IsImp*/,false/*IsKill*/));
963 for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
969 static void UpdatePredRedefs(MachineBasicBlock::iterator I,
970 MachineBasicBlock::iterator E,
971 SmallSet<unsigned,4> &Redefs,
972 const TargetRegisterInfo *TRI) {
974 UpdatePredRedefs(I, Redefs, TRI);
979 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
981 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
982 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
983 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
984 BBInfo *CvtBBI = &TrueBBI;
985 BBInfo *NextBBI = &FalseBBI;
987 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
988 if (Kind == ICSimpleFalse)
989 std::swap(CvtBBI, NextBBI);
991 if (CvtBBI->IsDone ||
992 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
993 // Something has changed. It's no longer safe to predicate this block.
994 BBI.IsAnalyzed = false;
995 CvtBBI->IsAnalyzed = false;
999 if (Kind == ICSimpleFalse)
1000 if (TII->ReverseBranchCondition(Cond))
1001 assert(false && "Unable to reverse branch condition!");
1003 // Initialize liveins to the first BB. These are potentiall redefined by
1004 // predicated instructions.
1005 SmallSet<unsigned, 4> Redefs;
1006 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1007 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1009 if (CvtBBI->BB->pred_size() > 1) {
1010 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1011 // Copy instructions in the true block, predicate them, and add them to
1013 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs);
1015 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1017 // Merge converted block into entry block.
1018 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1019 MergeBlocks(BBI, *CvtBBI);
1022 bool IterIfcvt = true;
1023 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1024 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1025 BBI.HasFallThrough = false;
1026 // Now ifcvt'd block will look like this:
1033 // We cannot further ifcvt this block because the unconditional branch
1034 // will have to be predicated on the new condition, that will not be
1035 // available if cmp executes.
1039 RemoveExtraEdges(BBI);
1041 // Update block info. BB can be iteratively if-converted.
1044 InvalidatePreds(BBI.BB);
1045 CvtBBI->IsDone = true;
1047 // FIXME: Must maintain LiveIns.
1051 /// IfConvertTriangle - If convert a triangle sub-CFG.
1053 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1054 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1055 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1056 BBInfo *CvtBBI = &TrueBBI;
1057 BBInfo *NextBBI = &FalseBBI;
1058 DebugLoc dl; // FIXME: this is nowhere
1060 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1061 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1062 std::swap(CvtBBI, NextBBI);
1064 if (CvtBBI->IsDone ||
1065 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1066 // Something has changed. It's no longer safe to predicate this block.
1067 BBI.IsAnalyzed = false;
1068 CvtBBI->IsAnalyzed = false;
1072 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1073 if (TII->ReverseBranchCondition(Cond))
1074 assert(false && "Unable to reverse branch condition!");
1076 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1077 if (ReverseBranchCondition(*CvtBBI)) {
1078 // BB has been changed, modify its predecessors (except for this
1079 // one) so they don't get ifcvt'ed based on bad intel.
1080 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1081 E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1082 MachineBasicBlock *PBB = *PI;
1085 BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1086 if (PBBI.IsEnqueued) {
1087 PBBI.IsAnalyzed = false;
1088 PBBI.IsEnqueued = false;
1094 // Initialize liveins to the first BB. These are potentially redefined by
1095 // predicated instructions.
1096 SmallSet<unsigned, 4> Redefs;
1097 InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1098 InitPredRedefs(NextBBI->BB, Redefs, TRI);
1100 bool HasEarlyExit = CvtBBI->FalseBB != NULL;
1101 bool DupBB = CvtBBI->BB->pred_size() > 1;
1103 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1104 // Copy instructions in the true block, predicate them, and add them to
1106 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true);
1108 // Predicate the 'true' block after removing its branch.
1109 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1110 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1112 // Now merge the entry of the triangle with the true block.
1113 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1114 MergeBlocks(BBI, *CvtBBI);
1117 // If 'true' block has a 'false' successor, add an exit branch to it.
1119 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1120 CvtBBI->BrCond.end());
1121 if (TII->ReverseBranchCondition(RevCond))
1122 assert(false && "Unable to reverse branch condition!");
1123 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
1124 BBI.BB->addSuccessor(CvtBBI->FalseBB);
1127 // Merge in the 'false' block if the 'false' block has no other
1128 // predecessors. Otherwise, add an unconditional branch to 'false'.
1129 bool FalseBBDead = false;
1130 bool IterIfcvt = true;
1131 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1132 if (!isFallThrough) {
1133 // Only merge them if the true block does not fallthrough to the false
1134 // block. By not merging them, we make it possible to iteratively
1135 // ifcvt the blocks.
1136 if (!HasEarlyExit &&
1137 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) {
1138 MergeBlocks(BBI, *NextBBI);
1141 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1142 BBI.HasFallThrough = false;
1144 // Mixed predicated and unpredicated code. This cannot be iteratively
1149 RemoveExtraEdges(BBI);
1151 // Update block info. BB can be iteratively if-converted.
1154 InvalidatePreds(BBI.BB);
1155 CvtBBI->IsDone = true;
1157 NextBBI->IsDone = true;
1159 // FIXME: Must maintain LiveIns.
1163 /// IfConvertDiamond - If convert a diamond sub-CFG.
1165 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1166 unsigned NumDups1, unsigned NumDups2) {
1167 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1168 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1169 MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1170 // True block must fall through or end with an unanalyzable terminator.
1172 if (blockAlwaysFallThrough(TrueBBI))
1173 TailBB = FalseBBI.TrueBB;
1174 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1177 if (TrueBBI.IsDone || FalseBBI.IsDone ||
1178 TrueBBI.BB->pred_size() > 1 ||
1179 FalseBBI.BB->pred_size() > 1) {
1180 // Something has changed. It's no longer safe to predicate these blocks.
1181 BBI.IsAnalyzed = false;
1182 TrueBBI.IsAnalyzed = false;
1183 FalseBBI.IsAnalyzed = false;
1187 // Merge the 'true' and 'false' blocks by copying the instructions
1188 // from the 'false' block to the 'true' block. That is, unless the true
1189 // block would clobber the predicate, in that case, do the opposite.
1190 BBInfo *BBI1 = &TrueBBI;
1191 BBInfo *BBI2 = &FalseBBI;
1192 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1193 if (TII->ReverseBranchCondition(RevCond))
1194 assert(false && "Unable to reverse branch condition!");
1195 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1196 SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1198 // Figure out the more profitable ordering.
1199 bool DoSwap = false;
1200 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1202 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1203 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1207 std::swap(BBI1, BBI2);
1208 std::swap(Cond1, Cond2);
1211 // Remove the conditional branch from entry to the blocks.
1212 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1214 // Initialize liveins to the first BB. These are potentially redefined by
1215 // predicated instructions.
1216 SmallSet<unsigned, 4> Redefs;
1217 InitPredRedefs(BBI1->BB, Redefs, TRI);
1219 // Remove the duplicated instructions at the beginnings of both paths.
1220 MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1221 MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1222 MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1223 MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1224 // Skip dbg_value instructions
1225 while (DI1 != DIE1 && DI1->isDebugValue())
1227 while (DI2 != DIE2 && DI2->isDebugValue())
1229 BBI1->NonPredSize -= NumDups1;
1230 BBI2->NonPredSize -= NumDups1;
1231 while (NumDups1 != 0) {
1237 UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI);
1238 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1239 BBI2->BB->erase(BBI2->BB->begin(), DI2);
1241 // Predicate the 'true' block after removing its branch.
1242 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1243 DI1 = BBI1->BB->end();
1244 for (unsigned i = 0; i != NumDups2; ) {
1245 // NumDups2 only counted non-dbg_value instructions, so this won't
1246 // run off the head of the list.
1247 assert (DI1 != BBI1->BB->begin());
1249 // skip dbg_value instructions
1250 if (!DI1->isDebugValue())
1253 BBI1->BB->erase(DI1, BBI1->BB->end());
1254 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs);
1256 // Predicate the 'false' block.
1257 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1258 DI2 = BBI2->BB->end();
1259 while (NumDups2 != 0) {
1260 // NumDups2 only counted non-dbg_value instructions, so this won't
1261 // run off the head of the list.
1262 assert (DI2 != BBI2->BB->begin());
1264 // skip dbg_value instructions
1265 if (!DI2->isDebugValue())
1268 PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
1270 // Merge the true block into the entry of the diamond.
1271 MergeBlocks(BBI, *BBI1);
1272 MergeBlocks(BBI, *BBI2);
1274 // If the if-converted block falls through or unconditionally branches into
1275 // the tail block, and the tail block does not have other predecessors, then
1276 // fold the tail block in as well. Otherwise, unless it falls through to the
1277 // tail, add a unconditional branch to it.
1279 BBInfo TailBBI = BBAnalysis[TailBB->getNumber()];
1280 if (TailBB->pred_size() == 1 && !TailBBI.HasFallThrough) {
1281 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1282 MergeBlocks(BBI, TailBBI);
1283 TailBBI.IsDone = true;
1285 InsertUncondBranch(BBI.BB, TailBB, TII);
1286 BBI.HasFallThrough = false;
1290 RemoveExtraEdges(BBI);
1292 // Update block info.
1293 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1294 InvalidatePreds(BBI.BB);
1296 // FIXME: Must maintain LiveIns.
1300 /// PredicateBlock - Predicate instructions from the start of the block to the
1301 /// specified end with the specified condition.
1302 void IfConverter::PredicateBlock(BBInfo &BBI,
1303 MachineBasicBlock::iterator E,
1304 SmallVectorImpl<MachineOperand> &Cond,
1305 SmallSet<unsigned, 4> &Redefs) {
1306 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1307 if (I->isDebugValue() || TII->isPredicated(I))
1309 if (!TII->PredicateInstruction(I, Cond)) {
1311 dbgs() << "Unable to predicate " << *I << "!\n";
1313 llvm_unreachable(0);
1316 // If the predicated instruction now redefines a register as the result of
1317 // if-conversion, add an implicit kill.
1318 UpdatePredRedefs(I, Redefs, TRI, true);
1321 std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
1323 BBI.IsAnalyzed = false;
1324 BBI.NonPredSize = 0;
1329 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1330 /// the destination block. Skip end of block branches if IgnoreBr is true.
1331 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1332 SmallVectorImpl<MachineOperand> &Cond,
1333 SmallSet<unsigned, 4> &Redefs,
1335 MachineFunction &MF = *ToBBI.BB->getParent();
1337 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1338 E = FromBBI.BB->end(); I != E; ++I) {
1339 const TargetInstrDesc &TID = I->getDesc();
1340 // Do not copy the end of the block branches.
1341 if (IgnoreBr && TID.isBranch())
1344 MachineInstr *MI = MF.CloneMachineInstr(I);
1345 ToBBI.BB->insert(ToBBI.BB->end(), MI);
1346 ToBBI.NonPredSize++;
1348 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1349 if (!TII->PredicateInstruction(MI, Cond)) {
1351 dbgs() << "Unable to predicate " << *I << "!\n";
1353 llvm_unreachable(0);
1357 // If the predicated instruction now redefines a register as the result of
1358 // if-conversion, add an implicit kill.
1359 UpdatePredRedefs(MI, Redefs, TRI, true);
1362 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1363 FromBBI.BB->succ_end());
1364 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1365 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1367 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1368 MachineBasicBlock *Succ = Succs[i];
1369 // Fallthrough edge can't be transferred.
1370 if (Succ == FallThrough)
1372 ToBBI.BB->addSuccessor(Succ);
1375 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1376 std::back_inserter(ToBBI.Predicate));
1377 std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
1379 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1380 ToBBI.IsAnalyzed = false;
1385 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1387 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI) {
1388 ToBBI.BB->splice(ToBBI.BB->end(),
1389 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1391 // Redirect all branches to FromBB to ToBB.
1392 std::vector<MachineBasicBlock *> Preds(FromBBI.BB->pred_begin(),
1393 FromBBI.BB->pred_end());
1394 for (unsigned i = 0, e = Preds.size(); i != e; ++i) {
1395 MachineBasicBlock *Pred = Preds[i];
1396 if (Pred == ToBBI.BB)
1398 Pred->ReplaceUsesOfBlockWith(FromBBI.BB, ToBBI.BB);
1401 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1402 FromBBI.BB->succ_end());
1403 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1404 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1406 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1407 MachineBasicBlock *Succ = Succs[i];
1408 // Fallthrough edge can't be transferred.
1409 if (Succ == FallThrough)
1411 FromBBI.BB->removeSuccessor(Succ);
1412 ToBBI.BB->addSuccessor(Succ);
1415 // Now FromBBI always falls through to the next block!
1416 if (NBB && !FromBBI.BB->isSuccessor(NBB))
1417 FromBBI.BB->addSuccessor(NBB);
1419 std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1420 std::back_inserter(ToBBI.Predicate));
1421 FromBBI.Predicate.clear();
1423 ToBBI.NonPredSize += FromBBI.NonPredSize;
1424 FromBBI.NonPredSize = 0;
1426 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1427 ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1428 ToBBI.IsAnalyzed = false;
1429 FromBBI.IsAnalyzed = false;