1 //===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the machine instruction level if-conversion pass.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/Passes.h"
15 #include "BranchFolding.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/SmallSet.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/LivePhysRegs.h"
20 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
21 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/TargetSchedule.h"
27 #include "llvm/MC/MCInstrItineraries.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/Support/ErrorHandling.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
35 #include "llvm/Target/TargetSubtargetInfo.h"
39 #define DEBUG_TYPE "ifcvt"
41 // Hidden options for help debugging.
42 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
43 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
44 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
45 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
46 cl::init(false), cl::Hidden);
47 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
48 cl::init(false), cl::Hidden);
49 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
50 cl::init(false), cl::Hidden);
51 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
52 cl::init(false), cl::Hidden);
53 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
54 cl::init(false), cl::Hidden);
55 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
56 cl::init(false), cl::Hidden);
57 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
58 cl::init(false), cl::Hidden);
59 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
60 cl::init(true), cl::Hidden);
62 STATISTIC(NumSimple, "Number of simple if-conversions performed");
63 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
64 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
65 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
66 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
67 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
68 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
69 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
70 STATISTIC(NumDupBBs, "Number of duplicated blocks");
71 STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated");
74 class IfConverter : public MachineFunctionPass {
76 ICNotClassfied, // BB data valid, but not classified.
77 ICSimpleFalse, // Same as ICSimple, but on the false path.
78 ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
79 ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
80 ICTriangleRev, // Same as ICTriangle, but true path rev condition.
81 ICTriangleFalse, // Same as ICTriangle, but on the false path.
82 ICTriangle, // BB is entry of a triangle sub-CFG.
83 ICDiamond // BB is entry of a diamond sub-CFG.
86 /// BBInfo - One per MachineBasicBlock, this is used to cache the result
87 /// if-conversion feasibility analysis. This includes results from
88 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
89 /// classification, and common tail block of its successors (if it's a
90 /// diamond shape), its size, whether it's predicable, and whether any
91 /// instruction can clobber the 'would-be' predicate.
93 /// IsDone - True if BB is not to be considered for ifcvt.
94 /// IsBeingAnalyzed - True if BB is currently being analyzed.
95 /// IsAnalyzed - True if BB has been analyzed (info is still valid).
96 /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
97 /// IsBrAnalyzable - True if AnalyzeBranch() returns false.
98 /// HasFallThrough - True if BB may fallthrough to the following BB.
99 /// IsUnpredicable - True if BB is known to be unpredicable.
100 /// ClobbersPred - True if BB could modify predicates (e.g. has
102 /// NonPredSize - Number of non-predicated instructions.
103 /// ExtraCost - Extra cost for multi-cycle instructions.
104 /// ExtraCost2 - Some instructions are slower when predicated
105 /// BB - Corresponding MachineBasicBlock.
106 /// TrueBB / FalseBB- See AnalyzeBranch().
107 /// BrCond - Conditions for end of block conditional branches.
108 /// Predicate - Predicate used in the BB.
111 bool IsBeingAnalyzed : 1;
114 bool IsBrAnalyzable : 1;
115 bool HasFallThrough : 1;
116 bool IsUnpredicable : 1;
117 bool CannotBeCopied : 1;
118 bool ClobbersPred : 1;
119 unsigned NonPredSize;
122 MachineBasicBlock *BB;
123 MachineBasicBlock *TrueBB;
124 MachineBasicBlock *FalseBB;
125 SmallVector<MachineOperand, 4> BrCond;
126 SmallVector<MachineOperand, 4> Predicate;
127 BBInfo() : IsDone(false), IsBeingAnalyzed(false),
128 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
129 HasFallThrough(false), IsUnpredicable(false),
130 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
131 ExtraCost(0), ExtraCost2(0), BB(nullptr), TrueBB(nullptr),
135 /// IfcvtToken - Record information about pending if-conversions to attempt:
136 /// BBI - Corresponding BBInfo.
137 /// Kind - Type of block. See IfcvtKind.
138 /// NeedSubsumption - True if the to-be-predicated BB has already been
140 /// NumDups - Number of instructions that would be duplicated due
141 /// to this if-conversion. (For diamonds, the number of
142 /// identical instructions at the beginnings of both
144 /// NumDups2 - For diamonds, the number of identical instructions
145 /// at the ends of both paths.
149 bool NeedSubsumption;
152 IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
153 : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
156 /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
157 /// basic block number.
158 std::vector<BBInfo> BBAnalysis;
159 TargetSchedModel SchedModel;
161 const TargetLoweringBase *TLI;
162 const TargetInstrInfo *TII;
163 const TargetRegisterInfo *TRI;
164 const MachineBlockFrequencyInfo *MBFI;
165 const MachineBranchProbabilityInfo *MBPI;
166 MachineRegisterInfo *MRI;
169 LivePhysRegs DontKill;
176 IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
177 initializeIfConverterPass(*PassRegistry::getPassRegistry());
180 void getAnalysisUsage(AnalysisUsage &AU) const override {
181 AU.addRequired<MachineBlockFrequencyInfo>();
182 AU.addRequired<MachineBranchProbabilityInfo>();
183 MachineFunctionPass::getAnalysisUsage(AU);
186 bool runOnMachineFunction(MachineFunction &MF) override;
189 bool ReverseBranchCondition(BBInfo &BBI);
190 bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
191 const BranchProbability &Prediction) const;
192 bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
193 bool FalseBranch, unsigned &Dups,
194 const BranchProbability &Prediction) const;
195 bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
196 unsigned &Dups1, unsigned &Dups2) const;
197 void ScanInstructions(BBInfo &BBI);
198 BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
199 std::vector<IfcvtToken*> &Tokens);
200 bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
201 bool isTriangle = false, bool RevBranch = false);
202 void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
203 void InvalidatePreds(MachineBasicBlock *BB);
204 void RemoveExtraEdges(BBInfo &BBI);
205 bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
206 bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
207 bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
208 unsigned NumDups1, unsigned NumDups2);
209 void PredicateBlock(BBInfo &BBI,
210 MachineBasicBlock::iterator E,
211 SmallVectorImpl<MachineOperand> &Cond,
212 SmallSet<unsigned, 4> *LaterRedefs = nullptr);
213 void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
214 SmallVectorImpl<MachineOperand> &Cond,
215 bool IgnoreBr = false);
216 void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
218 bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
219 unsigned Cycle, unsigned Extra,
220 const BranchProbability &Prediction) const {
221 return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
225 bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
226 unsigned TCycle, unsigned TExtra,
227 MachineBasicBlock &FBB,
228 unsigned FCycle, unsigned FExtra,
229 const BranchProbability &Prediction) const {
230 return TCycle > 0 && FCycle > 0 &&
231 TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
235 // blockAlwaysFallThrough - Block ends without a terminator.
236 bool blockAlwaysFallThrough(BBInfo &BBI) const {
237 return BBI.IsBrAnalyzable && BBI.TrueBB == nullptr;
240 // IfcvtTokenCmp - Used to sort if-conversion candidates.
241 static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
242 int Incr1 = (C1->Kind == ICDiamond)
243 ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
244 int Incr2 = (C2->Kind == ICDiamond)
245 ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
248 else if (Incr1 == Incr2) {
249 // Favors subsumption.
250 if (!C1->NeedSubsumption && C2->NeedSubsumption)
252 else if (C1->NeedSubsumption == C2->NeedSubsumption) {
253 // Favors diamond over triangle, etc.
254 if ((unsigned)C1->Kind < (unsigned)C2->Kind)
256 else if (C1->Kind == C2->Kind)
257 return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
264 char IfConverter::ID = 0;
267 char &llvm::IfConverterID = IfConverter::ID;
269 INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
270 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
271 INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
273 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
274 const TargetSubtargetInfo &ST = MF.getSubtarget();
275 TLI = ST.getTargetLowering();
276 TII = ST.getInstrInfo();
277 TRI = ST.getRegisterInfo();
278 MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
279 MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
280 MRI = &MF.getRegInfo();
281 SchedModel.init(ST.getSchedModel(), &ST, TII);
283 if (!TII) return false;
285 PreRegAlloc = MRI->isSSA();
287 bool BFChange = false;
289 // Tail merge tend to expose more if-conversion opportunities.
290 BranchFolder BF(true, false, *MBFI, *MBPI);
291 BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),
292 getAnalysisIfAvailable<MachineModuleInfo>());
295 DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
296 << MF.getName() << "\'");
298 if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
299 DEBUG(dbgs() << " skipped\n");
302 DEBUG(dbgs() << "\n");
305 BBAnalysis.resize(MF.getNumBlockIDs());
307 std::vector<IfcvtToken*> Tokens;
309 unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
310 NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
311 while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
312 // Do an initial analysis for each basic block and find all the potential
313 // candidates to perform if-conversion.
315 AnalyzeBlocks(MF, Tokens);
316 while (!Tokens.empty()) {
317 IfcvtToken *Token = Tokens.back();
319 BBInfo &BBI = Token->BBI;
320 IfcvtKind Kind = Token->Kind;
321 unsigned NumDups = Token->NumDups;
322 unsigned NumDups2 = Token->NumDups2;
326 // If the block has been evicted out of the queue or it has already been
327 // marked dead (due to it being predicated), then skip it.
329 BBI.IsEnqueued = false;
333 BBI.IsEnqueued = false;
337 default: llvm_unreachable("Unexpected!");
339 case ICSimpleFalse: {
340 bool isFalse = Kind == ICSimpleFalse;
341 if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
342 DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
344 << "): BB#" << BBI.BB->getNumber() << " ("
345 << ((Kind == ICSimpleFalse)
346 ? BBI.FalseBB->getNumber()
347 : BBI.TrueBB->getNumber()) << ") ");
348 RetVal = IfConvertSimple(BBI, Kind);
349 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
351 if (isFalse) ++NumSimpleFalse;
358 case ICTriangleFalse:
359 case ICTriangleFRev: {
360 bool isFalse = Kind == ICTriangleFalse;
361 bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
362 if (DisableTriangle && !isFalse && !isRev) break;
363 if (DisableTriangleR && !isFalse && isRev) break;
364 if (DisableTriangleF && isFalse && !isRev) break;
365 if (DisableTriangleFR && isFalse && isRev) break;
366 DEBUG(dbgs() << "Ifcvt (Triangle");
368 DEBUG(dbgs() << " false");
370 DEBUG(dbgs() << " rev");
371 DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
372 << BBI.TrueBB->getNumber() << ",F:"
373 << BBI.FalseBB->getNumber() << ") ");
374 RetVal = IfConvertTriangle(BBI, Kind);
375 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
378 if (isRev) ++NumTriangleFRev;
379 else ++NumTriangleFalse;
381 if (isRev) ++NumTriangleRev;
388 if (DisableDiamond) break;
389 DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
390 << BBI.TrueBB->getNumber() << ",F:"
391 << BBI.FalseBB->getNumber() << ") ");
392 RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
393 DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
394 if (RetVal) ++NumDiamonds;
401 NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
402 NumTriangleFalse + NumTriangleFRev + NumDiamonds;
403 if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
409 MadeChange |= Change;
412 // Delete tokens in case of early exit.
413 while (!Tokens.empty()) {
414 IfcvtToken *Token = Tokens.back();
422 if (MadeChange && IfCvtBranchFold) {
423 BranchFolder BF(false, false, *MBFI, *MBPI);
424 BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
425 getAnalysisIfAvailable<MachineModuleInfo>());
428 MadeChange |= BFChange;
432 /// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
433 /// its 'true' successor.
434 static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
435 MachineBasicBlock *TrueBB) {
436 for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
437 E = BB->succ_end(); SI != E; ++SI) {
438 MachineBasicBlock *SuccBB = *SI;
439 if (SuccBB != TrueBB)
445 /// ReverseBranchCondition - Reverse the condition of the end of the block
446 /// branch. Swap block's 'true' and 'false' successors.
447 bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
448 DebugLoc dl; // FIXME: this is nowhere
449 if (!TII->ReverseBranchCondition(BBI.BrCond)) {
450 TII->RemoveBranch(*BBI.BB);
451 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
452 std::swap(BBI.TrueBB, BBI.FalseBB);
458 /// getNextBlock - Returns the next block in the function blocks ordering. If
459 /// it is the end, returns NULL.
460 static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
461 MachineFunction::iterator I = BB;
462 MachineFunction::iterator E = BB->getParent()->end();
468 /// ValidSimple - Returns true if the 'true' block (along with its
469 /// predecessor) forms a valid simple shape for ifcvt. It also returns the
470 /// number of instructions that the ifcvt would need to duplicate if performed
472 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
473 const BranchProbability &Prediction) const {
475 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
478 if (TrueBBI.IsBrAnalyzable)
481 if (TrueBBI.BB->pred_size() > 1) {
482 if (TrueBBI.CannotBeCopied ||
483 !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
486 Dups = TrueBBI.NonPredSize;
492 /// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
493 /// with their common predecessor) forms a valid triangle shape for ifcvt.
494 /// If 'FalseBranch' is true, it checks if 'true' block's false branch
495 /// branches to the 'false' block rather than the other way around. It also
496 /// returns the number of instructions that the ifcvt would need to duplicate
497 /// if performed in 'Dups'.
498 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
499 bool FalseBranch, unsigned &Dups,
500 const BranchProbability &Prediction) const {
502 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
505 if (TrueBBI.BB->pred_size() > 1) {
506 if (TrueBBI.CannotBeCopied)
509 unsigned Size = TrueBBI.NonPredSize;
510 if (TrueBBI.IsBrAnalyzable) {
511 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
512 // Ends with an unconditional branch. It will be removed.
515 MachineBasicBlock *FExit = FalseBranch
516 ? TrueBBI.TrueBB : TrueBBI.FalseBB;
518 // Require a conditional branch
522 if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
527 MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
528 if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
529 MachineFunction::iterator I = TrueBBI.BB;
530 if (++I == TrueBBI.BB->getParent()->end())
534 return TExit && TExit == FalseBBI.BB;
537 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
538 /// with their common predecessor) forms a valid diamond shape for ifcvt.
539 bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
540 unsigned &Dups1, unsigned &Dups2) const {
542 if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
543 FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
546 MachineBasicBlock *TT = TrueBBI.TrueBB;
547 MachineBasicBlock *FT = FalseBBI.TrueBB;
549 if (!TT && blockAlwaysFallThrough(TrueBBI))
550 TT = getNextBlock(TrueBBI.BB);
551 if (!FT && blockAlwaysFallThrough(FalseBBI))
552 FT = getNextBlock(FalseBBI.BB);
555 if (!TT && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
557 if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
560 // FIXME: Allow true block to have an early exit?
561 if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
562 (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
565 // Count duplicate instructions at the beginning of the true and false blocks.
566 MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
567 MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
568 MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
569 MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
570 while (TIB != TIE && FIB != FIE) {
571 // Skip dbg_value instructions. These do not count.
572 if (TIB->isDebugValue()) {
573 while (TIB != TIE && TIB->isDebugValue())
578 if (FIB->isDebugValue()) {
579 while (FIB != FIE && FIB->isDebugValue())
584 if (!TIB->isIdenticalTo(FIB))
591 // Now, in preparation for counting duplicate instructions at the ends of the
592 // blocks, move the end iterators up past any branch instructions.
595 if (!TIE->isBranch())
600 if (!FIE->isBranch())
604 // If Dups1 includes all of a block, then don't count duplicate
605 // instructions at the end of the blocks.
606 if (TIB == TIE || FIB == FIE)
609 // Count duplicate instructions at the ends of the blocks.
610 while (TIE != TIB && FIE != FIB) {
611 // Skip dbg_value instructions. These do not count.
612 if (TIE->isDebugValue()) {
613 while (TIE != TIB && TIE->isDebugValue())
618 if (FIE->isDebugValue()) {
619 while (FIE != FIB && FIE->isDebugValue())
624 if (!TIE->isIdenticalTo(FIE))
634 /// ScanInstructions - Scan all the instructions in the block to determine if
635 /// the block is predicable. In most cases, that means all the instructions
636 /// in the block are isPredicable(). Also checks if the block contains any
637 /// instruction which can clobber a predicate (e.g. condition code register).
638 /// If so, the block is not predicable unless it's the last instruction.
639 void IfConverter::ScanInstructions(BBInfo &BBI) {
643 bool AlreadyPredicated = !BBI.Predicate.empty();
644 // First analyze the end of BB branches.
645 BBI.TrueBB = BBI.FalseBB = nullptr;
648 !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
649 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
651 if (BBI.BrCond.size()) {
652 // No false branch. This BB must end with a conditional branch and a
655 BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
657 // Malformed bcc? True and false blocks are the same?
658 BBI.IsUnpredicable = true;
663 // Then scan all the instructions.
667 BBI.ClobbersPred = false;
668 for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
670 if (I->isDebugValue())
673 if (I->isNotDuplicable())
674 BBI.CannotBeCopied = true;
676 bool isPredicated = TII->isPredicated(I);
677 bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
679 // A conditional branch is not predicable, but it may be eliminated.
685 unsigned ExtraPredCost = TII->getPredicationCost(&*I);
686 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
688 BBI.ExtraCost += NumCycles-1;
689 BBI.ExtraCost2 += ExtraPredCost;
690 } else if (!AlreadyPredicated) {
691 // FIXME: This instruction is already predicated before the
692 // if-conversion pass. It's probably something like a conditional move.
693 // Mark this block unpredicable for now.
694 BBI.IsUnpredicable = true;
698 if (BBI.ClobbersPred && !isPredicated) {
699 // Predicate modification instruction should end the block (except for
700 // already predicated instructions and end of block branches).
701 // Predicate may have been modified, the subsequent (currently)
702 // unpredicated instructions cannot be correctly predicated.
703 BBI.IsUnpredicable = true;
707 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
708 // still potentially predicable.
709 std::vector<MachineOperand> PredDefs;
710 if (TII->DefinesPredicate(I, PredDefs))
711 BBI.ClobbersPred = true;
713 if (!TII->isPredicable(I)) {
714 BBI.IsUnpredicable = true;
720 /// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
721 /// predicated by the specified predicate.
722 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
723 SmallVectorImpl<MachineOperand> &Pred,
724 bool isTriangle, bool RevBranch) {
725 // If the block is dead or unpredicable, then it cannot be predicated.
726 if (BBI.IsDone || BBI.IsUnpredicable)
729 // If it is already predicated but we couldn't analyze its terminator, the
730 // latter might fallthrough, but we can't determine where to.
731 // Conservatively avoid if-converting again.
732 if (BBI.Predicate.size() && !BBI.IsBrAnalyzable)
735 // If it is already predicated, check if the new predicate subsumes
737 if (BBI.Predicate.size() && !TII->SubsumesPredicate(Pred, BBI.Predicate))
740 if (BBI.BrCond.size()) {
744 // Test predicate subsumption.
745 SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
746 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
748 if (TII->ReverseBranchCondition(Cond))
751 if (TII->ReverseBranchCondition(RevPred) ||
752 !TII->SubsumesPredicate(Cond, RevPred))
759 /// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
760 /// the specified block. Record its successors and whether it looks like an
761 /// if-conversion candidate.
762 IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
763 std::vector<IfcvtToken*> &Tokens) {
764 BBInfo &BBI = BBAnalysis[BB->getNumber()];
766 if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
770 BBI.IsBeingAnalyzed = true;
772 ScanInstructions(BBI);
774 // Unanalyzable or ends with fallthrough or unconditional branch, or if is not
775 // considered for ifcvt anymore.
776 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
777 BBI.IsBeingAnalyzed = false;
778 BBI.IsAnalyzed = true;
782 // Do not ifcvt if either path is a back edge to the entry block.
783 if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
784 BBI.IsBeingAnalyzed = false;
785 BBI.IsAnalyzed = true;
789 // Do not ifcvt if true and false fallthrough blocks are the same.
791 BBI.IsBeingAnalyzed = false;
792 BBI.IsAnalyzed = true;
796 BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB, Tokens);
797 BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
799 if (TrueBBI.IsDone && FalseBBI.IsDone) {
800 BBI.IsBeingAnalyzed = false;
801 BBI.IsAnalyzed = true;
805 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
806 bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
810 bool TNeedSub = !TrueBBI.Predicate.empty();
811 bool FNeedSub = !FalseBBI.Predicate.empty();
812 bool Enqueued = false;
814 BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
816 if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
817 MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
818 TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
819 *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
820 FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
822 FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
823 FeasibilityAnalysis(FalseBBI, RevCond)) {
831 // Note TailBB can be empty.
832 Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
837 if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
838 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
839 TrueBBI.ExtraCost2, Prediction) &&
840 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
848 Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
852 if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
853 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
854 TrueBBI.ExtraCost2, Prediction) &&
855 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
856 Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
860 if (ValidSimple(TrueBBI, Dups, Prediction) &&
861 MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
862 TrueBBI.ExtraCost2, Prediction) &&
863 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
864 // Simple (split, no rejoin):
871 Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
876 // Try the other path...
877 if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
878 Prediction.getCompl()) &&
879 MeetIfcvtSizeLimit(*FalseBBI.BB,
880 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
881 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
882 FeasibilityAnalysis(FalseBBI, RevCond, true)) {
883 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
887 if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
888 Prediction.getCompl()) &&
889 MeetIfcvtSizeLimit(*FalseBBI.BB,
890 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
891 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
892 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
893 Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
897 if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
898 MeetIfcvtSizeLimit(*FalseBBI.BB,
899 FalseBBI.NonPredSize + FalseBBI.ExtraCost,
900 FalseBBI.ExtraCost2, Prediction.getCompl()) &&
901 FeasibilityAnalysis(FalseBBI, RevCond)) {
902 Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
907 BBI.IsEnqueued = Enqueued;
908 BBI.IsBeingAnalyzed = false;
909 BBI.IsAnalyzed = true;
913 /// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
915 void IfConverter::AnalyzeBlocks(MachineFunction &MF,
916 std::vector<IfcvtToken*> &Tokens) {
917 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
918 MachineBasicBlock *BB = I;
919 AnalyzeBlock(BB, Tokens);
922 // Sort to favor more complex ifcvt scheme.
923 std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
926 /// canFallThroughTo - Returns true either if ToBB is the next block after BB or
927 /// that all the intervening blocks are empty (given BB can fall through to its
929 static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
930 MachineFunction::iterator PI = BB;
931 MachineFunction::iterator I = std::next(PI);
932 MachineFunction::iterator TI = ToBB;
933 MachineFunction::iterator E = BB->getParent()->end();
935 // Check isSuccessor to avoid case where the next block is empty, but
936 // it's not a successor.
937 if (I == E || !I->empty() || !PI->isSuccessor(I))
944 /// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
945 /// to determine if it can be if-converted. If predecessor is already enqueued,
947 void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
948 for (const auto &Predecessor : BB->predecessors()) {
949 BBInfo &PBBI = BBAnalysis[Predecessor->getNumber()];
950 if (PBBI.IsDone || PBBI.BB == BB)
952 PBBI.IsAnalyzed = false;
953 PBBI.IsEnqueued = false;
957 /// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
959 static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
960 const TargetInstrInfo *TII) {
961 DebugLoc dl; // FIXME: this is nowhere
962 SmallVector<MachineOperand, 0> NoCond;
963 TII->InsertBranch(*BB, ToBB, nullptr, NoCond, dl);
966 /// RemoveExtraEdges - Remove true / false edges if either / both are no longer
968 void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
969 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
970 SmallVector<MachineOperand, 4> Cond;
971 if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
972 BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
975 /// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
976 /// values defined in MI which are not live/used by MI.
977 static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
978 SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
979 Redefs.stepForward(*MI, Clobbers);
981 // Now add the implicit uses for each of the clobbered values.
982 for (auto Reg : Clobbers) {
983 const MachineOperand &Op = *Reg.second;
984 // FIXME: Const cast here is nasty, but better than making StepForward
985 // take a mutable instruction instead of const.
986 MachineInstr *OpMI = const_cast<MachineInstr*>(Op.getParent());
987 MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
989 if (Op.isRegMask()) {
990 // First handle regmasks. They clobber any entries in the mask which
991 // means that we need a def for those registers.
992 MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
994 // We also need to add an implicit def of this register for the later
996 // For the register allocator to have allocated a register clobbered
997 // by the call which is used later, it must be the case that
998 // the call doesn't return.
999 MIB.addReg(Reg.first, RegState::Implicit | RegState::Define);
1002 assert(Op.isReg() && "Register operand required");
1003 MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
1008 * Remove kill flags from operands with a registers in the @p DontKill set.
1010 static void RemoveKills(MachineInstr &MI, const LivePhysRegs &DontKill) {
1011 for (MIBundleOperands O(&MI); O.isValid(); ++O) {
1012 if (!O->isReg() || !O->isKill())
1014 if (DontKill.contains(O->getReg()))
1015 O->setIsKill(false);
1020 * Walks a range of machine instructions and removes kill flags for registers
1021 * in the @p DontKill set.
1023 static void RemoveKills(MachineBasicBlock::iterator I,
1024 MachineBasicBlock::iterator E,
1025 const LivePhysRegs &DontKill,
1026 const MCRegisterInfo &MCRI) {
1027 for ( ; I != E; ++I)
1028 RemoveKills(*I, DontKill);
1031 /// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1033 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1034 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1035 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1036 BBInfo *CvtBBI = &TrueBBI;
1037 BBInfo *NextBBI = &FalseBBI;
1039 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1040 if (Kind == ICSimpleFalse)
1041 std::swap(CvtBBI, NextBBI);
1043 if (CvtBBI->IsDone ||
1044 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1045 // Something has changed. It's no longer safe to predicate this block.
1046 BBI.IsAnalyzed = false;
1047 CvtBBI->IsAnalyzed = false;
1051 if (CvtBBI->BB->hasAddressTaken())
1052 // Conservatively abort if-conversion if BB's address is taken.
1055 if (Kind == ICSimpleFalse)
1056 if (TII->ReverseBranchCondition(Cond))
1057 llvm_unreachable("Unable to reverse branch condition!");
1059 // Initialize liveins to the first BB. These are potentiall redefined by
1060 // predicated instructions.
1062 Redefs.addLiveIns(CvtBBI->BB);
1063 Redefs.addLiveIns(NextBBI->BB);
1065 // Compute a set of registers which must not be killed by instructions in
1066 // BB1: This is everything live-in to BB2.
1068 DontKill.addLiveIns(NextBBI->BB);
1070 if (CvtBBI->BB->pred_size() > 1) {
1071 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1072 // Copy instructions in the true block, predicate them, and add them to
1074 CopyAndPredicateBlock(BBI, *CvtBBI, Cond);
1076 // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1077 // explicitly remove CvtBBI as a successor.
1078 BBI.BB->removeSuccessor(CvtBBI->BB);
1080 RemoveKills(CvtBBI->BB->begin(), CvtBBI->BB->end(), DontKill, *TRI);
1081 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1083 // Merge converted block into entry block.
1084 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1085 MergeBlocks(BBI, *CvtBBI);
1088 bool IterIfcvt = true;
1089 if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1090 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1091 BBI.HasFallThrough = false;
1092 // Now ifcvt'd block will look like this:
1099 // We cannot further ifcvt this block because the unconditional branch
1100 // will have to be predicated on the new condition, that will not be
1101 // available if cmp executes.
1105 RemoveExtraEdges(BBI);
1107 // Update block info. BB can be iteratively if-converted.
1110 InvalidatePreds(BBI.BB);
1111 CvtBBI->IsDone = true;
1113 // FIXME: Must maintain LiveIns.
1117 /// Scale down weights to fit into uint32_t. NewTrue is the new weight
1118 /// for successor TrueBB, and NewFalse is the new weight for successor
1120 static void ScaleWeights(uint64_t NewTrue, uint64_t NewFalse,
1121 MachineBasicBlock *MBB,
1122 const MachineBasicBlock *TrueBB,
1123 const MachineBasicBlock *FalseBB,
1124 const MachineBranchProbabilityInfo *MBPI) {
1125 uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
1126 uint32_t Scale = (NewMax / UINT32_MAX) + 1;
1127 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
1128 SE = MBB->succ_end();
1131 MBB->setSuccWeight(SI, (uint32_t)(NewTrue / Scale));
1132 else if (*SI == FalseBB)
1133 MBB->setSuccWeight(SI, (uint32_t)(NewFalse / Scale));
1135 MBB->setSuccWeight(SI, MBPI->getEdgeWeight(MBB, SI) / Scale);
1139 /// IfConvertTriangle - If convert a triangle sub-CFG.
1141 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1142 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1143 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1144 BBInfo *CvtBBI = &TrueBBI;
1145 BBInfo *NextBBI = &FalseBBI;
1146 DebugLoc dl; // FIXME: this is nowhere
1148 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1149 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1150 std::swap(CvtBBI, NextBBI);
1152 if (CvtBBI->IsDone ||
1153 (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1154 // Something has changed. It's no longer safe to predicate this block.
1155 BBI.IsAnalyzed = false;
1156 CvtBBI->IsAnalyzed = false;
1160 if (CvtBBI->BB->hasAddressTaken())
1161 // Conservatively abort if-conversion if BB's address is taken.
1164 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1165 if (TII->ReverseBranchCondition(Cond))
1166 llvm_unreachable("Unable to reverse branch condition!");
1168 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1169 if (ReverseBranchCondition(*CvtBBI)) {
1170 // BB has been changed, modify its predecessors (except for this
1171 // one) so they don't get ifcvt'ed based on bad intel.
1172 for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1173 E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1174 MachineBasicBlock *PBB = *PI;
1177 BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1178 if (PBBI.IsEnqueued) {
1179 PBBI.IsAnalyzed = false;
1180 PBBI.IsEnqueued = false;
1186 // Initialize liveins to the first BB. These are potentially redefined by
1187 // predicated instructions.
1189 Redefs.addLiveIns(CvtBBI->BB);
1190 Redefs.addLiveIns(NextBBI->BB);
1194 bool HasEarlyExit = CvtBBI->FalseBB != nullptr;
1195 uint64_t CvtNext = 0, CvtFalse = 0, BBNext = 0, BBCvt = 0, SumWeight = 0;
1196 uint32_t WeightScale = 0;
1199 // Get weights before modifying CvtBBI->BB and BBI.BB.
1200 CvtNext = MBPI->getEdgeWeight(CvtBBI->BB, NextBBI->BB);
1201 CvtFalse = MBPI->getEdgeWeight(CvtBBI->BB, CvtBBI->FalseBB);
1202 BBNext = MBPI->getEdgeWeight(BBI.BB, NextBBI->BB);
1203 BBCvt = MBPI->getEdgeWeight(BBI.BB, CvtBBI->BB);
1204 SumWeight = MBPI->getSumForBlock(CvtBBI->BB, WeightScale);
1207 if (CvtBBI->BB->pred_size() > 1) {
1208 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1209 // Copy instructions in the true block, predicate them, and add them to
1211 CopyAndPredicateBlock(BBI, *CvtBBI, Cond, true);
1213 // RemoveExtraEdges won't work if the block has an unanalyzable branch, so
1214 // explicitly remove CvtBBI as a successor.
1215 BBI.BB->removeSuccessor(CvtBBI->BB);
1217 // Predicate the 'true' block after removing its branch.
1218 CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1219 PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond);
1221 // Now merge the entry of the triangle with the true block.
1222 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1223 MergeBlocks(BBI, *CvtBBI, false);
1226 // If 'true' block has a 'false' successor, add an exit branch to it.
1228 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1229 CvtBBI->BrCond.end());
1230 if (TII->ReverseBranchCondition(RevCond))
1231 llvm_unreachable("Unable to reverse branch condition!");
1232 TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
1233 BBI.BB->addSuccessor(CvtBBI->FalseBB);
1234 // Update the edge weight for both CvtBBI->FalseBB and NextBBI.
1235 // New_Weight(BBI.BB, NextBBI->BB) =
1236 // Weight(BBI.BB, NextBBI->BB) * getSumForBlock(CvtBBI->BB) +
1237 // Weight(BBI.BB, CvtBBI->BB) * Weight(CvtBBI->BB, NextBBI->BB)
1238 // New_Weight(BBI.BB, CvtBBI->FalseBB) =
1239 // Weight(BBI.BB, CvtBBI->BB) * Weight(CvtBBI->BB, CvtBBI->FalseBB)
1241 uint64_t NewNext = BBNext * SumWeight + (BBCvt * CvtNext) / WeightScale;
1242 uint64_t NewFalse = (BBCvt * CvtFalse) / WeightScale;
1243 // We need to scale down all weights of BBI.BB to fit uint32_t.
1244 // Here BBI.BB is connected to CvtBBI->FalseBB and will fall through to
1246 ScaleWeights(NewNext, NewFalse, BBI.BB, getNextBlock(BBI.BB),
1247 CvtBBI->FalseBB, MBPI);
1250 // Merge in the 'false' block if the 'false' block has no other
1251 // predecessors. Otherwise, add an unconditional branch to 'false'.
1252 bool FalseBBDead = false;
1253 bool IterIfcvt = true;
1254 bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1255 if (!isFallThrough) {
1256 // Only merge them if the true block does not fallthrough to the false
1257 // block. By not merging them, we make it possible to iteratively
1258 // ifcvt the blocks.
1259 if (!HasEarlyExit &&
1260 NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough &&
1261 !NextBBI->BB->hasAddressTaken()) {
1262 MergeBlocks(BBI, *NextBBI);
1265 InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1266 BBI.HasFallThrough = false;
1268 // Mixed predicated and unpredicated code. This cannot be iteratively
1273 RemoveExtraEdges(BBI);
1275 // Update block info. BB can be iteratively if-converted.
1278 InvalidatePreds(BBI.BB);
1279 CvtBBI->IsDone = true;
1281 NextBBI->IsDone = true;
1283 // FIXME: Must maintain LiveIns.
1287 /// IfConvertDiamond - If convert a diamond sub-CFG.
1289 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1290 unsigned NumDups1, unsigned NumDups2) {
1291 BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1292 BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1293 MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1294 // True block must fall through or end with an unanalyzable terminator.
1296 if (blockAlwaysFallThrough(TrueBBI))
1297 TailBB = FalseBBI.TrueBB;
1298 assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1301 if (TrueBBI.IsDone || FalseBBI.IsDone ||
1302 TrueBBI.BB->pred_size() > 1 ||
1303 FalseBBI.BB->pred_size() > 1) {
1304 // Something has changed. It's no longer safe to predicate these blocks.
1305 BBI.IsAnalyzed = false;
1306 TrueBBI.IsAnalyzed = false;
1307 FalseBBI.IsAnalyzed = false;
1311 if (TrueBBI.BB->hasAddressTaken() || FalseBBI.BB->hasAddressTaken())
1312 // Conservatively abort if-conversion if either BB has its address taken.
1315 // Put the predicated instructions from the 'true' block before the
1316 // instructions from the 'false' block, unless the true block would clobber
1317 // the predicate, in which case, do the opposite.
1318 BBInfo *BBI1 = &TrueBBI;
1319 BBInfo *BBI2 = &FalseBBI;
1320 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1321 if (TII->ReverseBranchCondition(RevCond))
1322 llvm_unreachable("Unable to reverse branch condition!");
1323 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1324 SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1326 // Figure out the more profitable ordering.
1327 bool DoSwap = false;
1328 if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1330 else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1331 if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1335 std::swap(BBI1, BBI2);
1336 std::swap(Cond1, Cond2);
1339 // Remove the conditional branch from entry to the blocks.
1340 BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1342 // Initialize liveins to the first BB. These are potentially redefined by
1343 // predicated instructions.
1345 Redefs.addLiveIns(BBI1->BB);
1347 // Remove the duplicated instructions at the beginnings of both paths.
1348 MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1349 MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1350 MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1351 MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1352 // Skip dbg_value instructions
1353 while (DI1 != DIE1 && DI1->isDebugValue())
1355 while (DI2 != DIE2 && DI2->isDebugValue())
1357 BBI1->NonPredSize -= NumDups1;
1358 BBI2->NonPredSize -= NumDups1;
1360 // Skip past the dups on each side separately since there may be
1361 // differing dbg_value entries.
1362 for (unsigned i = 0; i < NumDups1; ++DI1) {
1363 if (!DI1->isDebugValue())
1366 while (NumDups1 != 0) {
1368 if (!DI2->isDebugValue())
1372 // Compute a set of registers which must not be killed by instructions in BB1:
1373 // This is everything used+live in BB2 after the duplicated instructions. We
1374 // can compute this set by simulating liveness backwards from the end of BB2.
1376 for (MachineBasicBlock::reverse_iterator I = BBI2->BB->rbegin(),
1377 E = MachineBasicBlock::reverse_iterator(DI2); I != E; ++I) {
1378 DontKill.stepBackward(*I);
1381 for (MachineBasicBlock::const_iterator I = BBI1->BB->begin(), E = DI1; I != E;
1383 SmallVector<std::pair<unsigned, const MachineOperand*>, 4> IgnoredClobbers;
1384 Redefs.stepForward(*I, IgnoredClobbers);
1386 BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1387 BBI2->BB->erase(BBI2->BB->begin(), DI2);
1389 // Remove branch from 'true' block and remove duplicated instructions.
1390 BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1391 DI1 = BBI1->BB->end();
1392 for (unsigned i = 0; i != NumDups2; ) {
1393 // NumDups2 only counted non-dbg_value instructions, so this won't
1394 // run off the head of the list.
1395 assert (DI1 != BBI1->BB->begin());
1397 // skip dbg_value instructions
1398 if (!DI1->isDebugValue())
1401 BBI1->BB->erase(DI1, BBI1->BB->end());
1403 // Kill flags in the true block for registers living into the false block
1405 RemoveKills(BBI1->BB->begin(), BBI1->BB->end(), DontKill, *TRI);
1407 // Remove 'false' block branch and find the last instruction to predicate.
1408 BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1409 DI2 = BBI2->BB->end();
1410 while (NumDups2 != 0) {
1411 // NumDups2 only counted non-dbg_value instructions, so this won't
1412 // run off the head of the list.
1413 assert (DI2 != BBI2->BB->begin());
1415 // skip dbg_value instructions
1416 if (!DI2->isDebugValue())
1420 // Remember which registers would later be defined by the false block.
1421 // This allows us not to predicate instructions in the true block that would
1422 // later be re-defined. That is, rather than
1428 SmallSet<unsigned, 4> RedefsByFalse;
1429 SmallSet<unsigned, 4> ExtUses;
1430 if (TII->isProfitableToUnpredicate(*BBI1->BB, *BBI2->BB)) {
1431 for (MachineBasicBlock::iterator FI = BBI2->BB->begin(); FI != DI2; ++FI) {
1432 if (FI->isDebugValue())
1434 SmallVector<unsigned, 4> Defs;
1435 for (unsigned i = 0, e = FI->getNumOperands(); i != e; ++i) {
1436 const MachineOperand &MO = FI->getOperand(i);
1439 unsigned Reg = MO.getReg();
1443 Defs.push_back(Reg);
1444 } else if (!RedefsByFalse.count(Reg)) {
1445 // These are defined before ctrl flow reach the 'false' instructions.
1446 // They cannot be modified by the 'true' instructions.
1447 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1448 SubRegs.isValid(); ++SubRegs)
1449 ExtUses.insert(*SubRegs);
1453 for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1454 unsigned Reg = Defs[i];
1455 if (!ExtUses.count(Reg)) {
1456 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1457 SubRegs.isValid(); ++SubRegs)
1458 RedefsByFalse.insert(*SubRegs);
1464 // Predicate the 'true' block.
1465 PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, &RedefsByFalse);
1467 // Predicate the 'false' block.
1468 PredicateBlock(*BBI2, DI2, *Cond2);
1470 // Merge the true block into the entry of the diamond.
1471 MergeBlocks(BBI, *BBI1, TailBB == nullptr);
1472 MergeBlocks(BBI, *BBI2, TailBB == nullptr);
1474 // If the if-converted block falls through or unconditionally branches into
1475 // the tail block, and the tail block does not have other predecessors, then
1476 // fold the tail block in as well. Otherwise, unless it falls through to the
1477 // tail, add a unconditional branch to it.
1479 BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
1480 bool CanMergeTail = !TailBBI.HasFallThrough &&
1481 !TailBBI.BB->hasAddressTaken();
1482 // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1483 // check if there are any other predecessors besides those.
1484 unsigned NumPreds = TailBB->pred_size();
1486 CanMergeTail = false;
1487 else if (NumPreds == 1 && CanMergeTail) {
1488 MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1489 if (*PI != BBI1->BB && *PI != BBI2->BB)
1490 CanMergeTail = false;
1493 MergeBlocks(BBI, TailBBI);
1494 TailBBI.IsDone = true;
1496 BBI.BB->addSuccessor(TailBB);
1497 InsertUncondBranch(BBI.BB, TailBB, TII);
1498 BBI.HasFallThrough = false;
1502 // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1503 // which can happen here if TailBB is unanalyzable and is merged, so
1504 // explicitly remove BBI1 and BBI2 as successors.
1505 BBI.BB->removeSuccessor(BBI1->BB);
1506 BBI.BB->removeSuccessor(BBI2->BB);
1507 RemoveExtraEdges(BBI);
1509 // Update block info.
1510 BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1511 InvalidatePreds(BBI.BB);
1513 // FIXME: Must maintain LiveIns.
1517 static bool MaySpeculate(const MachineInstr *MI,
1518 SmallSet<unsigned, 4> &LaterRedefs,
1519 const TargetInstrInfo *TII) {
1520 bool SawStore = true;
1521 if (!MI->isSafeToMove(TII, nullptr, SawStore))
1524 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
1525 const MachineOperand &MO = MI->getOperand(i);
1528 unsigned Reg = MO.getReg();
1531 if (MO.isDef() && !LaterRedefs.count(Reg))
1538 /// PredicateBlock - Predicate instructions from the start of the block to the
1539 /// specified end with the specified condition.
1540 void IfConverter::PredicateBlock(BBInfo &BBI,
1541 MachineBasicBlock::iterator E,
1542 SmallVectorImpl<MachineOperand> &Cond,
1543 SmallSet<unsigned, 4> *LaterRedefs) {
1544 bool AnyUnpred = false;
1545 bool MaySpec = LaterRedefs != nullptr;
1546 for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1547 if (I->isDebugValue() || TII->isPredicated(I))
1549 // It may be possible not to predicate an instruction if it's the 'true'
1550 // side of a diamond and the 'false' side may re-define the instruction's
1552 if (MaySpec && MaySpeculate(I, *LaterRedefs, TII)) {
1556 // If any instruction is predicated, then every instruction after it must
1559 if (!TII->PredicateInstruction(I, Cond)) {
1561 dbgs() << "Unable to predicate " << *I << "!\n";
1563 llvm_unreachable(nullptr);
1566 // If the predicated instruction now redefines a register as the result of
1567 // if-conversion, add an implicit kill.
1568 UpdatePredRedefs(I, Redefs);
1571 BBI.Predicate.append(Cond.begin(), Cond.end());
1573 BBI.IsAnalyzed = false;
1574 BBI.NonPredSize = 0;
1581 /// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1582 /// the destination block. Skip end of block branches if IgnoreBr is true.
1583 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1584 SmallVectorImpl<MachineOperand> &Cond,
1586 MachineFunction &MF = *ToBBI.BB->getParent();
1588 for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1589 E = FromBBI.BB->end(); I != E; ++I) {
1590 // Do not copy the end of the block branches.
1591 if (IgnoreBr && I->isBranch())
1594 MachineInstr *MI = MF.CloneMachineInstr(I);
1595 ToBBI.BB->insert(ToBBI.BB->end(), MI);
1596 ToBBI.NonPredSize++;
1597 unsigned ExtraPredCost = TII->getPredicationCost(&*I);
1598 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
1600 ToBBI.ExtraCost += NumCycles-1;
1601 ToBBI.ExtraCost2 += ExtraPredCost;
1603 if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1604 if (!TII->PredicateInstruction(MI, Cond)) {
1606 dbgs() << "Unable to predicate " << *I << "!\n";
1608 llvm_unreachable(nullptr);
1612 // If the predicated instruction now redefines a register as the result of
1613 // if-conversion, add an implicit kill.
1614 UpdatePredRedefs(MI, Redefs);
1616 // Some kill flags may not be correct anymore.
1617 if (!DontKill.empty())
1618 RemoveKills(*MI, DontKill);
1622 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1623 FromBBI.BB->succ_end());
1624 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1625 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1627 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1628 MachineBasicBlock *Succ = Succs[i];
1629 // Fallthrough edge can't be transferred.
1630 if (Succ == FallThrough)
1632 ToBBI.BB->addSuccessor(Succ);
1636 ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
1637 ToBBI.Predicate.append(Cond.begin(), Cond.end());
1639 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1640 ToBBI.IsAnalyzed = false;
1645 /// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1646 /// This will leave FromBB as an empty block, so remove all of its
1647 /// successor edges except for the fall-through edge. If AddEdges is true,
1648 /// i.e., when FromBBI's branch is being moved, add those successor edges to
1650 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1651 assert(!FromBBI.BB->hasAddressTaken() &&
1652 "Removing a BB whose address is taken!");
1654 ToBBI.BB->splice(ToBBI.BB->end(),
1655 FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1657 std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1658 FromBBI.BB->succ_end());
1659 MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1660 MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
1662 for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1663 MachineBasicBlock *Succ = Succs[i];
1664 // Fallthrough edge can't be transferred.
1665 if (Succ == FallThrough)
1667 FromBBI.BB->removeSuccessor(Succ);
1668 if (AddEdges && !ToBBI.BB->isSuccessor(Succ))
1669 ToBBI.BB->addSuccessor(Succ);
1672 // Now FromBBI always falls through to the next block!
1673 if (NBB && !FromBBI.BB->isSuccessor(NBB))
1674 FromBBI.BB->addSuccessor(NBB);
1676 ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
1677 FromBBI.Predicate.clear();
1679 ToBBI.NonPredSize += FromBBI.NonPredSize;
1680 ToBBI.ExtraCost += FromBBI.ExtraCost;
1681 ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
1682 FromBBI.NonPredSize = 0;
1683 FromBBI.ExtraCost = 0;
1684 FromBBI.ExtraCost2 = 0;
1686 ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1687 ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1688 ToBBI.IsAnalyzed = false;
1689 FromBBI.IsAnalyzed = false;