1 //=----------------------- InterleavedAccessPass.cpp -----------------------==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the Interleaved Access pass, which identifies
11 // interleaved memory accesses and transforms into target specific intrinsics.
13 // An interleaved load reads data from memory into several vectors, with
14 // DE-interleaving the data on a factor. An interleaved store writes several
15 // vectors to memory with RE-interleaving the data on a factor.
17 // As interleaved accesses are hard to be identified in CodeGen (mainly because
18 // the VECTOR_SHUFFLE DAG node is quite different from the shufflevector IR),
19 // we identify and transform them to intrinsics in this pass. So the intrinsics
20 // can be easily matched into target specific instructions later in CodeGen.
22 // E.g. An interleaved load (Factor = 2):
23 // %wide.vec = load <8 x i32>, <8 x i32>* %ptr
24 // %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
25 // %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
27 // It could be transformed into a ld2 intrinsic in AArch64 backend or a vld2
28 // intrinsic in ARM backend.
30 // E.g. An interleaved store (Factor = 3):
31 // %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1,
32 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
33 // store <12 x i32> %i.vec, <12 x i32>* %ptr
35 // It could be transformed into a st3 intrinsic in AArch64 backend or a vst3
36 // intrinsic in ARM backend.
38 //===----------------------------------------------------------------------===//
40 #include "llvm/CodeGen/Passes.h"
41 #include "llvm/IR/InstIterator.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Target/TargetLowering.h"
46 #include "llvm/Target/TargetSubtargetInfo.h"
50 #define DEBUG_TYPE "interleaved-access"
52 static cl::opt<bool> LowerInterleavedAccesses(
53 "lower-interleaved-accesses",
54 cl::desc("Enable lowering interleaved accesses to intrinsics"),
55 cl::init(true), cl::Hidden);
57 static unsigned MaxFactor; // The maximum supported interleave factor.
60 static void initializeInterleavedAccessPass(PassRegistry &);
65 class InterleavedAccess : public FunctionPass {
69 InterleavedAccess(const TargetMachine *TM = nullptr)
70 : FunctionPass(ID), TM(TM), TLI(nullptr) {
71 initializeInterleavedAccessPass(*PassRegistry::getPassRegistry());
74 const char *getPassName() const override { return "Interleaved Access Pass"; }
76 bool runOnFunction(Function &F) override;
79 const TargetMachine *TM;
80 const TargetLowering *TLI;
82 /// \brief Transform an interleaved load into target specific intrinsics.
83 bool lowerInterleavedLoad(LoadInst *LI,
84 SmallVector<Instruction *, 32> &DeadInsts);
86 /// \brief Transform an interleaved store into target specific intrinsics.
87 bool lowerInterleavedStore(StoreInst *SI,
88 SmallVector<Instruction *, 32> &DeadInsts);
90 } // end anonymous namespace.
92 char InterleavedAccess::ID = 0;
93 INITIALIZE_TM_PASS(InterleavedAccess, "interleaved-access",
94 "Lower interleaved memory accesses to target specific intrinsics",
97 FunctionPass *llvm::createInterleavedAccessPass(const TargetMachine *TM) {
98 return new InterleavedAccess(TM);
101 /// \brief Check if the mask is a DE-interleave mask of the given factor
103 /// <Index, Index+Factor, ..., Index+(NumElts-1)*Factor>
104 static bool isDeInterleaveMaskOfFactor(ArrayRef<int> Mask, unsigned Factor,
106 // Check all potential start indices from 0 to (Factor - 1).
107 for (Index = 0; Index < Factor; Index++) {
110 // Check that elements are in ascending order by Factor. Ignore undef
112 for (; i < Mask.size(); i++)
113 if (Mask[i] >= 0 && static_cast<unsigned>(Mask[i]) != Index + i * Factor)
116 if (i == Mask.size())
123 /// \brief Check if the mask is a DE-interleave mask for an interleaved load.
125 /// E.g. DE-interleave masks (Factor = 2) could be:
126 /// <0, 2, 4, 6> (mask of index 0 to extract even elements)
127 /// <1, 3, 5, 7> (mask of index 1 to extract odd elements)
128 static bool isDeInterleaveMask(ArrayRef<int> Mask, unsigned &Factor,
133 // Check potential Factors.
134 for (Factor = 2; Factor <= MaxFactor; Factor++)
135 if (isDeInterleaveMaskOfFactor(Mask, Factor, Index))
141 /// \brief Check if the mask is RE-interleave mask for an interleaved store.
143 /// I.e. <0, NumSubElts, ... , NumSubElts*(Factor - 1), 1, NumSubElts + 1, ...>
145 /// E.g. The RE-interleave mask (Factor = 2) could be:
146 /// <0, 4, 1, 5, 2, 6, 3, 7>
147 static bool isReInterleaveMask(ArrayRef<int> Mask, unsigned &Factor) {
148 unsigned NumElts = Mask.size();
152 // Check potential Factors.
153 for (Factor = 2; Factor <= MaxFactor; Factor++) {
154 if (NumElts % Factor)
157 unsigned NumSubElts = NumElts / Factor;
158 if (!isPowerOf2_32(NumSubElts))
161 // Check whether each element matchs the RE-interleaved rule. Ignore undef
164 for (; i < NumElts; i++)
166 static_cast<unsigned>(Mask[i]) !=
167 (i % Factor) * NumSubElts + i / Factor)
170 // Find a RE-interleaved mask of current factor.
178 bool InterleavedAccess::lowerInterleavedLoad(
179 LoadInst *LI, SmallVector<Instruction *, 32> &DeadInsts) {
183 SmallVector<ShuffleVectorInst *, 4> Shuffles;
185 // Check if all users of this load are shufflevectors.
186 for (auto UI = LI->user_begin(), E = LI->user_end(); UI != E; UI++) {
187 ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(*UI);
188 if (!SVI || !isa<UndefValue>(SVI->getOperand(1)))
191 Shuffles.push_back(SVI);
194 if (Shuffles.empty())
197 unsigned Factor, Index;
199 // Check if the first shufflevector is DE-interleave shuffle.
200 if (!isDeInterleaveMask(Shuffles[0]->getShuffleMask(), Factor, Index))
203 // Holds the corresponding index for each DE-interleave shuffle.
204 SmallVector<unsigned, 4> Indices;
205 Indices.push_back(Index);
207 Type *VecTy = Shuffles[0]->getType();
209 // Check if other shufflevectors are also DE-interleaved of the same type
210 // and factor as the first shufflevector.
211 for (unsigned i = 1; i < Shuffles.size(); i++) {
212 if (Shuffles[i]->getType() != VecTy)
215 if (!isDeInterleaveMaskOfFactor(Shuffles[i]->getShuffleMask(), Factor,
219 Indices.push_back(Index);
222 DEBUG(dbgs() << "IA: Found an interleaved load: " << *LI << "\n");
224 // Try to create target specific intrinsics to replace the load and shuffles.
225 if (!TLI->lowerInterleavedLoad(LI, Shuffles, Indices, Factor))
228 for (auto SVI : Shuffles)
229 DeadInsts.push_back(SVI);
231 DeadInsts.push_back(LI);
235 bool InterleavedAccess::lowerInterleavedStore(
236 StoreInst *SI, SmallVector<Instruction *, 32> &DeadInsts) {
240 ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(SI->getValueOperand());
241 if (!SVI || !SVI->hasOneUse())
244 // Check if the shufflevector is RE-interleave shuffle.
246 if (!isReInterleaveMask(SVI->getShuffleMask(), Factor))
249 DEBUG(dbgs() << "IA: Found an interleaved store: " << *SI << "\n");
251 // Try to create target specific intrinsics to replace the store and shuffle.
252 if (!TLI->lowerInterleavedStore(SI, SVI, Factor))
255 // Already have a new target specific interleaved store. Erase the old store.
256 DeadInsts.push_back(SI);
257 DeadInsts.push_back(SVI);
261 bool InterleavedAccess::runOnFunction(Function &F) {
262 if (!TM || !LowerInterleavedAccesses)
265 DEBUG(dbgs() << "*** " << getPassName() << ": " << F.getName() << "\n");
267 TLI = TM->getSubtargetImpl(F)->getTargetLowering();
268 MaxFactor = TLI->getMaxSupportedInterleaveFactor();
270 // Holds dead instructions that will be erased later.
271 SmallVector<Instruction *, 32> DeadInsts;
272 bool Changed = false;
274 for (auto &I : instructions(F)) {
275 if (LoadInst *LI = dyn_cast<LoadInst>(&I))
276 Changed |= lowerInterleavedLoad(LI, DeadInsts);
278 if (StoreInst *SI = dyn_cast<StoreInst>(&I))
279 Changed |= lowerInterleavedStore(SI, DeadInsts);
282 for (auto I : DeadInsts)
283 I->eraseFromParent();