1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/PassManager.h"
16 #include "llvm/Pass.h"
17 #include "llvm/Assembly/PrintModulePass.h"
18 #include "llvm/Analysis/LoopPass.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Transforms/Scalar.h"
22 #include "llvm/Support/CommandLine.h"
25 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
26 cl::desc("Print LLVM IR produced by the loop-reduce pass"));
27 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
28 cl::desc("Print LLVM IR input to isel pass"));
29 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
30 cl::desc("Dump emitter generated instructions as assembly"));
33 LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
35 CodeGenFileType FileType,
37 // Standard LLVM-Level Passes.
39 // Run loop strength reduction before anything else.
41 PM.add(createLoopStrengthReducePass(getTargetLowering()));
43 PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
46 // FIXME: Implement efficient support for garbage collection intrinsics.
47 PM.add(createLowerGCPass());
49 if (!ExceptionHandling)
50 PM.add(createLowerInvokePass(getTargetLowering()));
52 // Make sure that no unreachable blocks are instruction selected.
53 PM.add(createUnreachableBlockEliminationPass());
56 PM.add(createCodeGenPreparePass(getTargetLowering()));
59 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
62 // Ask the target for an isel.
63 if (addInstSelector(PM, Fast))
64 return FileModel::Error;
66 // Print the instruction selected machine code...
68 PM.add(createMachineFunctionPrinterPass(cerr));
70 PM.add(createMachineLICMPass());
72 // Perform register allocation to convert to a concrete x86 representation
73 PM.add(createRegisterAllocator());
76 PM.add(createMachineFunctionPrinterPass(cerr));
78 PM.add(createLowerSubregsPass());
80 if (PrintMachineCode) // Print the subreg lowered code
81 PM.add(createMachineFunctionPrinterPass(cerr));
83 // Run post-ra passes.
84 if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
85 PM.add(createMachineFunctionPrinterPass(cerr));
87 // Insert prolog/epilog code. Eliminate abstract frame index references...
88 PM.add(createPrologEpilogCodeInserter());
90 // Second pass scheduler.
92 PM.add(createPostRAScheduler());
94 // Branch folding must be run after regalloc and prolog/epilog insertion.
96 PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
98 // Fold redundant debug labels.
99 PM.add(createDebugLabelFoldingPass());
101 if (PrintMachineCode) // Print the register-allocated code
102 PM.add(createMachineFunctionPrinterPass(cerr));
104 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
105 PM.add(createMachineFunctionPrinterPass(cerr));
110 case TargetMachine::AssemblyFile:
111 if (addAssemblyEmitter(PM, Fast, Out))
112 return FileModel::Error;
113 return FileModel::AsmFile;
114 case TargetMachine::ObjectFile:
115 if (getMachOWriterInfo())
116 return FileModel::MachOFile;
117 else if (getELFWriterInfo())
118 return FileModel::ElfFile;
121 return FileModel::Error;
124 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
125 /// be split up (e.g., to add an object writer pass), this method can be used to
126 /// finish up adding passes to emit the file, if necessary.
127 bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
128 MachineCodeEmitter *MCE,
131 addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
133 // Delete machine code for this function
134 PM.add(createMachineCodeDeleter());
136 return false; // success!
139 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
140 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
141 /// actually outputting the machine code and resolving things like the address
142 /// of functions. This method should returns true if machine code emission is
145 bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
146 MachineCodeEmitter &MCE,
148 // Standard LLVM-Level Passes.
150 // Run loop strength reduction before anything else.
152 PM.add(createLoopStrengthReducePass(getTargetLowering()));
154 PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
157 // FIXME: Implement efficient support for garbage collection intrinsics.
158 PM.add(createLowerGCPass());
160 // FIXME: Implement the invoke/unwind instructions!
161 PM.add(createLowerInvokePass(getTargetLowering()));
163 // Make sure that no unreachable blocks are instruction selected.
164 PM.add(createUnreachableBlockEliminationPass());
167 PM.add(createCodeGenPreparePass(getTargetLowering()));
170 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
173 // Ask the target for an isel.
174 if (addInstSelector(PM, Fast))
177 // Print the instruction selected machine code...
178 if (PrintMachineCode)
179 PM.add(createMachineFunctionPrinterPass(cerr));
181 PM.add(createMachineLICMPass());
183 // Perform register allocation to convert to a concrete x86 representation
184 PM.add(createRegisterAllocator());
186 if (PrintMachineCode)
187 PM.add(createMachineFunctionPrinterPass(cerr));
189 PM.add(createLowerSubregsPass());
191 if (PrintMachineCode) // Print the subreg lowered code
192 PM.add(createMachineFunctionPrinterPass(cerr));
194 // Run post-ra passes.
195 if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
196 PM.add(createMachineFunctionPrinterPass(cerr));
198 // Insert prolog/epilog code. Eliminate abstract frame index references...
199 PM.add(createPrologEpilogCodeInserter());
201 if (PrintMachineCode) // Print the register-allocated code
202 PM.add(createMachineFunctionPrinterPass(cerr));
204 // Second pass scheduler.
206 PM.add(createPostRAScheduler());
208 // Branch folding must be run after regalloc and prolog/epilog insertion.
210 PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
212 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
213 PM.add(createMachineFunctionPrinterPass(cerr));
215 addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
217 // Delete machine code for this function
218 PM.add(createMachineCodeDeleter());
220 return false; // success!