1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Transforms/Scalar.h"
15 #include "llvm/PassManager.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/Target/TargetInstrInfo.h"
21 #include "llvm/Target/TargetLowering.h"
22 #include "llvm/Target/TargetLoweringObjectFile.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
26 #include "llvm/Target/TargetRegisterInfo.h"
27 #include "llvm/MC/MCAsmInfo.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/MC/MCInstrInfo.h"
30 #include "llvm/MC/MCStreamer.h"
31 #include "llvm/MC/MCSubtargetInfo.h"
32 #include "llvm/ADT/OwningPtr.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/FormattedStream.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/TargetRegistry.h"
39 // Enable or disable FastISel. Both options are needed, because
40 // FastISel is enabled by default with -fast, and we wish to be
41 // able to enable or disable fast-isel independently from -O0.
42 static cl::opt<cl::boolOrDefault>
43 EnableFastISelOption("fast-isel", cl::Hidden,
44 cl::desc("Enable the \"fast\" instruction selector"));
46 static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
47 cl::desc("Show encoding in .s output"));
48 static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
49 cl::desc("Show instruction structure in .s output"));
51 static cl::opt<cl::boolOrDefault>
52 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
53 cl::init(cl::BOU_UNSET));
55 static bool getVerboseAsm() {
57 case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
58 case cl::BOU_TRUE: return true;
59 case cl::BOU_FALSE: return false;
61 llvm_unreachable("Invalid verbose asm state");
64 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
65 StringRef CPU, StringRef FS,
66 TargetOptions Options,
67 Reloc::Model RM, CodeModel::Model CM,
69 : TargetMachine(T, Triple, CPU, FS, Options) {
70 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
71 AsmInfo = T.createMCAsmInfo(Triple);
72 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
73 // and if the old one gets included then MCAsmInfo will be NULL and
75 // Provide the user with a useful error message about what's wrong.
76 assert(AsmInfo && "MCAsmInfo not initialized."
77 "Make sure you include the correct TargetSelect.h"
78 "and that InitializeAllTargetMCs() is being invoked!");
81 /// Turn exception handling constructs into something the code generators can
83 static void addPassesToHandleExceptions(TargetMachine *TM,
84 PassManagerBase &PM) {
85 switch (TM->getMCAsmInfo()->getExceptionHandlingType()) {
86 case ExceptionHandling::SjLj:
87 // SjLj piggy-backs on dwarf for this bit. The cleanups done apply to both
88 // Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
89 // catch info can get misplaced when a selector ends up more than one block
90 // removed from the parent invoke(s). This could happen when a landing
91 // pad is shared by multiple invokes and is also a target of a normal
92 // edge from elsewhere.
93 PM.add(createSjLjEHPreparePass(TM->getTargetLowering()));
95 case ExceptionHandling::DwarfCFI:
96 case ExceptionHandling::ARM:
97 case ExceptionHandling::Win64:
98 PM.add(createDwarfEHPass(TM));
100 case ExceptionHandling::None:
101 PM.add(createLowerInvokePass(TM->getTargetLowering()));
103 // The lower invoke pass may create unreachable code. Remove it.
104 PM.add(createUnreachableBlockEliminationPass());
109 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
110 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
112 bool DisableVerify) {
113 // Targets may override createPassConfig to provide a target-specific sublass.
114 TargetPassConfig *PassConfig = TM->createPassConfig(PM);
116 // Set PassConfig options provided by TargetMachine.
117 PassConfig->setDisableVerify(DisableVerify);
121 PassConfig->addIRPasses();
123 addPassesToHandleExceptions(TM, PM);
125 PassConfig->addISelPrepare();
127 // Install a MachineModuleInfo class, which is an immutable pass that holds
128 // all the per-module stuff we're generating, including MCContext.
129 MachineModuleInfo *MMI =
130 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
131 &TM->getTargetLowering()->getObjFileLowering());
133 MCContext *Context = &MMI->getContext(); // Return the MCContext by-ref.
135 // Set up a MachineFunction for the rest of CodeGen to work on.
136 PM.add(new MachineFunctionAnalysis(*TM));
138 // Enable FastISel with -fast, but allow that to be overridden.
139 if (EnableFastISelOption == cl::BOU_TRUE ||
140 (TM->getOptLevel() == CodeGenOpt::None &&
141 EnableFastISelOption != cl::BOU_FALSE))
142 TM->setFastISel(true);
144 // Ask the target for an isel.
145 if (PassConfig->addInstSelector())
148 PassConfig->addMachinePasses();
150 PassConfig->setInitialized();
155 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
156 formatted_raw_ostream &Out,
157 CodeGenFileType FileType,
158 bool DisableVerify) {
159 // Add common CodeGen passes.
160 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify);
164 if (hasMCSaveTempLabels())
165 Context->setAllowTemporaryLabels(false);
167 const MCAsmInfo &MAI = *getMCAsmInfo();
168 const MCRegisterInfo &MRI = *getRegisterInfo();
169 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
170 OwningPtr<MCStreamer> AsmStreamer;
173 case CGFT_AssemblyFile: {
174 MCInstPrinter *InstPrinter =
175 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
177 Context->getRegisterInfo(), STI);
179 // Create a code emitter if asked to show the encoding.
180 MCCodeEmitter *MCE = 0;
181 MCAsmBackend *MAB = 0;
182 if (ShowMCEncoding) {
183 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
184 MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
186 MAB = getTarget().createMCAsmBackend(getTargetTriple());
189 MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
193 hasMCUseDwarfDirectory(),
197 AsmStreamer.reset(S);
200 case CGFT_ObjectFile: {
201 // Create the code emitter for the target if it exists. If not, .o file
203 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
205 MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
206 if (MCE == 0 || MAB == 0)
209 AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(),
211 MCE, hasMCRelaxAll(),
212 hasMCNoExecStack()));
213 AsmStreamer.get()->InitSections();
217 // The Null output is intended for use for performance analysis and testing,
219 AsmStreamer.reset(createNullStreamer(*Context));
223 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
224 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
228 // If successful, createAsmPrinter took ownership of AsmStreamer.
233 PM.add(createGCInfoDeleter());
237 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
238 /// get machine code emitted. This uses a JITCodeEmitter object to handle
239 /// actually outputting the machine code and resolving things like the address
240 /// of functions. This method should returns true if machine code emission is
243 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
245 bool DisableVerify) {
246 // Add common CodeGen passes.
247 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify);
251 addCodeEmitter(PM, JCE);
252 PM.add(createGCInfoDeleter());
254 return false; // success!
257 /// addPassesToEmitMC - Add passes to the specified pass manager to get
258 /// machine code emitted with the MCJIT. This method returns true if machine
259 /// code is not supported. It fills the MCContext Ctx pointer which can be
260 /// used to build custom MCStreamer.
262 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
265 bool DisableVerify) {
266 // Add common CodeGen passes.
267 Ctx = addPassesToGenerateCode(this, PM, DisableVerify);
271 if (hasMCSaveTempLabels())
272 Ctx->setAllowTemporaryLabels(false);
274 // Create the code emitter for the target if it exists. If not, .o file
276 const MCRegisterInfo &MRI = *getRegisterInfo();
277 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
278 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
280 MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());
281 if (MCE == 0 || MAB == 0)
284 OwningPtr<MCStreamer> AsmStreamer;
285 AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(), *Ctx,
288 hasMCNoExecStack()));
289 AsmStreamer.get()->InitSections();
291 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
292 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
296 // If successful, createAsmPrinter took ownership of AsmStreamer.
301 return false; // success!