1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/ADT/OwningPtr.h"
16 #include "llvm/Assembly/PrintModulePass.h"
17 #include "llvm/CodeGen/AsmPrinter.h"
18 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/PassManager.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/FormattedStream.h"
30 #include "llvm/Support/TargetRegistry.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetLowering.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetRegisterInfo.h"
36 #include "llvm/Target/TargetSubtargetInfo.h"
37 #include "llvm/Transforms/Scalar.h"
40 // Enable or disable FastISel. Both options are needed, because
41 // FastISel is enabled by default with -fast, and we wish to be
42 // able to enable or disable fast-isel independently from -O0.
43 static cl::opt<cl::boolOrDefault>
44 EnableFastISelOption("fast-isel", cl::Hidden,
45 cl::desc("Enable the \"fast\" instruction selector"));
47 static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
48 cl::desc("Show encoding in .s output"));
49 static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
50 cl::desc("Show instruction structure in .s output"));
52 static cl::opt<cl::boolOrDefault>
53 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
54 cl::init(cl::BOU_UNSET));
56 static bool getVerboseAsm() {
58 case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
59 case cl::BOU_TRUE: return true;
60 case cl::BOU_FALSE: return false;
62 llvm_unreachable("Invalid verbose asm state");
65 void LLVMTargetMachine::initAsmInfo() {
66 AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
67 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
68 // and if the old one gets included then MCAsmInfo will be NULL and
70 // Provide the user with a useful error message about what's wrong.
71 assert(AsmInfo && "MCAsmInfo not initialized."
72 "Make sure you include the correct TargetSelect.h"
73 "and that InitializeAllTargetMCs() is being invoked!");
76 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
77 StringRef CPU, StringRef FS,
78 TargetOptions Options,
79 Reloc::Model RM, CodeModel::Model CM,
81 : TargetMachine(T, Triple, CPU, FS, Options) {
82 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
85 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
86 PM.add(createBasicTargetTransformInfoPass(getTargetLowering()));
89 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
90 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
93 AnalysisID StartAfter,
94 AnalysisID StopAfter) {
95 // Targets may override createPassConfig to provide a target-specific sublass.
96 TargetPassConfig *PassConfig = TM->createPassConfig(PM);
97 PassConfig->setStartStopPasses(StartAfter, StopAfter);
99 // Set PassConfig options provided by TargetMachine.
100 PassConfig->setDisableVerify(DisableVerify);
104 PassConfig->addIRPasses();
106 PassConfig->addCodeGenPrepare();
108 PassConfig->addPassesToHandleExceptions();
110 PassConfig->addISelPrepare();
112 // Install a MachineModuleInfo class, which is an immutable pass that holds
113 // all the per-module stuff we're generating, including MCContext.
114 MachineModuleInfo *MMI =
115 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
116 &TM->getTargetLowering()->getObjFileLowering());
118 MCContext *Context = &MMI->getContext(); // Return the MCContext by-ref.
120 // Set up a MachineFunction for the rest of CodeGen to work on.
121 PM.add(new MachineFunctionAnalysis(*TM));
123 // Enable FastISel with -fast, but allow that to be overridden.
124 if (EnableFastISelOption == cl::BOU_TRUE ||
125 (TM->getOptLevel() == CodeGenOpt::None &&
126 EnableFastISelOption != cl::BOU_FALSE))
127 TM->setFastISel(true);
129 // Ask the target for an isel.
130 if (PassConfig->addInstSelector())
133 PassConfig->addMachinePasses();
135 PassConfig->setInitialized();
140 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
141 formatted_raw_ostream &Out,
142 CodeGenFileType FileType,
144 AnalysisID StartAfter,
145 AnalysisID StopAfter) {
146 // Add common CodeGen passes.
147 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
148 StartAfter, StopAfter);
153 // FIXME: The intent is that this should eventually write out a YAML file,
154 // containing the LLVM IR, the machine-level IR (when stopping after a
155 // machine-level pass), and whatever other information is needed to
156 // deserialize the code and resume compilation. For now, just write the
158 PM.add(createPrintModulePass(&Out));
162 if (hasMCSaveTempLabels())
163 Context->setAllowTemporaryLabels(false);
165 const MCAsmInfo &MAI = *getMCAsmInfo();
166 const MCRegisterInfo &MRI = *getRegisterInfo();
167 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
168 OwningPtr<MCStreamer> AsmStreamer;
171 case CGFT_AssemblyFile: {
172 MCInstPrinter *InstPrinter =
173 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
175 Context->getRegisterInfo(), STI);
177 // Create a code emitter if asked to show the encoding.
178 MCCodeEmitter *MCE = 0;
179 MCAsmBackend *MAB = 0;
180 if (ShowMCEncoding) {
181 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
182 MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
184 MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
187 MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
191 hasMCUseDwarfDirectory(),
195 AsmStreamer.reset(S);
198 case CGFT_ObjectFile: {
199 // Create the code emitter for the target if it exists. If not, .o file
201 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
203 MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(),
205 if (MCE == 0 || MAB == 0)
208 AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(),
210 MCE, hasMCRelaxAll(),
211 hasMCNoExecStack()));
212 AsmStreamer.get()->setAutoInitSections(true);
216 // The Null output is intended for use for performance analysis and testing,
218 AsmStreamer.reset(createNullStreamer(*Context));
222 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
223 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
227 // If successful, createAsmPrinter took ownership of AsmStreamer.
235 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
236 /// get machine code emitted. This uses a JITCodeEmitter object to handle
237 /// actually outputting the machine code and resolving things like the address
238 /// of functions. This method should returns true if machine code emission is
241 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
243 bool DisableVerify) {
244 // Add common CodeGen passes.
245 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
249 addCodeEmitter(PM, JCE);
251 return false; // success!
254 /// addPassesToEmitMC - Add passes to the specified pass manager to get
255 /// machine code emitted with the MCJIT. This method returns true if machine
256 /// code is not supported. It fills the MCContext Ctx pointer which can be
257 /// used to build custom MCStreamer.
259 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
262 bool DisableVerify) {
263 // Add common CodeGen passes.
264 Ctx = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
268 if (hasMCSaveTempLabels())
269 Ctx->setAllowTemporaryLabels(false);
271 // Create the code emitter for the target if it exists. If not, .o file
273 const MCRegisterInfo &MRI = *getRegisterInfo();
274 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
275 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
277 MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple(), TargetCPU);
278 if (MCE == 0 || MAB == 0)
281 OwningPtr<MCStreamer> AsmStreamer;
282 AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(), *Ctx,
285 hasMCNoExecStack()));
286 AsmStreamer.get()->InitSections();
288 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
289 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
293 // If successful, createAsmPrinter took ownership of AsmStreamer.
298 return false; // success!