1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/PassManager.h"
16 #include "llvm/Pass.h"
17 #include "llvm/Assembly/PrintModulePass.h"
18 #include "llvm/Analysis/LoopPass.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/GCStrategy.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetAsmInfo.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/raw_ostream.h"
32 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
33 cl::desc("Print LLVM IR produced by the loop-reduce pass"));
34 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
35 cl::desc("Print LLVM IR input to isel pass"));
36 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
37 cl::desc("Dump emitter generated instructions as assembly"));
38 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
39 cl::desc("Dump garbage collector data"));
41 // Hidden options to help debugging
43 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
44 cl::desc("Perform sinking on machine code"));
46 EnableLICM("machine-licm",
47 cl::init(false), cl::Hidden,
48 cl::desc("Perform loop-invariant code motion on machine code"));
50 // When this works it will be on by default.
52 DisablePostRAScheduler("disable-post-RA-scheduler",
53 cl::desc("Disable scheduling after register allocation"),
56 // Enable or disable FastISel. Both options are needed, because
57 // FastISel is enabled by default with -fast, and we wish to be
58 // able to enable or disable fast-isel independently from -fast.
60 EnableFastISelOption("fast-isel", cl::Hidden,
61 cl::desc("Enable the experimental \"fast\" instruction selector"));
63 DisableFastISelOption("disable-fast-isel", cl::Hidden,
64 cl::desc("Disable the experimental \"fast\" instruction selector"));
67 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
69 CodeGenFileType FileType,
71 // Add common CodeGen passes.
72 if (addCommonCodeGenPasses(PM, Fast))
73 return FileModel::Error;
75 // Fold redundant debug labels.
76 PM.add(createDebugLabelFoldingPass());
79 PM.add(createMachineFunctionPrinterPass(cerr));
81 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
82 PM.add(createMachineFunctionPrinterPass(cerr));
85 PM.add(createLoopAlignerPass());
90 case TargetMachine::AssemblyFile:
91 if (addAssemblyEmitter(PM, Fast, Out))
92 return FileModel::Error;
93 return FileModel::AsmFile;
94 case TargetMachine::ObjectFile:
95 if (getMachOWriterInfo())
96 return FileModel::MachOFile;
97 else if (getELFWriterInfo())
98 return FileModel::ElfFile;
101 return FileModel::Error;
104 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
105 /// be split up (e.g., to add an object writer pass), this method can be used to
106 /// finish up adding passes to emit the file, if necessary.
107 bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
108 MachineCodeEmitter *MCE,
111 addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
113 PM.add(createGCInfoDeleter());
115 // Delete machine code for this function
116 PM.add(createMachineCodeDeleter());
118 return false; // success!
121 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
122 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
123 /// actually outputting the machine code and resolving things like the address
124 /// of functions. This method should returns true if machine code emission is
127 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
128 MachineCodeEmitter &MCE,
130 // Add common CodeGen passes.
131 if (addCommonCodeGenPasses(PM, Fast))
134 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
135 PM.add(createMachineFunctionPrinterPass(cerr));
137 addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
139 PM.add(createGCInfoDeleter());
141 // Delete machine code for this function
142 PM.add(createMachineCodeDeleter());
144 return false; // success!
147 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
148 /// both emitting to assembly files or machine code output.
150 bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
151 // Standard LLVM-Level Passes.
153 // Run loop strength reduction before anything else.
155 PM.add(createLoopStrengthReducePass(getTargetLowering()));
157 PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
160 PM.add(createGCLoweringPass());
162 if (!getTargetAsmInfo()->doesSupportExceptionHandling())
163 PM.add(createLowerInvokePass(getTargetLowering()));
165 // Make sure that no unreachable blocks are instruction selected.
166 PM.add(createUnreachableBlockEliminationPass());
169 PM.add(createCodeGenPreparePass(getTargetLowering()));
172 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
175 // Standard Lower-Level Passes.
177 // Enable FastISel with -fast, but allow that to be overridden.
178 assert((!EnableFastISelOption || !DisableFastISelOption) &&
179 "Both -fast-isel and -disable-fast-isel given!");
180 if (EnableFastISelOption ||
181 (Fast && !DisableFastISelOption))
182 EnableFastISel = true;
184 // Ask the target for an isel.
185 if (addInstSelector(PM, Fast))
188 // Print the instruction selected machine code...
189 if (PrintMachineCode)
190 PM.add(createMachineFunctionPrinterPass(cerr));
192 // If we're using Fast-ISel, clean up the mess.
194 PM.add(createDeadMachineInstructionElimPass());
197 PM.add(createMachineLICMPass());
200 PM.add(createMachineSinkingPass());
202 // Run pre-ra passes.
203 if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
204 PM.add(createMachineFunctionPrinterPass(cerr));
206 // Perform register allocation.
207 PM.add(createRegisterAllocator());
209 // Perform stack slot coloring.
211 PM.add(createStackSlotColoringPass());
213 if (PrintMachineCode) // Print the register-allocated code
214 PM.add(createMachineFunctionPrinterPass(cerr));
216 // Run post-ra passes.
217 if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
218 PM.add(createMachineFunctionPrinterPass(cerr));
220 if (PrintMachineCode)
221 PM.add(createMachineFunctionPrinterPass(cerr));
223 PM.add(createLowerSubregsPass());
225 if (PrintMachineCode) // Print the subreg lowered code
226 PM.add(createMachineFunctionPrinterPass(cerr));
228 // Insert prolog/epilog code. Eliminate abstract frame index references...
229 PM.add(createPrologEpilogCodeInserter());
231 if (PrintMachineCode)
232 PM.add(createMachineFunctionPrinterPass(cerr));
234 // Second pass scheduler.
235 if (!Fast && !DisablePostRAScheduler)
236 PM.add(createPostRAScheduler());
238 // Branch folding must be run after regalloc and prolog/epilog insertion.
240 PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
242 PM.add(createGCMachineCodeAnalysisPass());
244 if (PrintMachineCode)
245 PM.add(createMachineFunctionPrinterPass(cerr));
248 PM.add(createGCInfoPrinter(*cerr));