1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/ADT/OwningPtr.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
18 #include "llvm/CodeGen/MachineModuleInfo.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/IR/IRPrintingPasses.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/PassManager.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/FormattedStream.h"
30 #include "llvm/Support/TargetRegistry.h"
31 #include "llvm/Target/TargetInstrInfo.h"
32 #include "llvm/Target/TargetLowering.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Target/TargetRegisterInfo.h"
36 #include "llvm/Target/TargetSubtargetInfo.h"
37 #include "llvm/Transforms/Scalar.h"
40 // Enable or disable FastISel. Both options are needed, because
41 // FastISel is enabled by default with -fast, and we wish to be
42 // able to enable or disable fast-isel independently from -O0.
43 static cl::opt<cl::boolOrDefault>
44 EnableFastISelOption("fast-isel", cl::Hidden,
45 cl::desc("Enable the \"fast\" instruction selector"));
47 static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
48 cl::desc("Show encoding in .s output"));
49 static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
50 cl::desc("Show instruction structure in .s output"));
52 static cl::opt<cl::boolOrDefault>
53 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
54 cl::init(cl::BOU_UNSET));
56 static bool getVerboseAsm() {
58 case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
59 case cl::BOU_TRUE: return true;
60 case cl::BOU_FALSE: return false;
62 llvm_unreachable("Invalid verbose asm state");
65 void LLVMTargetMachine::initAsmInfo() {
66 MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(),
68 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
69 // and if the old one gets included then MCAsmInfo will be NULL and
71 // Provide the user with a useful error message about what's wrong.
72 assert(TmpAsmInfo && "MCAsmInfo not initialized. "
73 "Make sure you include the correct TargetSelect.h"
74 "and that InitializeAllTargetMCs() is being invoked!");
76 if (Options.DisableIntegratedAS)
77 TmpAsmInfo->setUseIntegratedAssembler(false);
82 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
83 StringRef CPU, StringRef FS,
84 TargetOptions Options,
85 Reloc::Model RM, CodeModel::Model CM,
87 : TargetMachine(T, Triple, CPU, FS, Options) {
88 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
91 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
92 PM.add(createBasicTargetTransformInfoPass(this));
95 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
96 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
99 AnalysisID StartAfter,
100 AnalysisID StopAfter) {
101 // Add internal analysis passes from the target machine.
102 TM->addAnalysisPasses(PM);
104 // Targets may override createPassConfig to provide a target-specific sublass.
105 TargetPassConfig *PassConfig = TM->createPassConfig(PM);
106 PassConfig->setStartStopPasses(StartAfter, StopAfter);
108 // Set PassConfig options provided by TargetMachine.
109 PassConfig->setDisableVerify(DisableVerify);
113 PassConfig->addIRPasses();
115 PassConfig->addCodeGenPrepare();
117 PassConfig->addPassesToHandleExceptions();
119 PassConfig->addISelPrepare();
121 // Install a MachineModuleInfo class, which is an immutable pass that holds
122 // all the per-module stuff we're generating, including MCContext.
123 MachineModuleInfo *MMI =
124 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
125 &TM->getTargetLowering()->getObjFileLowering());
128 // Set up a MachineFunction for the rest of CodeGen to work on.
129 PM.add(new MachineFunctionAnalysis(*TM));
131 // Enable FastISel with -fast, but allow that to be overridden.
132 if (EnableFastISelOption == cl::BOU_TRUE ||
133 (TM->getOptLevel() == CodeGenOpt::None &&
134 EnableFastISelOption != cl::BOU_FALSE))
135 TM->setFastISel(true);
137 // Ask the target for an isel.
138 if (PassConfig->addInstSelector())
141 PassConfig->addMachinePasses();
143 PassConfig->setInitialized();
145 return &MMI->getContext();
148 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
149 formatted_raw_ostream &Out,
150 CodeGenFileType FileType,
152 AnalysisID StartAfter,
153 AnalysisID StopAfter) {
154 // Add common CodeGen passes.
155 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
156 StartAfter, StopAfter);
161 // FIXME: The intent is that this should eventually write out a YAML file,
162 // containing the LLVM IR, the machine-level IR (when stopping after a
163 // machine-level pass), and whatever other information is needed to
164 // deserialize the code and resume compilation. For now, just write the
166 PM.add(createPrintModulePass(Out));
170 if (hasMCSaveTempLabels())
171 Context->setAllowTemporaryLabels(false);
173 const MCAsmInfo &MAI = *getMCAsmInfo();
174 const MCRegisterInfo &MRI = *getRegisterInfo();
175 const MCInstrInfo &MII = *getInstrInfo();
176 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
177 OwningPtr<MCStreamer> AsmStreamer;
180 case CGFT_AssemblyFile: {
181 MCInstPrinter *InstPrinter =
182 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
185 // Create a code emitter if asked to show the encoding.
186 MCCodeEmitter *MCE = 0;
188 MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context);
190 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
192 MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
195 hasMCUseDwarfDirectory(),
199 AsmStreamer.reset(S);
202 case CGFT_ObjectFile: {
203 // Create the code emitter for the target if it exists. If not, .o file
205 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI,
207 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
209 if (MCE == 0 || MAB == 0)
212 AsmStreamer.reset(getTarget().createMCObjectStreamer(
213 getTargetTriple(), *Context, *MAB, Out, MCE, STI, hasMCRelaxAll(),
214 hasMCNoExecStack()));
218 // The Null output is intended for use for performance analysis and testing,
220 AsmStreamer.reset(createNullStreamer(*Context));
224 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
225 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
229 // If successful, createAsmPrinter took ownership of AsmStreamer.
230 AsmStreamer.release();
237 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
238 /// get machine code emitted. This uses a JITCodeEmitter object to handle
239 /// actually outputting the machine code and resolving things like the address
240 /// of functions. This method should return true if machine code emission is
243 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
245 bool DisableVerify) {
246 // Add common CodeGen passes.
247 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
251 addCodeEmitter(PM, JCE);
253 return false; // success!
256 /// addPassesToEmitMC - Add passes to the specified pass manager to get
257 /// machine code emitted with the MCJIT. This method returns true if machine
258 /// code is not supported. It fills the MCContext Ctx pointer which can be
259 /// used to build custom MCStreamer.
261 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
264 bool DisableVerify) {
265 // Add common CodeGen passes.
266 Ctx = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
270 if (hasMCSaveTempLabels())
271 Ctx->setAllowTemporaryLabels(false);
273 // Create the code emitter for the target if it exists. If not, .o file
275 const MCRegisterInfo &MRI = *getRegisterInfo();
276 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
277 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
279 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
281 if (MCE == 0 || MAB == 0)
284 OwningPtr<MCStreamer> AsmStreamer;
285 AsmStreamer.reset(getTarget().createMCObjectStreamer(
286 getTargetTriple(), *Ctx, *MAB, Out, MCE, STI, hasMCRelaxAll(),
287 hasMCNoExecStack()));
289 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
290 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
294 // If successful, createAsmPrinter took ownership of AsmStreamer.
295 AsmStreamer.release();
299 return false; // success!