1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LLVMTargetMachine class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/PassManager.h"
16 #include "llvm/Pass.h"
17 #include "llvm/Assembly/PrintModulePass.h"
18 #include "llvm/Analysis/LoopPass.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/CodeGen/GCStrategy.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetAsmInfo.h"
23 #include "llvm/Transforms/Scalar.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/raw_ostream.h"
28 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
29 cl::desc("Print LLVM IR produced by the loop-reduce pass"));
30 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
31 cl::desc("Print LLVM IR input to isel pass"));
32 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
33 cl::desc("Dump emitter generated instructions as assembly"));
34 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
35 cl::desc("Dump garbage collector data"));
37 // Hidden options to help debugging
39 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
40 cl::desc("Perform sinking on machine code"));
42 EnableLICM("machine-licm",
43 cl::init(false), cl::Hidden,
44 cl::desc("Perform loop-invariant code motion on machine code"));
46 // When this works it will be on by default.
48 DisablePostRAScheduler("disable-post-RA-scheduler",
49 cl::desc("Disable scheduling after register allocation"),
53 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
55 CodeGenFileType FileType,
57 // Add common CodeGen passes.
58 if (addCommonCodeGenPasses(PM, Fast))
59 return FileModel::Error;
61 // Fold redundant debug labels.
62 PM.add(createDebugLabelFoldingPass());
65 PM.add(createMachineFunctionPrinterPass(cerr));
67 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
68 PM.add(createMachineFunctionPrinterPass(cerr));
70 if (!Fast && !OptimizeForSize)
71 PM.add(createLoopAlignerPass());
76 case TargetMachine::AssemblyFile:
77 if (addAssemblyEmitter(PM, Fast, Out))
78 return FileModel::Error;
79 return FileModel::AsmFile;
80 case TargetMachine::ObjectFile:
81 if (getMachOWriterInfo())
82 return FileModel::MachOFile;
83 else if (getELFWriterInfo())
84 return FileModel::ElfFile;
87 return FileModel::Error;
90 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
91 /// be split up (e.g., to add an object writer pass), this method can be used to
92 /// finish up adding passes to emit the file, if necessary.
93 bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
94 MachineCodeEmitter *MCE,
97 addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
99 PM.add(createGCInfoDeleter());
101 // Delete machine code for this function
102 PM.add(createMachineCodeDeleter());
104 return false; // success!
107 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
108 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
109 /// actually outputting the machine code and resolving things like the address
110 /// of functions. This method should returns true if machine code emission is
113 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
114 MachineCodeEmitter &MCE,
116 // Add common CodeGen passes.
117 if (addCommonCodeGenPasses(PM, Fast))
120 if (addPreEmitPass(PM, Fast) && PrintMachineCode)
121 PM.add(createMachineFunctionPrinterPass(cerr));
123 addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
125 PM.add(createGCInfoDeleter());
127 // Delete machine code for this function
128 PM.add(createMachineCodeDeleter());
130 return false; // success!
133 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
134 /// both emitting to assembly files or machine code output.
136 bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
137 // Standard LLVM-Level Passes.
139 // Run loop strength reduction before anything else.
141 PM.add(createLoopStrengthReducePass(getTargetLowering()));
143 PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
146 PM.add(createGCLoweringPass());
148 if (!getTargetAsmInfo()->doesSupportExceptionHandling())
149 PM.add(createLowerInvokePass(getTargetLowering()));
151 // Make sure that no unreachable blocks are instruction selected.
152 PM.add(createUnreachableBlockEliminationPass());
155 PM.add(createCodeGenPreparePass(getTargetLowering()));
158 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
161 // Standard Lower-Level Passes.
163 // Ask the target for an isel.
164 if (addInstSelector(PM, Fast))
167 // Print the instruction selected machine code...
168 if (PrintMachineCode)
169 PM.add(createMachineFunctionPrinterPass(cerr));
172 PM.add(createMachineLICMPass());
175 PM.add(createMachineSinkingPass());
177 // Run pre-ra passes.
178 if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
179 PM.add(createMachineFunctionPrinterPass(cerr));
181 // Perform register allocation.
182 PM.add(createRegisterAllocator());
184 // Perform stack slot coloring.
186 PM.add(createStackSlotColoringPass());
188 if (PrintMachineCode) // Print the register-allocated code
189 PM.add(createMachineFunctionPrinterPass(cerr));
191 // Run post-ra passes.
192 if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
193 PM.add(createMachineFunctionPrinterPass(cerr));
195 if (PrintMachineCode)
196 PM.add(createMachineFunctionPrinterPass(cerr));
198 PM.add(createLowerSubregsPass());
200 if (PrintMachineCode) // Print the subreg lowered code
201 PM.add(createMachineFunctionPrinterPass(cerr));
203 // Insert prolog/epilog code. Eliminate abstract frame index references...
204 PM.add(createPrologEpilogCodeInserter());
206 if (PrintMachineCode)
207 PM.add(createMachineFunctionPrinterPass(cerr));
209 // Second pass scheduler.
210 if (!Fast && !DisablePostRAScheduler)
211 PM.add(createPostRAScheduler());
213 // Branch folding must be run after regalloc and prolog/epilog insertion.
215 PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
217 PM.add(createGCMachineCodeAnalysisPass());
219 if (PrintMachineCode)
220 PM.add(createMachineFunctionPrinterPass(cerr));
223 PM.add(createGCInfoPrinter(*cerr));