lib/CodeGen/LLVMTargetMachine.cpp

   1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the LLVMTargetMachine class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Target/TargetMachine.h"
  15 #include "llvm/PassManager.h"
  16 #include "llvm/Pass.h"
  17 #include "llvm/Assembly/PrintModulePass.h"
  18 #include "llvm/Analysis/LoopPass.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/CodeGen/Collector.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetAsmInfo.h"
  23 #include "llvm/Transforms/Scalar.h"
  24 #include "llvm/Support/CommandLine.h"
  25 using namespace llvm;
  26
  27 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
  28     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
  29 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
  30     cl::desc("Print LLVM IR input to isel pass"));
  31 static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
  32     cl::desc("Dump emitter generated instructions as assembly"));
  33 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
  34     cl::desc("Dump garbage collector data"));
  35
  36 // Hidden options to help debugging
  37 static cl::opt<bool>
  38 EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
  39               cl::desc("Perform sinking on machine code"));
  40 static cl::opt<bool>
  41 EnableLICM("machine-licm",
  42            cl::init(false), cl::Hidden,
  43            cl::desc("Perform loop-invariant code motion on machine code"));
  44
  45 // When this works it will be on by default.
  46 static cl::opt<bool>
  47 DisablePostRAScheduler("disable-post-RA-scheduler",
  48                        cl::desc("Disable scheduling after register allocation"),
  49                        cl::init(true));
  50
  51 FileModel::Model
  52 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
  53                                        std::ostream &Out,
  54                                        CodeGenFileType FileType,
  55                                        bool Fast) {
  56   // Standard LLVM-Level Passes.
  57
  58   // Run loop strength reduction before anything else.
  59   if (!Fast) {
  60     PM.add(createLoopStrengthReducePass(getTargetLowering()));
  61     if (PrintLSR)
  62       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
  63   }
  64
  65   PM.add(createGCLoweringPass());
  66
  67   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
  68     PM.add(createLowerInvokePass(getTargetLowering()));
  69
  70   // Make sure that no unreachable blocks are instruction selected.
  71   PM.add(createUnreachableBlockEliminationPass());
  72
  73   if (!Fast)
  74     PM.add(createCodeGenPreparePass(getTargetLowering()));
  75
  76   if (PrintISelInput)
  77     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
  78                                  &cerr));
  79
  80   // Ask the target for an isel.
  81   if (addInstSelector(PM, Fast))
  82     return FileModel::Error;
  83
  84   // Print the instruction selected machine code...
  85   if (PrintMachineCode)
  86     PM.add(createMachineFunctionPrinterPass(cerr));
  87
  88   if (EnableLICM)
  89     PM.add(createMachineLICMPass());
  90
  91   if (EnableSinking)
  92     PM.add(createMachineSinkingPass());
  93
  94   // Run pre-ra passes.
  95   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
  96     PM.add(createMachineFunctionPrinterPass(cerr));
  97
  98   // Perform register allocation to convert to a concrete x86 representation
  99   PM.add(createRegisterAllocator());
 100
 101   // Perform stack slot coloring.
 102   PM.add(createStackSlotColoringPass());
 103
 104   if (PrintMachineCode)  // Print the register-allocated code
 105     PM.add(createMachineFunctionPrinterPass(cerr));
 106
 107   // Run post-ra passes.
 108   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 109     PM.add(createMachineFunctionPrinterPass(cerr));
 110
 111   PM.add(createLowerSubregsPass());
 112
 113   if (PrintMachineCode)  // Print the subreg lowered code
 114     PM.add(createMachineFunctionPrinterPass(cerr));
 115
 116   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 117   PM.add(createPrologEpilogCodeInserter());
 118
 119   if (PrintMachineCode)
 120     PM.add(createMachineFunctionPrinterPass(cerr));
 121
 122   // Second pass scheduler.
 123   if (!Fast && !DisablePostRAScheduler)
 124     PM.add(createPostRAScheduler());
 125
 126   // Branch folding must be run after regalloc and prolog/epilog insertion.
 127   if (!Fast)
 128     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 129
 130   PM.add(createGCMachineCodeAnalysisPass());
 131   if (PrintMachineCode)
 132     PM.add(createMachineFunctionPrinterPass(cerr));
 133
 134   if (PrintGCInfo)
 135     PM.add(createCollectorMetadataPrinter(*cerr));
 136
 137   // Fold redundant debug labels.
 138   PM.add(createDebugLabelFoldingPass());
 139
 140   if (PrintMachineCode)  // Print the register-allocated code
 141     PM.add(createMachineFunctionPrinterPass(cerr));
 142
 143   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 144     PM.add(createMachineFunctionPrinterPass(cerr));
 145
 146   if (!Fast && !OptimizeForSize)
 147     PM.add(createLoopAlignerPass());
 148
 149   switch (FileType) {
 150   default:
 151     break;
 152   case TargetMachine::AssemblyFile:
 153     if (addAssemblyEmitter(PM, Fast, Out))
 154       return FileModel::Error;
 155     return FileModel::AsmFile;
 156   case TargetMachine::ObjectFile:
 157     if (getMachOWriterInfo())
 158       return FileModel::MachOFile;
 159     else if (getELFWriterInfo())
 160       return FileModel::ElfFile;
 161   }
 162
 163   return FileModel::Error;
 164 }
 165
 166 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
 167 /// be split up (e.g., to add an object writer pass), this method can be used to
 168 /// finish up adding passes to emit the file, if necessary.
 169 bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
 170                                                   MachineCodeEmitter *MCE,
 171                                                   bool Fast) {
 172   if (MCE)
 173     addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
 174
 175   PM.add(createCollectorMetadataDeleter());
 176
 177   // Delete machine code for this function
 178   PM.add(createMachineCodeDeleter());
 179
 180   return false; // success!
 181 }
 182
 183 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
 184 /// get machine code emitted.  This uses a MachineCodeEmitter object to handle
 185 /// actually outputting the machine code and resolving things like the address
 186 /// of functions.  This method should returns true if machine code emission is
 187 /// not supported.
 188 ///
 189 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
 190                                                    MachineCodeEmitter &MCE,
 191                                                    bool Fast) {
 192   // Standard LLVM-Level Passes.
 193
 194   // Run loop strength reduction before anything else.
 195   if (!Fast) {
 196     PM.add(createLoopStrengthReducePass(getTargetLowering()));
 197     if (PrintLSR)
 198       PM.add(new PrintFunctionPass("\n\n*** Code after LSR ***\n", &cerr));
 199   }
 200
 201   PM.add(createGCLoweringPass());
 202
 203   if (!getTargetAsmInfo()->doesSupportExceptionHandling())
 204     PM.add(createLowerInvokePass(getTargetLowering()));
 205
 206   // Make sure that no unreachable blocks are instruction selected.
 207   PM.add(createUnreachableBlockEliminationPass());
 208
 209   if (!Fast)
 210     PM.add(createCodeGenPreparePass(getTargetLowering()));
 211
 212   if (PrintISelInput)
 213     PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel ***\n",
 214                                  &cerr));
 215
 216   // Ask the target for an isel.
 217   if (addInstSelector(PM, Fast))
 218     return true;
 219
 220   // Print the instruction selected machine code...
 221   if (PrintMachineCode)
 222     PM.add(createMachineFunctionPrinterPass(cerr));
 223
 224   if (EnableLICM)
 225     PM.add(createMachineLICMPass());
 226
 227   if (EnableSinking)
 228     PM.add(createMachineSinkingPass());
 229
 230   // Run pre-ra passes.
 231   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
 232     PM.add(createMachineFunctionPrinterPass(cerr));
 233
 234   // Perform register allocation.
 235   PM.add(createRegisterAllocator());
 236
 237   // Perform stack slot coloring.
 238   PM.add(createStackSlotColoringPass());
 239
 240   if (PrintMachineCode)
 241     PM.add(createMachineFunctionPrinterPass(cerr));
 242
 243   // Run post-ra passes.
 244   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
 245     PM.add(createMachineFunctionPrinterPass(cerr));
 246
 247   if (PrintMachineCode)  // Print the register-allocated code
 248     PM.add(createMachineFunctionPrinterPass(cerr));
 249
 250   PM.add(createLowerSubregsPass());
 251
 252   if (PrintMachineCode)  // Print the subreg lowered code
 253     PM.add(createMachineFunctionPrinterPass(cerr));
 254
 255   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 256   PM.add(createPrologEpilogCodeInserter());
 257
 258   if (PrintMachineCode)
 259     PM.add(createMachineFunctionPrinterPass(cerr));
 260
 261   // Second pass scheduler.
 262   if (!Fast)
 263     PM.add(createPostRAScheduler());
 264
 265   // Branch folding must be run after regalloc and prolog/epilog insertion.
 266   if (!Fast)
 267     PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
 268
 269   PM.add(createGCMachineCodeAnalysisPass());
 270
 271   if (PrintMachineCode)
 272     PM.add(createMachineFunctionPrinterPass(cerr));
 273
 274   if (PrintGCInfo)
 275     PM.add(createCollectorMetadataPrinter(*cerr));
 276
 277   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
 278     PM.add(createMachineFunctionPrinterPass(cerr));
 279
 280   addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
 281
 282   PM.add(createCollectorMetadataDeleter());
 283
 284   // Delete machine code for this function
 285   PM.add(createMachineCodeDeleter());
 286
 287   return false; // success!
 288 }