1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/ADT/DenseMap.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "LiveInterval.h"
33 class LiveIntervals : public MachineFunctionPass {
35 const TargetMachine* tm_;
36 const MRegisterInfo* mri_;
39 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
42 typedef std::vector<MachineInstr*> Index2MiMap;
45 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
46 Reg2IntervalMap r2iMap_;
48 typedef DenseMap<unsigned> Reg2RegMap;
51 std::vector<bool> allocatableRegs_;
65 static unsigned getBaseIndex(unsigned index) {
66 return index - (index % InstrSlots::NUM);
68 static unsigned getBoundaryIndex(unsigned index) {
69 return getBaseIndex(index + InstrSlots::NUM - 1);
71 static unsigned getLoadIndex(unsigned index) {
72 return getBaseIndex(index) + InstrSlots::LOAD;
74 static unsigned getUseIndex(unsigned index) {
75 return getBaseIndex(index) + InstrSlots::USE;
77 static unsigned getDefIndex(unsigned index) {
78 return getBaseIndex(index) + InstrSlots::DEF;
80 static unsigned getStoreIndex(unsigned index) {
81 return getBaseIndex(index) + InstrSlots::STORE;
84 typedef Reg2IntervalMap::iterator iterator;
85 typedef Reg2IntervalMap::const_iterator const_iterator;
86 const_iterator begin() const { return r2iMap_.begin(); }
87 const_iterator end() const { return r2iMap_.end(); }
88 iterator begin() { return r2iMap_.begin(); }
89 iterator end() { return r2iMap_.end(); }
90 unsigned getNumIntervals() const { return r2iMap_.size(); }
92 LiveInterval &getInterval(unsigned reg) {
93 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
94 assert(I != r2iMap_.end() && "Interval does not exist for register");
98 const LiveInterval &getInterval(unsigned reg) const {
99 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
100 assert(I != r2iMap_.end() && "Interval does not exist for register");
104 /// getInstructionIndex - returns the base index of instr
105 unsigned getInstructionIndex(MachineInstr* instr) const {
106 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
107 assert(it != mi2iMap_.end() && "Invalid instruction!");
111 /// getInstructionFromIndex - given an index in any slot of an
112 /// instruction return a pointer the instruction
113 MachineInstr* getInstructionFromIndex(unsigned index) const {
114 index /= InstrSlots::NUM; // convert index to vector index
115 assert(index < i2miMap_.size() &&
116 "index does not correspond to an instruction");
117 return i2miMap_[index];
120 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
124 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
125 virtual void releaseMemory();
127 /// runOnMachineFunction - pass entry point
128 virtual bool runOnMachineFunction(MachineFunction&);
130 /// print - Implement the dump method.
131 virtual void print(std::ostream &O) const;
134 /// computeIntervals - compute live intervals
135 void computeIntervals();
137 /// joinIntervals - join compatible live intervals
138 void joinIntervals();
140 /// joinIntervalsInMachineBB - Join intervals based on move
141 /// instructions in the specified basic block.
142 void joinIntervalsInMachineBB(MachineBasicBlock *MBB);
144 /// handleRegisterDef - update intervals for a register def
145 /// (calls handlePhysicalRegisterDef and
146 /// handleVirtualRegisterDef)
147 void handleRegisterDef(MachineBasicBlock* mbb,
148 MachineBasicBlock::iterator mi,
151 /// handleVirtualRegisterDef - update intervals for a virtual
153 void handleVirtualRegisterDef(MachineBasicBlock* mbb,
154 MachineBasicBlock::iterator mi,
155 LiveInterval& interval);
157 /// handlePhysicalRegisterDef - update intervals for a
158 /// physical register def
159 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
160 MachineBasicBlock::iterator mi,
161 LiveInterval& interval);
163 /// Return true if the two specified registers belong to different
164 /// register classes. The registers may be either phys or virt regs.
165 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
167 bool overlapsAliases(const LiveInterval *lhs,
168 const LiveInterval *rhs) const;
170 static LiveInterval createInterval(unsigned Reg);
172 LiveInterval &getOrCreateInterval(unsigned reg) {
173 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
174 if (I == r2iMap_.end())
175 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
179 /// rep - returns the representative of this register
180 unsigned rep(unsigned Reg) {
181 unsigned Rep = r2rMap_[Reg];
183 return r2rMap_[Reg] = rep(Rep);
187 void printRegName(unsigned reg) const;
190 } // End llvm namespace