1 //===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LiveInterval analysis pass. Given some numbering of
11 // each the machine instructions (in this implemention depth-first order) an
12 // interval [i, j) is said to be a live interval for register v if there is no
13 // instruction with number j' > j such that v is live at j' abd there is no
14 // instruction with number i' < i such that v is live at i'. In this
15 // implementation intervals can have holes, i.e. an interval might look like
16 // [1,20), [50,65), [1000,1001).
18 //===----------------------------------------------------------------------===//
20 #ifndef LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
21 #define LLVM_CODEGEN_LIVEINTERVAL_ANALYSIS_H
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "LiveInterval.h"
32 class LiveIntervals : public MachineFunctionPass {
34 const TargetMachine* tm_;
35 const MRegisterInfo* mri_;
38 typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
41 typedef std::vector<MachineInstr*> Index2MiMap;
44 typedef std::map<unsigned, LiveInterval> Reg2IntervalMap;
45 Reg2IntervalMap r2iMap_;
47 typedef std::map<unsigned, unsigned> Reg2RegMap;
62 static unsigned getBaseIndex(unsigned index) {
63 return index - (index % InstrSlots::NUM);
65 static unsigned getBoundaryIndex(unsigned index) {
66 return getBaseIndex(index + InstrSlots::NUM - 1);
68 static unsigned getLoadIndex(unsigned index) {
69 return getBaseIndex(index) + InstrSlots::LOAD;
71 static unsigned getUseIndex(unsigned index) {
72 return getBaseIndex(index) + InstrSlots::USE;
74 static unsigned getDefIndex(unsigned index) {
75 return getBaseIndex(index) + InstrSlots::DEF;
77 static unsigned getStoreIndex(unsigned index) {
78 return getBaseIndex(index) + InstrSlots::STORE;
81 // FIXME: this should really be a const_iterator
82 typedef Reg2IntervalMap::iterator iterator;
83 iterator begin() { return r2iMap_.begin(); }
84 iterator end() { return r2iMap_.end(); }
85 unsigned getNumIntervals() const { return r2iMap_.size(); }
87 LiveInterval &getInterval(unsigned reg) {
88 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
89 assert(I != r2iMap_.end() && "Interval does not exist for register");
93 const LiveInterval &getInterval(unsigned reg) const {
94 Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
95 assert(I != r2iMap_.end() && "Interval does not exist for register");
99 /// getInstructionIndex - returns the base index of instr
100 unsigned getInstructionIndex(MachineInstr* instr) const {
101 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr);
102 assert(it != mi2iMap_.end() && "Invalid instruction!");
106 /// getInstructionFromIndex - given an index in any slot of an
107 /// instruction return a pointer the instruction
108 MachineInstr* getInstructionFromIndex(unsigned index) const {
109 index /= InstrSlots::NUM; // convert index to vector index
110 assert(index < i2miMap_.size() &&
111 "index does not correspond to an instruction");
112 return i2miMap_[index];
115 std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
119 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
120 virtual void releaseMemory();
122 /// runOnMachineFunction - pass entry point
123 virtual bool runOnMachineFunction(MachineFunction&);
126 /// computeIntervals - compute live intervals
127 void computeIntervals();
129 /// joinIntervals - join compatible live intervals
130 void joinIntervals();
132 /// joinIntervalsInMachineBB - Join intervals based on move
133 /// instructions in the specified basic block.
134 void joinIntervalsInMachineBB(MachineBasicBlock *MBB);
136 /// handleRegisterDef - update intervals for a register def
137 /// (calls handlePhysicalRegisterDef and
138 /// handleVirtualRegisterDef)
139 void handleRegisterDef(MachineBasicBlock* mbb,
140 MachineBasicBlock::iterator mi,
143 /// handleVirtualRegisterDef - update intervals for a virtual
145 void handleVirtualRegisterDef(MachineBasicBlock* mbb,
146 MachineBasicBlock::iterator mi,
147 LiveInterval& interval);
149 /// handlePhysicalRegisterDef - update intervals for a
150 /// physical register def
151 void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
152 MachineBasicBlock::iterator mi,
153 LiveInterval& interval);
155 /// Return true if the two specified registers belong to different
156 /// register classes. The registers may be either phys or virt regs.
157 bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
159 bool overlapsAliases(const LiveInterval *lhs,
160 const LiveInterval *rhs) const;
162 static LiveInterval createInterval(unsigned Reg);
164 LiveInterval &getOrCreateInterval(unsigned reg) {
165 Reg2IntervalMap::iterator I = r2iMap_.find(reg);
166 if (I == r2iMap_.end())
167 I = r2iMap_.insert(I, std::make_pair(reg, createInterval(reg)));
171 /// rep - returns the representative of this register
172 unsigned rep(unsigned reg) {
173 Reg2RegMap::iterator it = r2rMap_.find(reg);
174 if (it != r2rMap_.end())
175 return it->second = rep(it->second);
179 void printRegName(unsigned reg) const;
182 } // End llvm namespace