1 //===---- LiveRangeCalc.cpp - Calculate live ranges -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Implementation of the LiveRangeCalc class.
12 //===----------------------------------------------------------------------===//
14 #include "LiveRangeCalc.h"
15 #include "llvm/CodeGen/MachineDominators.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
20 #define DEBUG_TYPE "regalloc"
22 void LiveRangeCalc::resetLiveOutMap() {
23 unsigned NumBlocks = MF->getNumBlockIDs();
25 Seen.resize(NumBlocks);
26 Map.resize(NumBlocks);
29 void LiveRangeCalc::reset(const MachineFunction *mf,
31 MachineDominatorTree *MDT,
32 VNInfo::Allocator *VNIA) {
34 MRI = &MF->getRegInfo();
43 static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
44 LiveRange &LR, const MachineOperand &MO) {
45 const MachineInstr *MI = MO.getParent();
48 DefIdx = Indexes.getMBBStartIdx(MI->getParent());
50 DefIdx = Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
52 // Create the def in LR. This may find an existing def.
53 LR.createDeadDef(DefIdx, Alloc);
56 void LiveRangeCalc::calculate(LiveInterval &LI) {
57 assert(MRI && Indexes && "call reset() first");
59 // Step 1: Create minimal live segments for every definition of Reg.
60 // Visit all def operands. If the same instruction has multiple defs of Reg,
61 // createDeadDef() will deduplicate.
62 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
63 unsigned Reg = LI.reg;
64 for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
65 if (!MO.isDef() && !MO.readsReg())
68 unsigned SubReg = MO.getSubReg();
69 if (LI.hasSubRanges() || (SubReg != 0 && MRI->tracksSubRegLiveness())) {
70 unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
71 : MRI->getMaxLaneMaskForVReg(Reg);
73 // If this is the first time we see a subregister def, initialize
74 // subranges by creating a copy of the main range.
75 if (!LI.hasSubRanges() && !LI.empty()) {
76 unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
77 LI.createSubRangeFrom(*Alloc, ClassMask, LI);
80 for (LiveInterval::SubRange &S : LI.subranges()) {
81 // A Mask for subregs common to the existing subrange and current def.
82 unsigned Common = S.LaneMask & Mask;
85 // A Mask for subregs covered by the subrange but not the current def.
86 unsigned LRest = S.LaneMask & ~Mask;
87 LiveInterval::SubRange *CommonRange;
89 // Split current subrange into Common and LRest ranges.
91 CommonRange = LI.createSubRangeFrom(*Alloc, Common, S);
93 assert(Common == S.LaneMask);
97 createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
100 // Create a new SubRange for subregs we did not cover yet.
102 LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
104 createDeadDef(*Indexes, *Alloc, *NewRange, MO);
108 // Create the def in the main liverange. We do not have to do this if
109 // subranges are tracked as we recreate the main range later in this case.
110 if (MO.isDef() && !LI.hasSubRanges())
111 createDeadDef(*Indexes, *Alloc, LI, MO);
114 // We may have created empty live ranges for partially undefined uses, we
115 // can't keep them because we won't find defs in them later.
116 LI.removeEmptySubRanges();
118 // Step 2: Extend live segments to all uses, constructing SSA form as
120 if (LI.hasSubRanges()) {
121 for (LiveInterval::SubRange &S : LI.subranges()) {
123 extendToUses(S, Reg, S.LaneMask);
126 LI.constructMainRangeFromSubranges(*Indexes, *Alloc);
129 extendToUses(LI, Reg, ~0u);
134 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
135 assert(MRI && Indexes && "call reset() first");
137 // Visit all def operands. If the same instruction has multiple defs of Reg,
138 // LR.createDeadDef() will deduplicate.
139 for (MachineOperand &MO : MRI->def_operands(Reg))
140 createDeadDef(*Indexes, *Alloc, LR, MO);
144 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) {
145 // Visit all operands that read Reg. This may include partial defs.
146 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
147 for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
148 // Clear all kill flags. They will be reinserted after register allocation
149 // by LiveIntervalAnalysis::addKillFlags().
153 // We only care about uses, but on the main range (mask ~0u) this includes
154 // the "virtual" reads happening for subregister defs.
161 unsigned SubReg = MO.getSubReg();
163 unsigned SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
164 // Ignore uses not covering the current subrange.
165 if ((SubRegMask & Mask) == 0)
169 // Determine the actual place of the use.
170 const MachineInstr *MI = MO.getParent();
171 unsigned OpNo = (&MO - &MI->getOperand(0));
174 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
175 // The actual place where a phi operand is used is the end of the pred
176 // MBB. PHI operands are paired: (Reg, PredMBB).
177 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
179 // Check for early-clobber redefs.
180 bool isEarlyClobber = false;
183 isEarlyClobber = MO.isEarlyClobber();
184 else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
185 // FIXME: This would be a lot easier if tied early-clobber uses also
186 // had an early-clobber flag.
187 isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
189 UseIdx = Indexes->getInstructionIndex(MI).getRegSlot(isEarlyClobber);
192 // MI is reading Reg. We may have visited MI before if it happens to be
193 // reading Reg multiple times. That is OK, extend() is idempotent.
194 extend(LR, UseIdx, Reg);
199 void LiveRangeCalc::updateFromLiveIns() {
200 LiveRangeUpdater Updater;
201 for (const LiveInBlock &I : LiveIn) {
204 MachineBasicBlock *MBB = I.DomNode->getBlock();
205 assert(I.Value && "No live-in value found");
206 SlotIndex Start, End;
207 std::tie(Start, End) = Indexes->getMBBRange(MBB);
209 if (I.Kill.isValid())
210 // Value is killed inside this block.
213 // The value is live-through, update LiveOut as well.
214 // Defer the Domtree lookup until it is needed.
215 assert(Seen.test(MBB->getNumber()));
216 Map[MBB] = LiveOutPair(I.Value, nullptr);
218 Updater.setDest(&I.LR);
219 Updater.add(Start, End, I.Value);
225 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
226 assert(Kill.isValid() && "Invalid SlotIndex");
227 assert(Indexes && "Missing SlotIndexes");
228 assert(DomTree && "Missing dominator tree");
230 MachineBasicBlock *KillMBB = Indexes->getMBBFromIndex(Kill.getPrevSlot());
231 assert(KillMBB && "No MBB at Kill");
233 // Is there a def in the same MBB we can extend?
234 if (LR.extendInBlock(Indexes->getMBBStartIdx(KillMBB), Kill))
237 // Find the single reaching def, or determine if Kill is jointly dominated by
238 // multiple values, and we may need to create even more phi-defs to preserve
239 // VNInfo SSA form. Perform a search for all predecessor blocks where we
240 // know the dominating VNInfo.
241 if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
244 // When there were multiple different values, we may need new PHIs.
249 // This function is called by a client after using the low-level API to add
250 // live-out and live-in blocks. The unique value optimization is not
251 // available, SplitEditor::transferValues handles that case directly anyway.
252 void LiveRangeCalc::calculateValues() {
253 assert(Indexes && "Missing SlotIndexes");
254 assert(DomTree && "Missing dominator tree");
260 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
261 SlotIndex Kill, unsigned PhysReg) {
262 unsigned KillMBBNum = KillMBB.getNumber();
264 // Block numbers where LR should be live-in.
265 SmallVector<unsigned, 16> WorkList(1, KillMBBNum);
267 // Remember if we have seen more than one value.
268 bool UniqueVNI = true;
269 VNInfo *TheVNI = nullptr;
271 // Using Seen as a visited set, perform a BFS for all reaching defs.
272 for (unsigned i = 0; i != WorkList.size(); ++i) {
273 MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]);
276 if (MBB->pred_empty()) {
277 MBB->getParent()->verify();
278 llvm_unreachable("Use not jointly dominated by defs.");
281 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
282 !MBB->isLiveIn(PhysReg)) {
283 MBB->getParent()->verify();
284 errs() << "The register needs to be live in to BB#" << MBB->getNumber()
285 << ", but is missing from the live-in list.\n";
286 llvm_unreachable("Invalid global physical register");
290 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
291 PE = MBB->pred_end(); PI != PE; ++PI) {
292 MachineBasicBlock *Pred = *PI;
294 // Is this a known live-out block?
295 if (Seen.test(Pred->getNumber())) {
296 if (VNInfo *VNI = Map[Pred].first) {
297 if (TheVNI && TheVNI != VNI)
304 SlotIndex Start, End;
305 std::tie(Start, End) = Indexes->getMBBRange(Pred);
307 // First time we see Pred. Try to determine the live-out value, but set
308 // it as null if Pred is live-through with an unknown value.
309 VNInfo *VNI = LR.extendInBlock(Start, End);
310 setLiveOutValue(Pred, VNI);
312 if (TheVNI && TheVNI != VNI)
318 // No, we need a live-in value for Pred as well
319 if (Pred != &KillMBB)
320 WorkList.push_back(Pred->getNumber());
322 // Loopback to KillMBB, so value is really live through.
329 // Both updateSSA() and LiveRangeUpdater benefit from ordered blocks, but
330 // neither require it. Skip the sorting overhead for small updates.
331 if (WorkList.size() > 4)
332 array_pod_sort(WorkList.begin(), WorkList.end());
334 // If a unique reaching def was found, blit in the live ranges immediately.
336 LiveRangeUpdater Updater(&LR);
337 for (SmallVectorImpl<unsigned>::const_iterator I = WorkList.begin(),
338 E = WorkList.end(); I != E; ++I) {
339 SlotIndex Start, End;
340 std::tie(Start, End) = Indexes->getMBBRange(*I);
341 // Trim the live range in KillMBB.
342 if (*I == KillMBBNum && Kill.isValid())
345 Map[MF->getBlockNumbered(*I)] = LiveOutPair(TheVNI, nullptr);
346 Updater.add(Start, End, TheVNI);
351 // Multiple values were found, so transfer the work list to the LiveIn array
352 // where UpdateSSA will use it as a work list.
353 LiveIn.reserve(WorkList.size());
354 for (SmallVectorImpl<unsigned>::const_iterator
355 I = WorkList.begin(), E = WorkList.end(); I != E; ++I) {
356 MachineBasicBlock *MBB = MF->getBlockNumbered(*I);
357 addLiveInBlock(LR, DomTree->getNode(MBB));
359 LiveIn.back().Kill = Kill;
366 // This is essentially the same iterative algorithm that SSAUpdater uses,
367 // except we already have a dominator tree, so we don't have to recompute it.
368 void LiveRangeCalc::updateSSA() {
369 assert(Indexes && "Missing SlotIndexes");
370 assert(DomTree && "Missing dominator tree");
372 // Interate until convergence.
376 // Propagate live-out values down the dominator tree, inserting phi-defs
378 for (LiveInBlock &I : LiveIn) {
379 MachineDomTreeNode *Node = I.DomNode;
380 // Skip block if the live-in value has already been determined.
383 MachineBasicBlock *MBB = Node->getBlock();
384 MachineDomTreeNode *IDom = Node->getIDom();
385 LiveOutPair IDomValue;
387 // We need a live-in value to a block with no immediate dominator?
388 // This is probably an unreachable block that has survived somehow.
389 bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
391 // IDom dominates all of our predecessors, but it may not be their
392 // immediate dominator. Check if any of them have live-out values that are
393 // properly dominated by IDom. If so, we need a phi-def here.
395 IDomValue = Map[IDom->getBlock()];
397 // Cache the DomTree node that defined the value.
398 if (IDomValue.first && !IDomValue.second)
399 Map[IDom->getBlock()].second = IDomValue.second =
400 DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
402 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
403 PE = MBB->pred_end(); PI != PE; ++PI) {
404 LiveOutPair &Value = Map[*PI];
405 if (!Value.first || Value.first == IDomValue.first)
408 // Cache the DomTree node that defined the value.
411 DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));
413 // This predecessor is carrying something other than IDomValue.
414 // It could be because IDomValue hasn't propagated yet, or it could be
415 // because MBB is in the dominance frontier of that value.
416 if (DomTree->dominates(IDom, Value.second)) {
423 // The value may be live-through even if Kill is set, as can happen when
424 // we are called from extendRange. In that case LiveOutSeen is true, and
425 // LiveOut indicates a foreign or missing value.
426 LiveOutPair &LOP = Map[MBB];
428 // Create a phi-def if required.
431 assert(Alloc && "Need VNInfo allocator to create PHI-defs");
432 SlotIndex Start, End;
433 std::tie(Start, End) = Indexes->getMBBRange(MBB);
434 LiveRange &LR = I.LR;
435 VNInfo *VNI = LR.getNextValue(Start, *Alloc);
437 // This block is done, we know the final value.
440 // Add liveness since updateFromLiveIns now skips this node.
441 if (I.Kill.isValid())
442 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI));
444 LR.addSegment(LiveInterval::Segment(Start, End, VNI));
445 LOP = LiveOutPair(VNI, Node);
447 } else if (IDomValue.first) {
448 // No phi-def here. Remember incoming value.
449 I.Value = IDomValue.first;
451 // If the IDomValue is killed in the block, don't propagate through.
452 if (I.Kill.isValid())
455 // Propagate IDomValue if it isn't killed:
456 // MBB is live-out and doesn't define its own value.
457 if (LOP.first == IDomValue.first)