1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/ADT/SmallPtrSet.h"
23 #include "llvm/CodeGen/LiveInterval.h"
29 class MachineLoopInfo;
30 class MachineRegisterInfo;
35 /// Callback methods for LiveRangeEdit owners.
37 virtual void anchor();
39 /// Called immediately before erasing a dead machine instruction.
40 virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
42 /// Called when a virtual register is no longer used. Return false to defer
43 /// its deletion from LiveIntervals.
44 virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
46 /// Called before shrinking the live range of a virtual register.
47 virtual void LRE_WillShrinkVirtReg(unsigned) {}
49 /// Called after cloning a virtual register.
50 /// This is used for new registers representing connected components of Old.
51 virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
53 virtual ~Delegate() {}
57 LiveInterval &parent_;
58 SmallVectorImpl<LiveInterval*> &newRegs_;
59 Delegate *const delegate_;
61 /// firstNew_ - Index of the first register added to newRegs_.
62 const unsigned firstNew_;
64 /// scannedRemattable_ - true when remattable values have been identified.
65 bool scannedRemattable_;
67 /// remattable_ - Values defined by remattable instructions as identified by
68 /// tii.isTriviallyReMaterializable().
69 SmallPtrSet<const VNInfo*,4> remattable_;
71 /// rematted_ - Values that were actually rematted, and so need to have their
72 /// live range trimmed or entirely removed.
73 SmallPtrSet<const VNInfo*,4> rematted_;
75 /// scanRemattable - Identify the parent_ values that may rematerialize.
76 void scanRemattable(LiveIntervals &lis,
77 const TargetInstrInfo &tii,
80 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
81 /// OrigIdx are also available with the same value at UseIdx.
82 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
83 SlotIndex UseIdx, LiveIntervals &lis);
85 /// foldAsLoad - If LI has a single use and a single def that can be folded as
86 /// a load, eliminate the register by folding the def into the use.
87 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead,
88 MachineRegisterInfo&, LiveIntervals&, const TargetInstrInfo&);
91 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
92 /// @param parent The register being spilled or split.
93 /// @param newRegs List to receive any new registers created. This needn't be
94 /// empty initially, any existing registers are ignored.
95 LiveRangeEdit(LiveInterval &parent,
96 SmallVectorImpl<LiveInterval*> &newRegs,
97 Delegate *delegate = 0)
98 : parent_(parent), newRegs_(newRegs),
100 firstNew_(newRegs.size()),
101 scannedRemattable_(false) {}
103 LiveInterval &getParent() const { return parent_; }
104 unsigned getReg() const { return parent_.reg; }
106 /// Iterator for accessing the new registers added by this edit.
107 typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
108 iterator begin() const { return newRegs_.begin()+firstNew_; }
109 iterator end() const { return newRegs_.end(); }
110 unsigned size() const { return newRegs_.size()-firstNew_; }
111 bool empty() const { return size() == 0; }
112 LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
114 ArrayRef<LiveInterval*> regs() const {
115 return makeArrayRef(newRegs_).slice(firstNew_);
118 /// createFrom - Create a new virtual register based on OldReg.
119 LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
121 /// create - Create a new register with the same class and original slot as
123 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) {
124 return createFrom(getReg(), LIS, VRM);
127 /// anyRematerializable - Return true if any parent values may be
128 /// rematerializable.
129 /// This function must be called before any rematerialization is attempted.
130 bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
133 /// checkRematerializable - Manually add VNI to the list of rematerializable
134 /// values if DefMI may be rematerializable.
135 bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
136 const TargetInstrInfo&, AliasAnalysis*);
138 /// Remat - Information needed to rematerialize at a specific location.
140 VNInfo *ParentVNI; // parent_'s value at the remat location.
141 MachineInstr *OrigMI; // Instruction defining ParentVNI.
142 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
145 /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
146 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
147 /// When cheapAsAMove is set, only cheap remats are allowed.
148 bool canRematerializeAt(Remat &RM,
153 /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
154 /// instruction into MBB before MI. The new instruction is mapped, but
155 /// liveness is not updated.
156 /// Return the SlotIndex of the new instruction.
157 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
158 MachineBasicBlock::iterator MI,
162 const TargetInstrInfo&,
163 const TargetRegisterInfo&,
166 /// markRematerialized - explicitly mark a value as rematerialized after doing
168 void markRematerialized(const VNInfo *ParentVNI) {
169 rematted_.insert(ParentVNI);
172 /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
173 bool didRematerialize(const VNInfo *ParentVNI) const {
174 return rematted_.count(ParentVNI);
177 /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
178 /// to erase it from LIS.
179 void eraseVirtReg(unsigned Reg, LiveIntervals &LIS);
181 /// eliminateDeadDefs - Try to delete machine instructions that are now dead
182 /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
183 /// and further dead efs to be eliminated.
184 /// RegsBeingSpilled lists registers currently being spilled by the register
185 /// allocator. These registers should not be split into new intervals
186 /// as currently those new intervals are not guaranteed to spill.
187 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
188 LiveIntervals&, VirtRegMap&,
189 const TargetInstrInfo&,
190 ArrayRef<unsigned> RegsBeingSpilled
191 = ArrayRef<unsigned>());
193 /// calculateRegClassAndHint - Recompute register class and hint for each new
195 void calculateRegClassAndHint(MachineFunction&, LiveIntervals&,
196 const MachineLoopInfo&);