1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
21 #include "llvm/CodeGen/LiveInterval.h"
22 #include "llvm/ADT/SmallPtrSet.h"
28 class MachineRegisterInfo;
33 /// Callback methods for LiveRangeEdit owners.
35 /// Called immediately before erasing a dead machine instruction.
36 virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
38 /// Called when a virtual register is no longer used. Return false to defer
39 /// its deletion from LiveIntervals.
40 virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
42 /// Called before shrinking the live range of a virtual register.
43 virtual void LRE_WillShrinkVirtReg(unsigned) {}
45 virtual ~Delegate() {}
49 LiveInterval &parent_;
50 SmallVectorImpl<LiveInterval*> &newRegs_;
51 Delegate *const delegate_;
52 const SmallVectorImpl<LiveInterval*> *uselessRegs_;
54 /// firstNew_ - Index of the first register added to newRegs_.
55 const unsigned firstNew_;
57 /// scannedRemattable_ - true when remattable values have been identified.
58 bool scannedRemattable_;
60 /// remattable_ - Values defined by remattable instructions as identified by
61 /// tii.isTriviallyReMaterializable().
62 SmallPtrSet<const VNInfo*,4> remattable_;
64 /// rematted_ - Values that were actually rematted, and so need to have their
65 /// live range trimmed or entirely removed.
66 SmallPtrSet<const VNInfo*,4> rematted_;
68 /// scanRemattable - Identify the parent_ values that may rematerialize.
69 void scanRemattable(LiveIntervals &lis,
70 const TargetInstrInfo &tii,
73 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
74 /// OrigIdx are also available with the same value at UseIdx.
75 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
76 SlotIndex UseIdx, LiveIntervals &lis);
79 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
80 /// @param parent The register being spilled or split.
81 /// @param newRegs List to receive any new registers created. This needn't be
82 /// empty initially, any existing registers are ignored.
83 /// @param uselessRegs List of registers that can't be used when
84 /// rematerializing values because they are about to be removed.
85 LiveRangeEdit(LiveInterval &parent,
86 SmallVectorImpl<LiveInterval*> &newRegs,
87 Delegate *delegate = 0,
88 const SmallVectorImpl<LiveInterval*> *uselessRegs = 0)
89 : parent_(parent), newRegs_(newRegs),
91 uselessRegs_(uselessRegs),
92 firstNew_(newRegs.size()),
93 scannedRemattable_(false) {}
95 LiveInterval &getParent() const { return parent_; }
96 unsigned getReg() const { return parent_.reg; }
98 /// Iterator for accessing the new registers added by this edit.
99 typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
100 iterator begin() const { return newRegs_.begin()+firstNew_; }
101 iterator end() const { return newRegs_.end(); }
102 unsigned size() const { return newRegs_.size()-firstNew_; }
103 bool empty() const { return size() == 0; }
104 LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
106 /// FIXME: Temporary accessors until we can get rid of
107 /// LiveIntervals::AddIntervalsForSpills
108 SmallVectorImpl<LiveInterval*> *getNewVRegs() { return &newRegs_; }
109 const SmallVectorImpl<LiveInterval*> *getUselessVRegs() {
113 /// createFrom - Create a new virtual register based on OldReg.
114 LiveInterval &createFrom(unsigned OldReg, LiveIntervals&, VirtRegMap&);
116 /// create - Create a new register with the same class and original slot as
118 LiveInterval &create(LiveIntervals &LIS, VirtRegMap &VRM) {
119 return createFrom(getReg(), LIS, VRM);
122 /// anyRematerializable - Return true if any parent values may be
123 /// rematerializable.
124 /// This function must be called before any rematerialization is attempted.
125 bool anyRematerializable(LiveIntervals&, const TargetInstrInfo&,
128 /// checkRematerializable - Manually add VNI to the list of rematerializable
129 /// values if DefMI may be rematerializable.
130 void checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
131 const TargetInstrInfo&, AliasAnalysis*);
133 /// Remat - Information needed to rematerialize at a specific location.
135 VNInfo *ParentVNI; // parent_'s value at the remat location.
136 MachineInstr *OrigMI; // Instruction defining ParentVNI.
137 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(0) {}
140 /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
141 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
142 /// When cheapAsAMove is set, only cheap remats are allowed.
143 bool canRematerializeAt(Remat &RM,
148 /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
149 /// instruction into MBB before MI. The new instruction is mapped, but
150 /// liveness is not updated.
151 /// Return the SlotIndex of the new instruction.
152 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
153 MachineBasicBlock::iterator MI,
157 const TargetInstrInfo&,
158 const TargetRegisterInfo&);
160 /// markRematerialized - explicitly mark a value as rematerialized after doing
162 void markRematerialized(const VNInfo *ParentVNI) {
163 rematted_.insert(ParentVNI);
166 /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
167 bool didRematerialize(const VNInfo *ParentVNI) const {
168 return rematted_.count(ParentVNI);
171 /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
172 /// to erase it from LIS.
173 void eraseVirtReg(unsigned Reg, LiveIntervals &LIS);
175 /// eliminateDeadDefs - Try to delete machine instructions that are now dead
176 /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
177 /// and further dead efs to be eliminated.
178 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
179 LiveIntervals&, VirtRegMap&,
180 const TargetInstrInfo&);