1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Module.h"
26 #include "llvm/IR/ModuleSlotTracker.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include "llvm/Support/SourceMgr.h"
29 #include "llvm/Target/TargetSubtargetInfo.h"
30 #include "llvm/Target/TargetInstrInfo.h"
36 struct StringValueUtility {
38 std::string UnescapedString;
40 StringValueUtility(const MIToken &Token) {
41 if (Token.isStringValueQuoted()) {
42 Token.unescapeQuotedStringValue(UnescapedString);
43 String = UnescapedString;
46 String = Token.stringValue();
49 operator StringRef() const { return String; }
52 /// A wrapper struct around the 'MachineOperand' struct that includes a source
54 struct MachineOperandWithLocation {
55 MachineOperand Operand;
56 StringRef::iterator Begin;
57 StringRef::iterator End;
59 MachineOperandWithLocation(const MachineOperand &Operand,
60 StringRef::iterator Begin, StringRef::iterator End)
61 : Operand(Operand), Begin(Begin), End(End) {}
68 StringRef Source, CurrentSource;
70 const PerFunctionMIParsingState &PFS;
71 /// Maps from indices to unnamed global values and metadata nodes.
72 const SlotMapping &IRSlots;
73 /// Maps from instruction names to op codes.
74 StringMap<unsigned> Names2InstrOpCodes;
75 /// Maps from register names to registers.
76 StringMap<unsigned> Names2Regs;
77 /// Maps from register mask names to register masks.
78 StringMap<const uint32_t *> Names2RegMasks;
79 /// Maps from subregister names to subregister indices.
80 StringMap<unsigned> Names2SubRegIndices;
81 /// Maps from slot numbers to function's unnamed basic blocks.
82 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
85 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
86 StringRef Source, const PerFunctionMIParsingState &PFS,
87 const SlotMapping &IRSlots);
91 /// Report an error at the current location with the given message.
93 /// This function always return true.
94 bool error(const Twine &Msg);
96 /// Report an error at the given location with the given message.
98 /// This function always return true.
99 bool error(StringRef::iterator Loc, const Twine &Msg);
101 bool parse(MachineInstr *&MI);
102 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
103 bool parseStandaloneNamedRegister(unsigned &Reg);
104 bool parseStandaloneVirtualRegister(unsigned &Reg);
105 bool parseStandaloneIRBlockReference(const BasicBlock *&BB);
107 bool parseRegister(unsigned &Reg);
108 bool parseRegisterFlag(unsigned &Flags);
109 bool parseSubRegisterIndex(unsigned &SubReg);
110 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
111 bool parseImmediateOperand(MachineOperand &Dest);
112 bool parseMBBReference(MachineBasicBlock *&MBB);
113 bool parseMBBOperand(MachineOperand &Dest);
114 bool parseStackObjectOperand(MachineOperand &Dest);
115 bool parseFixedStackObjectOperand(MachineOperand &Dest);
116 bool parseGlobalValue(GlobalValue *&GV);
117 bool parseGlobalAddressOperand(MachineOperand &Dest);
118 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
119 bool parseJumpTableIndexOperand(MachineOperand &Dest);
120 bool parseExternalSymbolOperand(MachineOperand &Dest);
121 bool parseMDNode(MDNode *&Node);
122 bool parseMetadataOperand(MachineOperand &Dest);
123 bool parseCFIOffset(int &Offset);
124 bool parseCFIRegister(unsigned &Reg);
125 bool parseCFIOperand(MachineOperand &Dest);
126 bool parseMachineOperand(MachineOperand &Dest);
129 /// Convert the integer literal in the current token into an unsigned integer.
131 /// Return true if an error occurred.
132 bool getUnsigned(unsigned &Result);
134 /// If the current token is of the given kind, consume it and return false.
135 /// Otherwise report an error and return true.
136 bool expectAndConsume(MIToken::TokenKind TokenKind);
138 void initNames2InstrOpCodes();
140 /// Try to convert an instruction name to an opcode. Return true if the
141 /// instruction name is invalid.
142 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
144 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
146 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
147 const MCInstrDesc &MCID);
149 void initNames2Regs();
151 /// Try to convert a register name to a register number. Return true if the
152 /// register name is invalid.
153 bool getRegisterByName(StringRef RegName, unsigned &Reg);
155 void initNames2RegMasks();
157 /// Check if the given identifier is a name of a register mask.
159 /// Return null if the identifier isn't a register mask.
160 const uint32_t *getRegMask(StringRef Identifier);
162 void initNames2SubRegIndices();
164 /// Check if the given identifier is a name of a subregister index.
166 /// Return 0 if the name isn't a subregister index class.
167 unsigned getSubRegIndex(StringRef Name);
169 void initSlots2BasicBlocks();
171 const BasicBlock *getIRBlock(unsigned Slot);
174 } // end anonymous namespace
176 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
177 StringRef Source, const PerFunctionMIParsingState &PFS,
178 const SlotMapping &IRSlots)
179 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
180 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
182 void MIParser::lex() {
183 CurrentSource = lexMIToken(
184 CurrentSource, Token,
185 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
188 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
190 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
191 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
192 Error = SMDiagnostic(
194 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
195 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
199 static const char *toString(MIToken::TokenKind TokenKind) {
204 return "<unknown token>";
208 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
209 if (Token.isNot(TokenKind))
210 return error(Twine("expected ") + toString(TokenKind));
215 bool MIParser::parse(MachineInstr *&MI) {
218 // Parse any register operands before '='
219 // TODO: Allow parsing of multiple operands before '='
220 MachineOperand MO = MachineOperand::CreateImm(0);
221 SmallVector<MachineOperandWithLocation, 8> Operands;
222 if (Token.isRegister() || Token.isRegisterFlag()) {
223 auto Loc = Token.location();
224 if (parseRegisterOperand(MO, /*IsDef=*/true))
226 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
227 if (Token.isNot(MIToken::equal))
228 return error("expected '='");
232 unsigned OpCode, Flags = 0;
233 if (Token.isError() || parseInstruction(OpCode, Flags))
236 // TODO: Parse the bundle instruction flags and memory operands.
238 // Parse the remaining machine operands.
239 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) {
240 auto Loc = Token.location();
241 if (parseMachineOperand(MO))
243 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
244 if (Token.is(MIToken::Eof))
246 if (Token.isNot(MIToken::comma))
247 return error("expected ',' before the next machine operand");
251 DebugLoc DebugLocation;
252 if (Token.is(MIToken::kw_debug_location)) {
254 if (Token.isNot(MIToken::exclaim))
255 return error("expected a metadata node after 'debug-location'");
256 MDNode *Node = nullptr;
257 if (parseMDNode(Node))
259 DebugLocation = DebugLoc(Node);
262 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
263 if (!MCID.isVariadic()) {
264 // FIXME: Move the implicit operand verification to the machine verifier.
265 if (verifyImplicitOperands(Operands, MCID))
269 // TODO: Check for extraneous machine operands.
270 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
272 for (const auto &Operand : Operands)
273 MI->addOperand(MF, Operand.Operand);
277 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
279 if (Token.isNot(MIToken::MachineBasicBlock))
280 return error("expected a machine basic block reference");
281 if (parseMBBReference(MBB))
284 if (Token.isNot(MIToken::Eof))
286 "expected end of string after the machine basic block reference");
290 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
292 if (Token.isNot(MIToken::NamedRegister))
293 return error("expected a named register");
294 if (parseRegister(Reg))
297 if (Token.isNot(MIToken::Eof))
298 return error("expected end of string after the register reference");
302 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
304 if (Token.isNot(MIToken::VirtualRegister))
305 return error("expected a virtual register");
306 if (parseRegister(Reg))
309 if (Token.isNot(MIToken::Eof))
310 return error("expected end of string after the register reference");
314 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) {
316 if (Token.isNot(MIToken::IRBlock))
317 return error("expected an IR block reference");
318 unsigned SlotNumber = 0;
319 if (getUnsigned(SlotNumber))
321 BB = getIRBlock(SlotNumber);
323 return error(Twine("use of undefined IR block '%ir-block.") +
324 Twine(SlotNumber) + "'");
326 if (Token.isNot(MIToken::Eof))
327 return error("expected end of string after the IR block reference");
331 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
332 assert(MO.isImplicit());
333 return MO.isDef() ? "implicit-def" : "implicit";
336 static std::string getRegisterName(const TargetRegisterInfo *TRI,
338 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
339 return StringRef(TRI->getName(Reg)).lower();
342 bool MIParser::verifyImplicitOperands(
343 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
345 // We can't verify call instructions as they can contain arbitrary implicit
346 // register and register mask operands.
349 // Gather all the expected implicit operands.
350 SmallVector<MachineOperand, 4> ImplicitOperands;
351 if (MCID.ImplicitDefs)
352 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
353 ImplicitOperands.push_back(
354 MachineOperand::CreateReg(*ImpDefs, true, true));
355 if (MCID.ImplicitUses)
356 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
357 ImplicitOperands.push_back(
358 MachineOperand::CreateReg(*ImpUses, false, true));
360 const auto *TRI = MF.getSubtarget().getRegisterInfo();
361 assert(TRI && "Expected target register info");
362 size_t I = ImplicitOperands.size(), J = Operands.size();
367 const auto &ImplicitOperand = ImplicitOperands[I];
368 const auto &Operand = Operands[J].Operand;
369 if (ImplicitOperand.isIdenticalTo(Operand))
371 if (Operand.isReg() && Operand.isImplicit()) {
372 return error(Operands[J].Begin,
373 Twine("expected an implicit register operand '") +
374 printImplicitRegisterFlag(ImplicitOperand) + " %" +
375 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
378 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
379 // insead of reporting an error at this location:
382 // report the error at the following location:
385 return error(J < Operands.size() ? Operands[J].End : Token.location(),
386 Twine("missing implicit register operand '") +
387 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
388 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
393 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
394 if (Token.is(MIToken::kw_frame_setup)) {
395 Flags |= MachineInstr::FrameSetup;
398 if (Token.isNot(MIToken::Identifier))
399 return error("expected a machine instruction");
400 StringRef InstrName = Token.stringValue();
401 if (parseInstrName(InstrName, OpCode))
402 return error(Twine("unknown machine instruction name '") + InstrName + "'");
407 bool MIParser::parseRegister(unsigned &Reg) {
408 switch (Token.kind()) {
409 case MIToken::underscore:
412 case MIToken::NamedRegister: {
413 StringRef Name = Token.stringValue();
414 if (getRegisterByName(Name, Reg))
415 return error(Twine("unknown register name '") + Name + "'");
418 case MIToken::VirtualRegister: {
422 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
423 if (RegInfo == PFS.VirtualRegisterSlots.end())
424 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
426 Reg = RegInfo->second;
429 // TODO: Parse other register kinds.
431 llvm_unreachable("The current token should be a register");
436 bool MIParser::parseRegisterFlag(unsigned &Flags) {
437 switch (Token.kind()) {
438 case MIToken::kw_implicit:
439 Flags |= RegState::Implicit;
441 case MIToken::kw_implicit_define:
442 Flags |= RegState::ImplicitDefine;
444 case MIToken::kw_dead:
445 Flags |= RegState::Dead;
447 case MIToken::kw_killed:
448 Flags |= RegState::Kill;
450 case MIToken::kw_undef:
451 Flags |= RegState::Undef;
453 // TODO: report an error when we specify the same flag more than once.
454 // TODO: parse the other register flags.
456 llvm_unreachable("The current token should be a register flag");
462 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
463 assert(Token.is(MIToken::colon));
465 if (Token.isNot(MIToken::Identifier))
466 return error("expected a subregister index after ':'");
467 auto Name = Token.stringValue();
468 SubReg = getSubRegIndex(Name);
470 return error(Twine("use of unknown subregister index '") + Name + "'");
475 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
477 unsigned Flags = IsDef ? RegState::Define : 0;
478 while (Token.isRegisterFlag()) {
479 if (parseRegisterFlag(Flags))
482 if (!Token.isRegister())
483 return error("expected a register after register flags");
484 if (parseRegister(Reg))
488 if (Token.is(MIToken::colon)) {
489 if (parseSubRegisterIndex(SubReg))
492 Dest = MachineOperand::CreateReg(
493 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
494 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
495 /*isEarlyClobber=*/false, SubReg);
499 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
500 assert(Token.is(MIToken::IntegerLiteral));
501 const APSInt &Int = Token.integerValue();
502 if (Int.getMinSignedBits() > 64)
503 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
504 llvm_unreachable("Can't parse large integer literals yet!");
505 Dest = MachineOperand::CreateImm(Int.getExtValue());
510 bool MIParser::getUnsigned(unsigned &Result) {
511 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
512 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
513 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
515 return error("expected 32-bit integer (too large)");
520 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
521 assert(Token.is(MIToken::MachineBasicBlock));
523 if (getUnsigned(Number))
525 auto MBBInfo = PFS.MBBSlots.find(Number);
526 if (MBBInfo == PFS.MBBSlots.end())
527 return error(Twine("use of undefined machine basic block #") +
529 MBB = MBBInfo->second;
530 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
531 return error(Twine("the name of machine basic block #") + Twine(Number) +
532 " isn't '" + Token.stringValue() + "'");
536 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
537 MachineBasicBlock *MBB;
538 if (parseMBBReference(MBB))
540 Dest = MachineOperand::CreateMBB(MBB);
545 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
546 assert(Token.is(MIToken::StackObject));
550 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
551 if (ObjectInfo == PFS.StackObjectSlots.end())
552 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
555 if (const auto *Alloca =
556 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
557 Name = Alloca->getName();
558 if (!Token.stringValue().empty() && Token.stringValue() != Name)
559 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
560 "' isn't '" + Token.stringValue() + "'");
562 Dest = MachineOperand::CreateFI(ObjectInfo->second);
566 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
567 assert(Token.is(MIToken::FixedStackObject));
571 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
572 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
573 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
576 Dest = MachineOperand::CreateFI(ObjectInfo->second);
580 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
581 switch (Token.kind()) {
582 case MIToken::NamedGlobalValue:
583 case MIToken::QuotedNamedGlobalValue: {
584 StringValueUtility Name(Token);
585 const Module *M = MF.getFunction()->getParent();
586 GV = M->getNamedValue(Name);
588 return error(Twine("use of undefined global value '@") +
589 Token.rawStringValue() + "'");
592 case MIToken::GlobalValue: {
594 if (getUnsigned(GVIdx))
596 if (GVIdx >= IRSlots.GlobalValues.size())
597 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
599 GV = IRSlots.GlobalValues[GVIdx];
603 llvm_unreachable("The current token should be a global value");
608 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
609 GlobalValue *GV = nullptr;
610 if (parseGlobalValue(GV))
612 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
613 // TODO: Parse offset and target flags.
618 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
619 assert(Token.is(MIToken::ConstantPoolItem));
623 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
624 if (ConstantInfo == PFS.ConstantPoolSlots.end())
625 return error("use of undefined constant '%const." + Twine(ID) + "'");
627 // TODO: Parse offset and target flags.
628 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
632 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
633 assert(Token.is(MIToken::JumpTableIndex));
637 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
638 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
639 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
641 // TODO: Parse target flags.
642 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
646 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
647 assert(Token.is(MIToken::ExternalSymbol) ||
648 Token.is(MIToken::QuotedExternalSymbol));
649 StringValueUtility Name(Token);
650 const char *Symbol = MF.createExternalSymbolName(Name);
652 // TODO: Parse the target flags.
653 Dest = MachineOperand::CreateES(Symbol);
657 bool MIParser::parseMDNode(MDNode *&Node) {
658 assert(Token.is(MIToken::exclaim));
659 auto Loc = Token.location();
661 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
662 return error("expected metadata id after '!'");
666 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
667 if (NodeInfo == IRSlots.MetadataNodes.end())
668 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
670 Node = NodeInfo->second.get();
674 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
675 MDNode *Node = nullptr;
676 if (parseMDNode(Node))
678 Dest = MachineOperand::CreateMetadata(Node);
682 bool MIParser::parseCFIOffset(int &Offset) {
683 if (Token.isNot(MIToken::IntegerLiteral))
684 return error("expected a cfi offset");
685 if (Token.integerValue().getMinSignedBits() > 32)
686 return error("expected a 32 bit integer (the cfi offset is too large)");
687 Offset = (int)Token.integerValue().getExtValue();
692 bool MIParser::parseCFIRegister(unsigned &Reg) {
693 if (Token.isNot(MIToken::NamedRegister))
694 return error("expected a cfi register");
696 if (parseRegister(LLVMReg))
698 const auto *TRI = MF.getSubtarget().getRegisterInfo();
699 assert(TRI && "Expected target register info");
700 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
702 return error("invalid DWARF register");
703 Reg = (unsigned)DwarfReg;
708 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
709 auto Kind = Token.kind();
711 auto &MMI = MF.getMMI();
716 case MIToken::kw_cfi_offset:
717 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
718 parseCFIOffset(Offset))
721 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
723 case MIToken::kw_cfi_def_cfa_register:
724 if (parseCFIRegister(Reg))
727 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
729 case MIToken::kw_cfi_def_cfa_offset:
730 if (parseCFIOffset(Offset))
732 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
733 CFIIndex = MMI.addFrameInst(
734 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
737 // TODO: Parse the other CFI operands.
738 llvm_unreachable("The current token should be a cfi operand");
740 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
744 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
745 switch (Token.kind()) {
746 case MIToken::kw_implicit:
747 case MIToken::kw_implicit_define:
748 case MIToken::kw_dead:
749 case MIToken::kw_killed:
750 case MIToken::kw_undef:
751 case MIToken::underscore:
752 case MIToken::NamedRegister:
753 case MIToken::VirtualRegister:
754 return parseRegisterOperand(Dest);
755 case MIToken::IntegerLiteral:
756 return parseImmediateOperand(Dest);
757 case MIToken::MachineBasicBlock:
758 return parseMBBOperand(Dest);
759 case MIToken::StackObject:
760 return parseStackObjectOperand(Dest);
761 case MIToken::FixedStackObject:
762 return parseFixedStackObjectOperand(Dest);
763 case MIToken::GlobalValue:
764 case MIToken::NamedGlobalValue:
765 case MIToken::QuotedNamedGlobalValue:
766 return parseGlobalAddressOperand(Dest);
767 case MIToken::ConstantPoolItem:
768 return parseConstantPoolIndexOperand(Dest);
769 case MIToken::JumpTableIndex:
770 return parseJumpTableIndexOperand(Dest);
771 case MIToken::ExternalSymbol:
772 case MIToken::QuotedExternalSymbol:
773 return parseExternalSymbolOperand(Dest);
774 case MIToken::exclaim:
775 return parseMetadataOperand(Dest);
776 case MIToken::kw_cfi_offset:
777 case MIToken::kw_cfi_def_cfa_register:
778 case MIToken::kw_cfi_def_cfa_offset:
779 return parseCFIOperand(Dest);
782 case MIToken::Identifier:
783 if (const auto *RegMask = getRegMask(Token.stringValue())) {
784 Dest = MachineOperand::CreateRegMask(RegMask);
790 // TODO: parse the other machine operands.
791 return error("expected a machine operand");
796 void MIParser::initNames2InstrOpCodes() {
797 if (!Names2InstrOpCodes.empty())
799 const auto *TII = MF.getSubtarget().getInstrInfo();
800 assert(TII && "Expected target instruction info");
801 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
802 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
805 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
806 initNames2InstrOpCodes();
807 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
808 if (InstrInfo == Names2InstrOpCodes.end())
810 OpCode = InstrInfo->getValue();
814 void MIParser::initNames2Regs() {
815 if (!Names2Regs.empty())
817 // The '%noreg' register is the register 0.
818 Names2Regs.insert(std::make_pair("noreg", 0));
819 const auto *TRI = MF.getSubtarget().getRegisterInfo();
820 assert(TRI && "Expected target register info");
821 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
823 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
826 assert(WasInserted && "Expected registers to be unique case-insensitively");
830 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
832 auto RegInfo = Names2Regs.find(RegName);
833 if (RegInfo == Names2Regs.end())
835 Reg = RegInfo->getValue();
839 void MIParser::initNames2RegMasks() {
840 if (!Names2RegMasks.empty())
842 const auto *TRI = MF.getSubtarget().getRegisterInfo();
843 assert(TRI && "Expected target register info");
844 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
845 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
846 assert(RegMasks.size() == RegMaskNames.size());
847 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
848 Names2RegMasks.insert(
849 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
852 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
853 initNames2RegMasks();
854 auto RegMaskInfo = Names2RegMasks.find(Identifier);
855 if (RegMaskInfo == Names2RegMasks.end())
857 return RegMaskInfo->getValue();
860 void MIParser::initNames2SubRegIndices() {
861 if (!Names2SubRegIndices.empty())
863 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
864 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
865 Names2SubRegIndices.insert(
866 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
869 unsigned MIParser::getSubRegIndex(StringRef Name) {
870 initNames2SubRegIndices();
871 auto SubRegInfo = Names2SubRegIndices.find(Name);
872 if (SubRegInfo == Names2SubRegIndices.end())
874 return SubRegInfo->getValue();
877 void MIParser::initSlots2BasicBlocks() {
878 if (!Slots2BasicBlocks.empty())
880 const auto &F = *MF.getFunction();
881 ModuleSlotTracker MST(F.getParent());
882 MST.incorporateFunction(F);
886 int Slot = MST.getLocalSlot(&BB);
889 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
893 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
894 initSlots2BasicBlocks();
895 auto BlockInfo = Slots2BasicBlocks.find(Slot);
896 if (BlockInfo == Slots2BasicBlocks.end())
898 return BlockInfo->second;
901 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
902 MachineFunction &MF, StringRef Src,
903 const PerFunctionMIParsingState &PFS,
904 const SlotMapping &IRSlots, SMDiagnostic &Error) {
905 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
908 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
909 MachineFunction &MF, StringRef Src,
910 const PerFunctionMIParsingState &PFS,
911 const SlotMapping &IRSlots, SMDiagnostic &Error) {
912 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
915 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
916 MachineFunction &MF, StringRef Src,
917 const PerFunctionMIParsingState &PFS,
918 const SlotMapping &IRSlots,
919 SMDiagnostic &Error) {
920 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
921 .parseStandaloneNamedRegister(Reg);
924 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
925 MachineFunction &MF, StringRef Src,
926 const PerFunctionMIParsingState &PFS,
927 const SlotMapping &IRSlots,
928 SMDiagnostic &Error) {
929 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
930 .parseStandaloneVirtualRegister(Reg);
933 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM,
934 MachineFunction &MF, StringRef Src,
935 const PerFunctionMIParsingState &PFS,
936 const SlotMapping &IRSlots,
937 SMDiagnostic &Error) {
938 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
939 .parseStandaloneIRBlockReference(BB);