1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Module.h"
26 #include "llvm/Support/raw_ostream.h"
27 #include "llvm/Support/SourceMgr.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
29 #include "llvm/Target/TargetInstrInfo.h"
35 struct StringValueUtility {
37 std::string UnescapedString;
39 StringValueUtility(const MIToken &Token) {
40 if (Token.isStringValueQuoted()) {
41 Token.unescapeQuotedStringValue(UnescapedString);
42 String = UnescapedString;
45 String = Token.stringValue();
48 operator StringRef() const { return String; }
51 /// A wrapper struct around the 'MachineOperand' struct that includes a source
53 struct MachineOperandWithLocation {
54 MachineOperand Operand;
55 StringRef::iterator Begin;
56 StringRef::iterator End;
58 MachineOperandWithLocation(const MachineOperand &Operand,
59 StringRef::iterator Begin, StringRef::iterator End)
60 : Operand(Operand), Begin(Begin), End(End) {}
67 StringRef Source, CurrentSource;
69 const PerFunctionMIParsingState &PFS;
70 /// Maps from indices to unnamed global values and metadata nodes.
71 const SlotMapping &IRSlots;
72 /// Maps from instruction names to op codes.
73 StringMap<unsigned> Names2InstrOpCodes;
74 /// Maps from register names to registers.
75 StringMap<unsigned> Names2Regs;
76 /// Maps from register mask names to register masks.
77 StringMap<const uint32_t *> Names2RegMasks;
78 /// Maps from subregister names to subregister indices.
79 StringMap<unsigned> Names2SubRegIndices;
82 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
83 StringRef Source, const PerFunctionMIParsingState &PFS,
84 const SlotMapping &IRSlots);
88 /// Report an error at the current location with the given message.
90 /// This function always return true.
91 bool error(const Twine &Msg);
93 /// Report an error at the given location with the given message.
95 /// This function always return true.
96 bool error(StringRef::iterator Loc, const Twine &Msg);
98 bool parse(MachineInstr *&MI);
99 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
100 bool parseStandaloneNamedRegister(unsigned &Reg);
101 bool parseStandaloneVirtualRegister(unsigned &Reg);
103 bool parseRegister(unsigned &Reg);
104 bool parseRegisterFlag(unsigned &Flags);
105 bool parseSubRegisterIndex(unsigned &SubReg);
106 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
107 bool parseImmediateOperand(MachineOperand &Dest);
108 bool parseMBBReference(MachineBasicBlock *&MBB);
109 bool parseMBBOperand(MachineOperand &Dest);
110 bool parseStackObjectOperand(MachineOperand &Dest);
111 bool parseFixedStackObjectOperand(MachineOperand &Dest);
112 bool parseGlobalAddressOperand(MachineOperand &Dest);
113 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
114 bool parseJumpTableIndexOperand(MachineOperand &Dest);
115 bool parseExternalSymbolOperand(MachineOperand &Dest);
116 bool parseMDNode(MDNode *&Node);
117 bool parseMetadataOperand(MachineOperand &Dest);
118 bool parseCFIOffset(int &Offset);
119 bool parseCFIRegister(unsigned &Reg);
120 bool parseCFIOperand(MachineOperand &Dest);
121 bool parseMachineOperand(MachineOperand &Dest);
124 /// Convert the integer literal in the current token into an unsigned integer.
126 /// Return true if an error occurred.
127 bool getUnsigned(unsigned &Result);
129 /// If the current token is of the given kind, consume it and return false.
130 /// Otherwise report an error and return true.
131 bool expectAndConsume(MIToken::TokenKind TokenKind);
133 void initNames2InstrOpCodes();
135 /// Try to convert an instruction name to an opcode. Return true if the
136 /// instruction name is invalid.
137 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
139 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
141 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
142 const MCInstrDesc &MCID);
144 void initNames2Regs();
146 /// Try to convert a register name to a register number. Return true if the
147 /// register name is invalid.
148 bool getRegisterByName(StringRef RegName, unsigned &Reg);
150 void initNames2RegMasks();
152 /// Check if the given identifier is a name of a register mask.
154 /// Return null if the identifier isn't a register mask.
155 const uint32_t *getRegMask(StringRef Identifier);
157 void initNames2SubRegIndices();
159 /// Check if the given identifier is a name of a subregister index.
161 /// Return 0 if the name isn't a subregister index class.
162 unsigned getSubRegIndex(StringRef Name);
165 } // end anonymous namespace
167 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
168 StringRef Source, const PerFunctionMIParsingState &PFS,
169 const SlotMapping &IRSlots)
170 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
171 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
173 void MIParser::lex() {
174 CurrentSource = lexMIToken(
175 CurrentSource, Token,
176 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
179 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
181 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
182 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
183 Error = SMDiagnostic(
185 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
186 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
190 static const char *toString(MIToken::TokenKind TokenKind) {
195 return "<unknown token>";
199 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
200 if (Token.isNot(TokenKind))
201 return error(Twine("expected ") + toString(TokenKind));
206 bool MIParser::parse(MachineInstr *&MI) {
209 // Parse any register operands before '='
210 // TODO: Allow parsing of multiple operands before '='
211 MachineOperand MO = MachineOperand::CreateImm(0);
212 SmallVector<MachineOperandWithLocation, 8> Operands;
213 if (Token.isRegister() || Token.isRegisterFlag()) {
214 auto Loc = Token.location();
215 if (parseRegisterOperand(MO, /*IsDef=*/true))
217 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
218 if (Token.isNot(MIToken::equal))
219 return error("expected '='");
223 unsigned OpCode, Flags = 0;
224 if (Token.isError() || parseInstruction(OpCode, Flags))
227 // TODO: Parse the bundle instruction flags and memory operands.
229 // Parse the remaining machine operands.
230 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) {
231 auto Loc = Token.location();
232 if (parseMachineOperand(MO))
234 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
235 if (Token.is(MIToken::Eof))
237 if (Token.isNot(MIToken::comma))
238 return error("expected ',' before the next machine operand");
242 DebugLoc DebugLocation;
243 if (Token.is(MIToken::kw_debug_location)) {
245 if (Token.isNot(MIToken::exclaim))
246 return error("expected a metadata node after 'debug-location'");
247 MDNode *Node = nullptr;
248 if (parseMDNode(Node))
250 DebugLocation = DebugLoc(Node);
253 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
254 if (!MCID.isVariadic()) {
255 // FIXME: Move the implicit operand verification to the machine verifier.
256 if (verifyImplicitOperands(Operands, MCID))
260 // TODO: Check for extraneous machine operands.
261 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
263 for (const auto &Operand : Operands)
264 MI->addOperand(MF, Operand.Operand);
268 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
270 if (Token.isNot(MIToken::MachineBasicBlock))
271 return error("expected a machine basic block reference");
272 if (parseMBBReference(MBB))
275 if (Token.isNot(MIToken::Eof))
277 "expected end of string after the machine basic block reference");
281 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
283 if (Token.isNot(MIToken::NamedRegister))
284 return error("expected a named register");
285 if (parseRegister(Reg))
288 if (Token.isNot(MIToken::Eof))
289 return error("expected end of string after the register reference");
293 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
295 if (Token.isNot(MIToken::VirtualRegister))
296 return error("expected a virtual register");
297 if (parseRegister(Reg))
300 if (Token.isNot(MIToken::Eof))
301 return error("expected end of string after the register reference");
305 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
306 assert(MO.isImplicit());
307 return MO.isDef() ? "implicit-def" : "implicit";
310 static std::string getRegisterName(const TargetRegisterInfo *TRI,
312 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
313 return StringRef(TRI->getName(Reg)).lower();
316 bool MIParser::verifyImplicitOperands(
317 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
319 // We can't verify call instructions as they can contain arbitrary implicit
320 // register and register mask operands.
323 // Gather all the expected implicit operands.
324 SmallVector<MachineOperand, 4> ImplicitOperands;
325 if (MCID.ImplicitDefs)
326 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
327 ImplicitOperands.push_back(
328 MachineOperand::CreateReg(*ImpDefs, true, true));
329 if (MCID.ImplicitUses)
330 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
331 ImplicitOperands.push_back(
332 MachineOperand::CreateReg(*ImpUses, false, true));
334 const auto *TRI = MF.getSubtarget().getRegisterInfo();
335 assert(TRI && "Expected target register info");
336 size_t I = ImplicitOperands.size(), J = Operands.size();
341 const auto &ImplicitOperand = ImplicitOperands[I];
342 const auto &Operand = Operands[J].Operand;
343 if (ImplicitOperand.isIdenticalTo(Operand))
345 if (Operand.isReg() && Operand.isImplicit()) {
346 return error(Operands[J].Begin,
347 Twine("expected an implicit register operand '") +
348 printImplicitRegisterFlag(ImplicitOperand) + " %" +
349 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
352 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
353 // insead of reporting an error at this location:
356 // report the error at the following location:
359 return error(J < Operands.size() ? Operands[J].End : Token.location(),
360 Twine("missing implicit register operand '") +
361 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
362 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
367 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
368 if (Token.is(MIToken::kw_frame_setup)) {
369 Flags |= MachineInstr::FrameSetup;
372 if (Token.isNot(MIToken::Identifier))
373 return error("expected a machine instruction");
374 StringRef InstrName = Token.stringValue();
375 if (parseInstrName(InstrName, OpCode))
376 return error(Twine("unknown machine instruction name '") + InstrName + "'");
381 bool MIParser::parseRegister(unsigned &Reg) {
382 switch (Token.kind()) {
383 case MIToken::underscore:
386 case MIToken::NamedRegister: {
387 StringRef Name = Token.stringValue();
388 if (getRegisterByName(Name, Reg))
389 return error(Twine("unknown register name '") + Name + "'");
392 case MIToken::VirtualRegister: {
396 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
397 if (RegInfo == PFS.VirtualRegisterSlots.end())
398 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
400 Reg = RegInfo->second;
403 // TODO: Parse other register kinds.
405 llvm_unreachable("The current token should be a register");
410 bool MIParser::parseRegisterFlag(unsigned &Flags) {
411 switch (Token.kind()) {
412 case MIToken::kw_implicit:
413 Flags |= RegState::Implicit;
415 case MIToken::kw_implicit_define:
416 Flags |= RegState::ImplicitDefine;
418 case MIToken::kw_dead:
419 Flags |= RegState::Dead;
421 case MIToken::kw_killed:
422 Flags |= RegState::Kill;
424 case MIToken::kw_undef:
425 Flags |= RegState::Undef;
427 // TODO: report an error when we specify the same flag more than once.
428 // TODO: parse the other register flags.
430 llvm_unreachable("The current token should be a register flag");
436 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
437 assert(Token.is(MIToken::colon));
439 if (Token.isNot(MIToken::Identifier))
440 return error("expected a subregister index after ':'");
441 auto Name = Token.stringValue();
442 SubReg = getSubRegIndex(Name);
444 return error(Twine("use of unknown subregister index '") + Name + "'");
449 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
451 unsigned Flags = IsDef ? RegState::Define : 0;
452 while (Token.isRegisterFlag()) {
453 if (parseRegisterFlag(Flags))
456 if (!Token.isRegister())
457 return error("expected a register after register flags");
458 if (parseRegister(Reg))
462 if (Token.is(MIToken::colon)) {
463 if (parseSubRegisterIndex(SubReg))
466 Dest = MachineOperand::CreateReg(
467 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
468 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
469 /*isEarlyClobber=*/false, SubReg);
473 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
474 assert(Token.is(MIToken::IntegerLiteral));
475 const APSInt &Int = Token.integerValue();
476 if (Int.getMinSignedBits() > 64)
477 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
478 llvm_unreachable("Can't parse large integer literals yet!");
479 Dest = MachineOperand::CreateImm(Int.getExtValue());
484 bool MIParser::getUnsigned(unsigned &Result) {
485 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
486 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
487 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
489 return error("expected 32-bit integer (too large)");
494 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
495 assert(Token.is(MIToken::MachineBasicBlock));
497 if (getUnsigned(Number))
499 auto MBBInfo = PFS.MBBSlots.find(Number);
500 if (MBBInfo == PFS.MBBSlots.end())
501 return error(Twine("use of undefined machine basic block #") +
503 MBB = MBBInfo->second;
504 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
505 return error(Twine("the name of machine basic block #") + Twine(Number) +
506 " isn't '" + Token.stringValue() + "'");
510 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
511 MachineBasicBlock *MBB;
512 if (parseMBBReference(MBB))
514 Dest = MachineOperand::CreateMBB(MBB);
519 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
520 assert(Token.is(MIToken::StackObject));
524 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
525 if (ObjectInfo == PFS.StackObjectSlots.end())
526 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
529 if (const auto *Alloca =
530 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
531 Name = Alloca->getName();
532 if (!Token.stringValue().empty() && Token.stringValue() != Name)
533 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
534 "' isn't '" + Token.stringValue() + "'");
536 Dest = MachineOperand::CreateFI(ObjectInfo->second);
540 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
541 assert(Token.is(MIToken::FixedStackObject));
545 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
546 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
547 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
550 Dest = MachineOperand::CreateFI(ObjectInfo->second);
554 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
555 switch (Token.kind()) {
556 case MIToken::NamedGlobalValue:
557 case MIToken::QuotedNamedGlobalValue: {
558 StringValueUtility Name(Token);
559 const Module *M = MF.getFunction()->getParent();
560 if (const auto *GV = M->getNamedValue(Name)) {
561 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
564 return error(Twine("use of undefined global value '@") +
565 Token.rawStringValue() + "'");
567 case MIToken::GlobalValue: {
569 if (getUnsigned(GVIdx))
571 if (GVIdx >= IRSlots.GlobalValues.size())
572 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
574 Dest = MachineOperand::CreateGA(IRSlots.GlobalValues[GVIdx],
579 llvm_unreachable("The current token should be a global value");
581 // TODO: Parse offset and target flags.
586 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
587 assert(Token.is(MIToken::ConstantPoolItem));
591 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
592 if (ConstantInfo == PFS.ConstantPoolSlots.end())
593 return error("use of undefined constant '%const." + Twine(ID) + "'");
595 // TODO: Parse offset and target flags.
596 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
600 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
601 assert(Token.is(MIToken::JumpTableIndex));
605 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
606 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
607 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
609 // TODO: Parse target flags.
610 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
614 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
615 assert(Token.is(MIToken::ExternalSymbol) ||
616 Token.is(MIToken::QuotedExternalSymbol));
617 StringValueUtility Name(Token);
618 const char *Symbol = MF.createExternalSymbolName(Name);
620 // TODO: Parse the target flags.
621 Dest = MachineOperand::CreateES(Symbol);
625 bool MIParser::parseMDNode(MDNode *&Node) {
626 assert(Token.is(MIToken::exclaim));
627 auto Loc = Token.location();
629 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
630 return error("expected metadata id after '!'");
634 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
635 if (NodeInfo == IRSlots.MetadataNodes.end())
636 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
638 Node = NodeInfo->second.get();
642 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
643 MDNode *Node = nullptr;
644 if (parseMDNode(Node))
646 Dest = MachineOperand::CreateMetadata(Node);
650 bool MIParser::parseCFIOffset(int &Offset) {
651 if (Token.isNot(MIToken::IntegerLiteral))
652 return error("expected a cfi offset");
653 if (Token.integerValue().getMinSignedBits() > 32)
654 return error("expected a 32 bit integer (the cfi offset is too large)");
655 Offset = (int)Token.integerValue().getExtValue();
660 bool MIParser::parseCFIRegister(unsigned &Reg) {
661 if (Token.isNot(MIToken::NamedRegister))
662 return error("expected a cfi register");
664 if (parseRegister(LLVMReg))
666 const auto *TRI = MF.getSubtarget().getRegisterInfo();
667 assert(TRI && "Expected target register info");
668 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
670 return error("invalid DWARF register");
671 Reg = (unsigned)DwarfReg;
676 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
677 auto Kind = Token.kind();
679 auto &MMI = MF.getMMI();
684 case MIToken::kw_cfi_offset:
685 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
686 parseCFIOffset(Offset))
689 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
691 case MIToken::kw_cfi_def_cfa_register:
692 if (parseCFIRegister(Reg))
695 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
697 case MIToken::kw_cfi_def_cfa_offset:
698 if (parseCFIOffset(Offset))
700 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
701 CFIIndex = MMI.addFrameInst(
702 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
705 // TODO: Parse the other CFI operands.
706 llvm_unreachable("The current token should be a cfi operand");
708 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
712 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
713 switch (Token.kind()) {
714 case MIToken::kw_implicit:
715 case MIToken::kw_implicit_define:
716 case MIToken::kw_dead:
717 case MIToken::kw_killed:
718 case MIToken::kw_undef:
719 case MIToken::underscore:
720 case MIToken::NamedRegister:
721 case MIToken::VirtualRegister:
722 return parseRegisterOperand(Dest);
723 case MIToken::IntegerLiteral:
724 return parseImmediateOperand(Dest);
725 case MIToken::MachineBasicBlock:
726 return parseMBBOperand(Dest);
727 case MIToken::StackObject:
728 return parseStackObjectOperand(Dest);
729 case MIToken::FixedStackObject:
730 return parseFixedStackObjectOperand(Dest);
731 case MIToken::GlobalValue:
732 case MIToken::NamedGlobalValue:
733 case MIToken::QuotedNamedGlobalValue:
734 return parseGlobalAddressOperand(Dest);
735 case MIToken::ConstantPoolItem:
736 return parseConstantPoolIndexOperand(Dest);
737 case MIToken::JumpTableIndex:
738 return parseJumpTableIndexOperand(Dest);
739 case MIToken::ExternalSymbol:
740 case MIToken::QuotedExternalSymbol:
741 return parseExternalSymbolOperand(Dest);
742 case MIToken::exclaim:
743 return parseMetadataOperand(Dest);
744 case MIToken::kw_cfi_offset:
745 case MIToken::kw_cfi_def_cfa_register:
746 case MIToken::kw_cfi_def_cfa_offset:
747 return parseCFIOperand(Dest);
750 case MIToken::Identifier:
751 if (const auto *RegMask = getRegMask(Token.stringValue())) {
752 Dest = MachineOperand::CreateRegMask(RegMask);
758 // TODO: parse the other machine operands.
759 return error("expected a machine operand");
764 void MIParser::initNames2InstrOpCodes() {
765 if (!Names2InstrOpCodes.empty())
767 const auto *TII = MF.getSubtarget().getInstrInfo();
768 assert(TII && "Expected target instruction info");
769 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
770 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
773 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
774 initNames2InstrOpCodes();
775 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
776 if (InstrInfo == Names2InstrOpCodes.end())
778 OpCode = InstrInfo->getValue();
782 void MIParser::initNames2Regs() {
783 if (!Names2Regs.empty())
785 // The '%noreg' register is the register 0.
786 Names2Regs.insert(std::make_pair("noreg", 0));
787 const auto *TRI = MF.getSubtarget().getRegisterInfo();
788 assert(TRI && "Expected target register info");
789 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
791 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
794 assert(WasInserted && "Expected registers to be unique case-insensitively");
798 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
800 auto RegInfo = Names2Regs.find(RegName);
801 if (RegInfo == Names2Regs.end())
803 Reg = RegInfo->getValue();
807 void MIParser::initNames2RegMasks() {
808 if (!Names2RegMasks.empty())
810 const auto *TRI = MF.getSubtarget().getRegisterInfo();
811 assert(TRI && "Expected target register info");
812 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
813 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
814 assert(RegMasks.size() == RegMaskNames.size());
815 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
816 Names2RegMasks.insert(
817 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
820 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
821 initNames2RegMasks();
822 auto RegMaskInfo = Names2RegMasks.find(Identifier);
823 if (RegMaskInfo == Names2RegMasks.end())
825 return RegMaskInfo->getValue();
828 void MIParser::initNames2SubRegIndices() {
829 if (!Names2SubRegIndices.empty())
831 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
832 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
833 Names2SubRegIndices.insert(
834 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
837 unsigned MIParser::getSubRegIndex(StringRef Name) {
838 initNames2SubRegIndices();
839 auto SubRegInfo = Names2SubRegIndices.find(Name);
840 if (SubRegInfo == Names2SubRegIndices.end())
842 return SubRegInfo->getValue();
845 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
846 MachineFunction &MF, StringRef Src,
847 const PerFunctionMIParsingState &PFS,
848 const SlotMapping &IRSlots, SMDiagnostic &Error) {
849 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
852 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
853 MachineFunction &MF, StringRef Src,
854 const PerFunctionMIParsingState &PFS,
855 const SlotMapping &IRSlots, SMDiagnostic &Error) {
856 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
859 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
860 MachineFunction &MF, StringRef Src,
861 const PerFunctionMIParsingState &PFS,
862 const SlotMapping &IRSlots,
863 SMDiagnostic &Error) {
864 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
865 .parseStandaloneNamedRegister(Reg);
868 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
869 MachineFunction &MF, StringRef Src,
870 const PerFunctionMIParsingState &PFS,
871 const SlotMapping &IRSlots,
872 SMDiagnostic &Error) {
873 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
874 .parseStandaloneVirtualRegister(Reg);