1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/IR/Instructions.h"
25 #include "llvm/IR/Constants.h"
26 #include "llvm/IR/Module.h"
27 #include "llvm/IR/ModuleSlotTracker.h"
28 #include "llvm/IR/ValueSymbolTable.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/Support/SourceMgr.h"
31 #include "llvm/Target/TargetSubtargetInfo.h"
32 #include "llvm/Target/TargetInstrInfo.h"
38 struct StringValueUtility {
40 std::string UnescapedString;
42 StringValueUtility(const MIToken &Token) {
43 if (Token.isStringValueQuoted()) {
44 Token.unescapeQuotedStringValue(UnescapedString);
45 String = UnescapedString;
48 String = Token.stringValue();
51 operator StringRef() const { return String; }
54 /// A wrapper struct around the 'MachineOperand' struct that includes a source
56 struct MachineOperandWithLocation {
57 MachineOperand Operand;
58 StringRef::iterator Begin;
59 StringRef::iterator End;
61 MachineOperandWithLocation(const MachineOperand &Operand,
62 StringRef::iterator Begin, StringRef::iterator End)
63 : Operand(Operand), Begin(Begin), End(End) {}
70 StringRef Source, CurrentSource;
72 const PerFunctionMIParsingState &PFS;
73 /// Maps from indices to unnamed global values and metadata nodes.
74 const SlotMapping &IRSlots;
75 /// Maps from instruction names to op codes.
76 StringMap<unsigned> Names2InstrOpCodes;
77 /// Maps from register names to registers.
78 StringMap<unsigned> Names2Regs;
79 /// Maps from register mask names to register masks.
80 StringMap<const uint32_t *> Names2RegMasks;
81 /// Maps from subregister names to subregister indices.
82 StringMap<unsigned> Names2SubRegIndices;
83 /// Maps from slot numbers to function's unnamed basic blocks.
84 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
87 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
88 StringRef Source, const PerFunctionMIParsingState &PFS,
89 const SlotMapping &IRSlots);
93 /// Report an error at the current location with the given message.
95 /// This function always return true.
96 bool error(const Twine &Msg);
98 /// Report an error at the given location with the given message.
100 /// This function always return true.
101 bool error(StringRef::iterator Loc, const Twine &Msg);
103 bool parse(MachineInstr *&MI);
104 bool parseStandaloneMBB(MachineBasicBlock *&MBB);
105 bool parseStandaloneNamedRegister(unsigned &Reg);
106 bool parseStandaloneVirtualRegister(unsigned &Reg);
107 bool parseStandaloneIRBlockReference(const BasicBlock *&BB);
109 bool parseRegister(unsigned &Reg);
110 bool parseRegisterFlag(unsigned &Flags);
111 bool parseSubRegisterIndex(unsigned &SubReg);
112 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
113 bool parseImmediateOperand(MachineOperand &Dest);
114 bool parseMBBReference(MachineBasicBlock *&MBB);
115 bool parseMBBOperand(MachineOperand &Dest);
116 bool parseStackObjectOperand(MachineOperand &Dest);
117 bool parseFixedStackObjectOperand(MachineOperand &Dest);
118 bool parseGlobalValue(GlobalValue *&GV);
119 bool parseGlobalAddressOperand(MachineOperand &Dest);
120 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
121 bool parseJumpTableIndexOperand(MachineOperand &Dest);
122 bool parseExternalSymbolOperand(MachineOperand &Dest);
123 bool parseMDNode(MDNode *&Node);
124 bool parseMetadataOperand(MachineOperand &Dest);
125 bool parseCFIOffset(int &Offset);
126 bool parseCFIRegister(unsigned &Reg);
127 bool parseCFIOperand(MachineOperand &Dest);
128 bool parseIRBlock(BasicBlock *&BB, const Function &F);
129 bool parseBlockAddressOperand(MachineOperand &Dest);
130 bool parseMachineOperand(MachineOperand &Dest);
133 /// Convert the integer literal in the current token into an unsigned integer.
135 /// Return true if an error occurred.
136 bool getUnsigned(unsigned &Result);
138 /// If the current token is of the given kind, consume it and return false.
139 /// Otherwise report an error and return true.
140 bool expectAndConsume(MIToken::TokenKind TokenKind);
142 void initNames2InstrOpCodes();
144 /// Try to convert an instruction name to an opcode. Return true if the
145 /// instruction name is invalid.
146 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
148 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
150 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
151 const MCInstrDesc &MCID);
153 void initNames2Regs();
155 /// Try to convert a register name to a register number. Return true if the
156 /// register name is invalid.
157 bool getRegisterByName(StringRef RegName, unsigned &Reg);
159 void initNames2RegMasks();
161 /// Check if the given identifier is a name of a register mask.
163 /// Return null if the identifier isn't a register mask.
164 const uint32_t *getRegMask(StringRef Identifier);
166 void initNames2SubRegIndices();
168 /// Check if the given identifier is a name of a subregister index.
170 /// Return 0 if the name isn't a subregister index class.
171 unsigned getSubRegIndex(StringRef Name);
173 void initSlots2BasicBlocks();
175 const BasicBlock *getIRBlock(unsigned Slot);
178 } // end anonymous namespace
180 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
181 StringRef Source, const PerFunctionMIParsingState &PFS,
182 const SlotMapping &IRSlots)
183 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
184 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
186 void MIParser::lex() {
187 CurrentSource = lexMIToken(
188 CurrentSource, Token,
189 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
192 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
194 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
195 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
196 Error = SMDiagnostic(
198 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
199 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
203 static const char *toString(MIToken::TokenKind TokenKind) {
207 case MIToken::lparen:
209 case MIToken::rparen:
212 return "<unknown token>";
216 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
217 if (Token.isNot(TokenKind))
218 return error(Twine("expected ") + toString(TokenKind));
223 bool MIParser::parse(MachineInstr *&MI) {
226 // Parse any register operands before '='
227 // TODO: Allow parsing of multiple operands before '='
228 MachineOperand MO = MachineOperand::CreateImm(0);
229 SmallVector<MachineOperandWithLocation, 8> Operands;
230 if (Token.isRegister() || Token.isRegisterFlag()) {
231 auto Loc = Token.location();
232 if (parseRegisterOperand(MO, /*IsDef=*/true))
234 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
235 if (Token.isNot(MIToken::equal))
236 return error("expected '='");
240 unsigned OpCode, Flags = 0;
241 if (Token.isError() || parseInstruction(OpCode, Flags))
244 // TODO: Parse the bundle instruction flags and memory operands.
246 // Parse the remaining machine operands.
247 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) {
248 auto Loc = Token.location();
249 if (parseMachineOperand(MO))
251 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
252 if (Token.is(MIToken::Eof))
254 if (Token.isNot(MIToken::comma))
255 return error("expected ',' before the next machine operand");
259 DebugLoc DebugLocation;
260 if (Token.is(MIToken::kw_debug_location)) {
262 if (Token.isNot(MIToken::exclaim))
263 return error("expected a metadata node after 'debug-location'");
264 MDNode *Node = nullptr;
265 if (parseMDNode(Node))
267 DebugLocation = DebugLoc(Node);
270 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
271 if (!MCID.isVariadic()) {
272 // FIXME: Move the implicit operand verification to the machine verifier.
273 if (verifyImplicitOperands(Operands, MCID))
277 // TODO: Check for extraneous machine operands.
278 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
280 for (const auto &Operand : Operands)
281 MI->addOperand(MF, Operand.Operand);
285 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
287 if (Token.isNot(MIToken::MachineBasicBlock))
288 return error("expected a machine basic block reference");
289 if (parseMBBReference(MBB))
292 if (Token.isNot(MIToken::Eof))
294 "expected end of string after the machine basic block reference");
298 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
300 if (Token.isNot(MIToken::NamedRegister))
301 return error("expected a named register");
302 if (parseRegister(Reg))
305 if (Token.isNot(MIToken::Eof))
306 return error("expected end of string after the register reference");
310 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) {
312 if (Token.isNot(MIToken::VirtualRegister))
313 return error("expected a virtual register");
314 if (parseRegister(Reg))
317 if (Token.isNot(MIToken::Eof))
318 return error("expected end of string after the register reference");
322 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) {
324 if (Token.isNot(MIToken::IRBlock))
325 return error("expected an IR block reference");
326 unsigned SlotNumber = 0;
327 if (getUnsigned(SlotNumber))
329 BB = getIRBlock(SlotNumber);
331 return error(Twine("use of undefined IR block '%ir-block.") +
332 Twine(SlotNumber) + "'");
334 if (Token.isNot(MIToken::Eof))
335 return error("expected end of string after the IR block reference");
339 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
340 assert(MO.isImplicit());
341 return MO.isDef() ? "implicit-def" : "implicit";
344 static std::string getRegisterName(const TargetRegisterInfo *TRI,
346 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
347 return StringRef(TRI->getName(Reg)).lower();
350 bool MIParser::verifyImplicitOperands(
351 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
353 // We can't verify call instructions as they can contain arbitrary implicit
354 // register and register mask operands.
357 // Gather all the expected implicit operands.
358 SmallVector<MachineOperand, 4> ImplicitOperands;
359 if (MCID.ImplicitDefs)
360 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
361 ImplicitOperands.push_back(
362 MachineOperand::CreateReg(*ImpDefs, true, true));
363 if (MCID.ImplicitUses)
364 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
365 ImplicitOperands.push_back(
366 MachineOperand::CreateReg(*ImpUses, false, true));
368 const auto *TRI = MF.getSubtarget().getRegisterInfo();
369 assert(TRI && "Expected target register info");
370 size_t I = ImplicitOperands.size(), J = Operands.size();
375 const auto &ImplicitOperand = ImplicitOperands[I];
376 const auto &Operand = Operands[J].Operand;
377 if (ImplicitOperand.isIdenticalTo(Operand))
379 if (Operand.isReg() && Operand.isImplicit()) {
380 return error(Operands[J].Begin,
381 Twine("expected an implicit register operand '") +
382 printImplicitRegisterFlag(ImplicitOperand) + " %" +
383 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
386 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
387 // insead of reporting an error at this location:
390 // report the error at the following location:
393 return error(J < Operands.size() ? Operands[J].End : Token.location(),
394 Twine("missing implicit register operand '") +
395 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
396 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
401 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
402 if (Token.is(MIToken::kw_frame_setup)) {
403 Flags |= MachineInstr::FrameSetup;
406 if (Token.isNot(MIToken::Identifier))
407 return error("expected a machine instruction");
408 StringRef InstrName = Token.stringValue();
409 if (parseInstrName(InstrName, OpCode))
410 return error(Twine("unknown machine instruction name '") + InstrName + "'");
415 bool MIParser::parseRegister(unsigned &Reg) {
416 switch (Token.kind()) {
417 case MIToken::underscore:
420 case MIToken::NamedRegister: {
421 StringRef Name = Token.stringValue();
422 if (getRegisterByName(Name, Reg))
423 return error(Twine("unknown register name '") + Name + "'");
426 case MIToken::VirtualRegister: {
430 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
431 if (RegInfo == PFS.VirtualRegisterSlots.end())
432 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
434 Reg = RegInfo->second;
437 // TODO: Parse other register kinds.
439 llvm_unreachable("The current token should be a register");
444 bool MIParser::parseRegisterFlag(unsigned &Flags) {
445 switch (Token.kind()) {
446 case MIToken::kw_implicit:
447 Flags |= RegState::Implicit;
449 case MIToken::kw_implicit_define:
450 Flags |= RegState::ImplicitDefine;
452 case MIToken::kw_dead:
453 Flags |= RegState::Dead;
455 case MIToken::kw_killed:
456 Flags |= RegState::Kill;
458 case MIToken::kw_undef:
459 Flags |= RegState::Undef;
461 // TODO: report an error when we specify the same flag more than once.
462 // TODO: parse the other register flags.
464 llvm_unreachable("The current token should be a register flag");
470 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
471 assert(Token.is(MIToken::colon));
473 if (Token.isNot(MIToken::Identifier))
474 return error("expected a subregister index after ':'");
475 auto Name = Token.stringValue();
476 SubReg = getSubRegIndex(Name);
478 return error(Twine("use of unknown subregister index '") + Name + "'");
483 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
485 unsigned Flags = IsDef ? RegState::Define : 0;
486 while (Token.isRegisterFlag()) {
487 if (parseRegisterFlag(Flags))
490 if (!Token.isRegister())
491 return error("expected a register after register flags");
492 if (parseRegister(Reg))
496 if (Token.is(MIToken::colon)) {
497 if (parseSubRegisterIndex(SubReg))
500 Dest = MachineOperand::CreateReg(
501 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
502 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
503 /*isEarlyClobber=*/false, SubReg);
507 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
508 assert(Token.is(MIToken::IntegerLiteral));
509 const APSInt &Int = Token.integerValue();
510 if (Int.getMinSignedBits() > 64)
511 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
512 llvm_unreachable("Can't parse large integer literals yet!");
513 Dest = MachineOperand::CreateImm(Int.getExtValue());
518 bool MIParser::getUnsigned(unsigned &Result) {
519 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
520 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
521 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
523 return error("expected 32-bit integer (too large)");
528 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
529 assert(Token.is(MIToken::MachineBasicBlock));
531 if (getUnsigned(Number))
533 auto MBBInfo = PFS.MBBSlots.find(Number);
534 if (MBBInfo == PFS.MBBSlots.end())
535 return error(Twine("use of undefined machine basic block #") +
537 MBB = MBBInfo->second;
538 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
539 return error(Twine("the name of machine basic block #") + Twine(Number) +
540 " isn't '" + Token.stringValue() + "'");
544 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
545 MachineBasicBlock *MBB;
546 if (parseMBBReference(MBB))
548 Dest = MachineOperand::CreateMBB(MBB);
553 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
554 assert(Token.is(MIToken::StackObject));
558 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
559 if (ObjectInfo == PFS.StackObjectSlots.end())
560 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
563 if (const auto *Alloca =
564 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
565 Name = Alloca->getName();
566 if (!Token.stringValue().empty() && Token.stringValue() != Name)
567 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
568 "' isn't '" + Token.stringValue() + "'");
570 Dest = MachineOperand::CreateFI(ObjectInfo->second);
574 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
575 assert(Token.is(MIToken::FixedStackObject));
579 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
580 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
581 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
584 Dest = MachineOperand::CreateFI(ObjectInfo->second);
588 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
589 switch (Token.kind()) {
590 case MIToken::NamedGlobalValue:
591 case MIToken::QuotedNamedGlobalValue: {
592 StringValueUtility Name(Token);
593 const Module *M = MF.getFunction()->getParent();
594 GV = M->getNamedValue(Name);
596 return error(Twine("use of undefined global value '@") +
597 Token.rawStringValue() + "'");
600 case MIToken::GlobalValue: {
602 if (getUnsigned(GVIdx))
604 if (GVIdx >= IRSlots.GlobalValues.size())
605 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
607 GV = IRSlots.GlobalValues[GVIdx];
611 llvm_unreachable("The current token should be a global value");
616 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
617 GlobalValue *GV = nullptr;
618 if (parseGlobalValue(GV))
620 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
621 // TODO: Parse offset and target flags.
626 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
627 assert(Token.is(MIToken::ConstantPoolItem));
631 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
632 if (ConstantInfo == PFS.ConstantPoolSlots.end())
633 return error("use of undefined constant '%const." + Twine(ID) + "'");
635 // TODO: Parse offset and target flags.
636 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
640 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
641 assert(Token.is(MIToken::JumpTableIndex));
645 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
646 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
647 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
649 // TODO: Parse target flags.
650 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
654 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
655 assert(Token.is(MIToken::ExternalSymbol) ||
656 Token.is(MIToken::QuotedExternalSymbol));
657 StringValueUtility Name(Token);
658 const char *Symbol = MF.createExternalSymbolName(Name);
660 // TODO: Parse the target flags.
661 Dest = MachineOperand::CreateES(Symbol);
665 bool MIParser::parseMDNode(MDNode *&Node) {
666 assert(Token.is(MIToken::exclaim));
667 auto Loc = Token.location();
669 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
670 return error("expected metadata id after '!'");
674 auto NodeInfo = IRSlots.MetadataNodes.find(ID);
675 if (NodeInfo == IRSlots.MetadataNodes.end())
676 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
678 Node = NodeInfo->second.get();
682 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
683 MDNode *Node = nullptr;
684 if (parseMDNode(Node))
686 Dest = MachineOperand::CreateMetadata(Node);
690 bool MIParser::parseCFIOffset(int &Offset) {
691 if (Token.isNot(MIToken::IntegerLiteral))
692 return error("expected a cfi offset");
693 if (Token.integerValue().getMinSignedBits() > 32)
694 return error("expected a 32 bit integer (the cfi offset is too large)");
695 Offset = (int)Token.integerValue().getExtValue();
700 bool MIParser::parseCFIRegister(unsigned &Reg) {
701 if (Token.isNot(MIToken::NamedRegister))
702 return error("expected a cfi register");
704 if (parseRegister(LLVMReg))
706 const auto *TRI = MF.getSubtarget().getRegisterInfo();
707 assert(TRI && "Expected target register info");
708 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
710 return error("invalid DWARF register");
711 Reg = (unsigned)DwarfReg;
716 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
717 auto Kind = Token.kind();
719 auto &MMI = MF.getMMI();
724 case MIToken::kw_cfi_offset:
725 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
726 parseCFIOffset(Offset))
729 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
731 case MIToken::kw_cfi_def_cfa_register:
732 if (parseCFIRegister(Reg))
735 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg));
737 case MIToken::kw_cfi_def_cfa_offset:
738 if (parseCFIOffset(Offset))
740 // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
741 CFIIndex = MMI.addFrameInst(
742 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
745 // TODO: Parse the other CFI operands.
746 llvm_unreachable("The current token should be a cfi operand");
748 Dest = MachineOperand::CreateCFIIndex(CFIIndex);
752 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
753 switch (Token.kind()) {
754 case MIToken::NamedIRBlock:
755 case MIToken::QuotedNamedIRBlock: {
756 StringValueUtility Name(Token);
757 BB = dyn_cast_or_null<BasicBlock>(F.getValueSymbolTable().lookup(Name));
759 return error(Twine("use of undefined IR block '%ir-block.") +
760 Token.rawStringValue() + "'");
763 case MIToken::IRBlock: {
764 unsigned SlotNumber = 0;
765 if (getUnsigned(SlotNumber))
767 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber));
769 return error(Twine("use of undefined IR block '%ir-block.") +
770 Twine(SlotNumber) + "'");
774 llvm_unreachable("The current token should be an IR block reference");
779 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
780 assert(Token.is(MIToken::kw_blockaddress));
782 if (expectAndConsume(MIToken::lparen))
784 if (Token.isNot(MIToken::GlobalValue) &&
785 Token.isNot(MIToken::NamedGlobalValue) &&
786 Token.isNot(MIToken::QuotedNamedGlobalValue))
787 return error("expected a global value");
788 GlobalValue *GV = nullptr;
789 if (parseGlobalValue(GV))
791 auto *F = dyn_cast<Function>(GV);
793 return error("expected an IR function reference");
795 if (expectAndConsume(MIToken::comma))
797 BasicBlock *BB = nullptr;
798 if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock) &&
799 Token.isNot(MIToken::QuotedNamedIRBlock))
800 return error("expected an IR block reference");
801 if (parseIRBlock(BB, *F))
804 if (expectAndConsume(MIToken::rparen))
806 // TODO: parse offset and target flags.
807 Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
811 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
812 switch (Token.kind()) {
813 case MIToken::kw_implicit:
814 case MIToken::kw_implicit_define:
815 case MIToken::kw_dead:
816 case MIToken::kw_killed:
817 case MIToken::kw_undef:
818 case MIToken::underscore:
819 case MIToken::NamedRegister:
820 case MIToken::VirtualRegister:
821 return parseRegisterOperand(Dest);
822 case MIToken::IntegerLiteral:
823 return parseImmediateOperand(Dest);
824 case MIToken::MachineBasicBlock:
825 return parseMBBOperand(Dest);
826 case MIToken::StackObject:
827 return parseStackObjectOperand(Dest);
828 case MIToken::FixedStackObject:
829 return parseFixedStackObjectOperand(Dest);
830 case MIToken::GlobalValue:
831 case MIToken::NamedGlobalValue:
832 case MIToken::QuotedNamedGlobalValue:
833 return parseGlobalAddressOperand(Dest);
834 case MIToken::ConstantPoolItem:
835 return parseConstantPoolIndexOperand(Dest);
836 case MIToken::JumpTableIndex:
837 return parseJumpTableIndexOperand(Dest);
838 case MIToken::ExternalSymbol:
839 case MIToken::QuotedExternalSymbol:
840 return parseExternalSymbolOperand(Dest);
841 case MIToken::exclaim:
842 return parseMetadataOperand(Dest);
843 case MIToken::kw_cfi_offset:
844 case MIToken::kw_cfi_def_cfa_register:
845 case MIToken::kw_cfi_def_cfa_offset:
846 return parseCFIOperand(Dest);
847 case MIToken::kw_blockaddress:
848 return parseBlockAddressOperand(Dest);
851 case MIToken::Identifier:
852 if (const auto *RegMask = getRegMask(Token.stringValue())) {
853 Dest = MachineOperand::CreateRegMask(RegMask);
859 // TODO: parse the other machine operands.
860 return error("expected a machine operand");
865 void MIParser::initNames2InstrOpCodes() {
866 if (!Names2InstrOpCodes.empty())
868 const auto *TII = MF.getSubtarget().getInstrInfo();
869 assert(TII && "Expected target instruction info");
870 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
871 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
874 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
875 initNames2InstrOpCodes();
876 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
877 if (InstrInfo == Names2InstrOpCodes.end())
879 OpCode = InstrInfo->getValue();
883 void MIParser::initNames2Regs() {
884 if (!Names2Regs.empty())
886 // The '%noreg' register is the register 0.
887 Names2Regs.insert(std::make_pair("noreg", 0));
888 const auto *TRI = MF.getSubtarget().getRegisterInfo();
889 assert(TRI && "Expected target register info");
890 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
892 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
895 assert(WasInserted && "Expected registers to be unique case-insensitively");
899 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
901 auto RegInfo = Names2Regs.find(RegName);
902 if (RegInfo == Names2Regs.end())
904 Reg = RegInfo->getValue();
908 void MIParser::initNames2RegMasks() {
909 if (!Names2RegMasks.empty())
911 const auto *TRI = MF.getSubtarget().getRegisterInfo();
912 assert(TRI && "Expected target register info");
913 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
914 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
915 assert(RegMasks.size() == RegMaskNames.size());
916 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
917 Names2RegMasks.insert(
918 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
921 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
922 initNames2RegMasks();
923 auto RegMaskInfo = Names2RegMasks.find(Identifier);
924 if (RegMaskInfo == Names2RegMasks.end())
926 return RegMaskInfo->getValue();
929 void MIParser::initNames2SubRegIndices() {
930 if (!Names2SubRegIndices.empty())
932 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
933 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
934 Names2SubRegIndices.insert(
935 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
938 unsigned MIParser::getSubRegIndex(StringRef Name) {
939 initNames2SubRegIndices();
940 auto SubRegInfo = Names2SubRegIndices.find(Name);
941 if (SubRegInfo == Names2SubRegIndices.end())
943 return SubRegInfo->getValue();
946 void MIParser::initSlots2BasicBlocks() {
947 if (!Slots2BasicBlocks.empty())
949 const auto &F = *MF.getFunction();
950 ModuleSlotTracker MST(F.getParent());
951 MST.incorporateFunction(F);
955 int Slot = MST.getLocalSlot(&BB);
958 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
962 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
963 initSlots2BasicBlocks();
964 auto BlockInfo = Slots2BasicBlocks.find(Slot);
965 if (BlockInfo == Slots2BasicBlocks.end())
967 return BlockInfo->second;
970 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
971 MachineFunction &MF, StringRef Src,
972 const PerFunctionMIParsingState &PFS,
973 const SlotMapping &IRSlots, SMDiagnostic &Error) {
974 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
977 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
978 MachineFunction &MF, StringRef Src,
979 const PerFunctionMIParsingState &PFS,
980 const SlotMapping &IRSlots, SMDiagnostic &Error) {
981 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB);
984 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
985 MachineFunction &MF, StringRef Src,
986 const PerFunctionMIParsingState &PFS,
987 const SlotMapping &IRSlots,
988 SMDiagnostic &Error) {
989 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
990 .parseStandaloneNamedRegister(Reg);
993 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM,
994 MachineFunction &MF, StringRef Src,
995 const PerFunctionMIParsingState &PFS,
996 const SlotMapping &IRSlots,
997 SMDiagnostic &Error) {
998 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
999 .parseStandaloneVirtualRegister(Reg);
1002 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM,
1003 MachineFunction &MF, StringRef Src,
1004 const PerFunctionMIParsingState &PFS,
1005 const SlotMapping &IRSlots,
1006 SMDiagnostic &Error) {
1007 return MIParser(SM, MF, Error, Src, PFS, IRSlots)
1008 .parseStandaloneIRBlockReference(BB);