1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Collect the sequence of machine instructions for a basic block.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/ADT/SmallPtrSet.h"
16 #include "llvm/ADT/SmallString.h"
17 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
18 #include "llvm/CodeGen/LiveVariables.h"
19 #include "llvm/CodeGen/MachineDominators.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/SlotIndexes.h"
25 #include "llvm/IR/BasicBlock.h"
26 #include "llvm/IR/DataLayout.h"
27 #include "llvm/IR/LeakDetector.h"
28 #include "llvm/MC/MCAsmInfo.h"
29 #include "llvm/MC/MCContext.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
35 #include "llvm/Target/TargetSubtargetInfo.h"
39 #define DEBUG_TYPE "codegen"
41 MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
42 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
43 AddressTaken(false), CachedMCSymbol(nullptr) {
47 MachineBasicBlock::~MachineBasicBlock() {
48 LeakDetector::removeGarbageObject(this);
51 /// getSymbol - Return the MCSymbol for this basic block.
53 MCSymbol *MachineBasicBlock::getSymbol() const {
54 if (!CachedMCSymbol) {
55 const MachineFunction *MF = getParent();
56 MCContext &Ctx = MF->getContext();
57 const TargetMachine &TM = MF->getTarget();
59 TM.getSubtargetImpl()->getDataLayout()->getPrivateGlobalPrefix();
60 CachedMCSymbol = Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" +
61 Twine(MF->getFunctionNumber()) +
62 "_" + Twine(getNumber()));
65 return CachedMCSymbol;
69 raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
74 /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
75 /// parent pointer of the MBB, the MBB numbering, and any instructions in the
76 /// MBB to be on the right operand list for registers.
78 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
79 /// gets the next available unique MBB number. If it is removed from a
80 /// MachineFunction, it goes back to being #-1.
81 void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
82 MachineFunction &MF = *N->getParent();
83 N->Number = MF.addToMBBNumbering(N);
85 // Make sure the instructions have their operands in the reginfo lists.
86 MachineRegisterInfo &RegInfo = MF.getRegInfo();
87 for (MachineBasicBlock::instr_iterator
88 I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
89 I->AddRegOperandsToUseLists(RegInfo);
91 LeakDetector::removeGarbageObject(N);
94 void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
95 N->getParent()->removeFromMBBNumbering(N->Number);
97 LeakDetector::addGarbageObject(N);
101 /// addNodeToList (MI) - When we add an instruction to a basic block
102 /// list, we update its parent pointer and add its operands from reg use/def
103 /// lists if appropriate.
104 void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
105 assert(!N->getParent() && "machine instruction already in a basic block");
106 N->setParent(Parent);
108 // Add the instruction's register operands to their corresponding
110 MachineFunction *MF = Parent->getParent();
111 N->AddRegOperandsToUseLists(MF->getRegInfo());
113 LeakDetector::removeGarbageObject(N);
116 /// removeNodeFromList (MI) - When we remove an instruction from a basic block
117 /// list, we update its parent pointer and remove its operands from reg use/def
118 /// lists if appropriate.
119 void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
120 assert(N->getParent() && "machine instruction not in a basic block");
122 // Remove from the use/def lists.
123 if (MachineFunction *MF = N->getParent()->getParent())
124 N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
126 N->setParent(nullptr);
128 LeakDetector::addGarbageObject(N);
131 /// transferNodesFromList (MI) - When moving a range of instructions from one
132 /// MBB list to another, we need to update the parent pointers and the use/def
134 void ilist_traits<MachineInstr>::
135 transferNodesFromList(ilist_traits<MachineInstr> &fromList,
136 ilist_iterator<MachineInstr> first,
137 ilist_iterator<MachineInstr> last) {
138 assert(Parent->getParent() == fromList.Parent->getParent() &&
139 "MachineInstr parent mismatch!");
141 // Splice within the same MBB -> no change.
142 if (Parent == fromList.Parent) return;
144 // If splicing between two blocks within the same function, just update the
146 for (; first != last; ++first)
147 first->setParent(Parent);
150 void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
151 assert(!MI->getParent() && "MI is still in a block!");
152 Parent->getParent()->DeleteMachineInstr(MI);
155 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
156 instr_iterator I = instr_begin(), E = instr_end();
157 while (I != E && I->isPHI())
159 assert((I == E || !I->isInsideBundle()) &&
160 "First non-phi MI cannot be inside a bundle!");
164 MachineBasicBlock::iterator
165 MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
167 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
169 // FIXME: This needs to change if we wish to bundle labels / dbg_values
170 // inside the bundle.
171 assert((I == E || !I->isInsideBundle()) &&
172 "First non-phi / non-label instruction is inside a bundle!");
176 MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
177 iterator B = begin(), E = end(), I = E;
178 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
180 while (I != E && !I->isTerminator())
185 MachineBasicBlock::const_iterator
186 MachineBasicBlock::getFirstTerminator() const {
187 const_iterator B = begin(), E = end(), I = E;
188 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
190 while (I != E && !I->isTerminator())
195 MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() {
196 instr_iterator B = instr_begin(), E = instr_end(), I = E;
197 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
199 while (I != E && !I->isTerminator())
204 MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
205 // Skip over end-of-block dbg_value instructions.
206 instr_iterator B = instr_begin(), I = instr_end();
209 // Return instruction that starts a bundle.
210 if (I->isDebugValue() || I->isInsideBundle())
214 // The block is all debug values.
218 MachineBasicBlock::const_iterator
219 MachineBasicBlock::getLastNonDebugInstr() const {
220 // Skip over end-of-block dbg_value instructions.
221 const_instr_iterator B = instr_begin(), I = instr_end();
224 // Return instruction that starts a bundle.
225 if (I->isDebugValue() || I->isInsideBundle())
229 // The block is all debug values.
233 const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const {
234 // A block with a landing pad successor only has one other successor.
237 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
238 if ((*I)->isLandingPad())
243 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
244 void MachineBasicBlock::dump() const {
249 StringRef MachineBasicBlock::getName() const {
250 if (const BasicBlock *LBB = getBasicBlock())
251 return LBB->getName();
256 /// Return a hopefully unique identifier for this block.
257 std::string MachineBasicBlock::getFullName() const {
260 Name = (getParent()->getName() + ":").str();
262 Name += getBasicBlock()->getName();
264 Name += (Twine("BB") + Twine(getNumber())).str();
268 void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const {
269 const MachineFunction *MF = getParent();
271 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
277 OS << Indexes->getMBBStartIdx(this) << '\t';
279 OS << "BB#" << getNumber() << ": ";
281 const char *Comma = "";
282 if (const BasicBlock *LBB = getBasicBlock()) {
283 OS << Comma << "derived from LLVM BB ";
284 LBB->printAsOperand(OS, /*PrintType=*/false);
287 if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
288 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
290 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
295 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
296 if (!livein_empty()) {
297 if (Indexes) OS << '\t';
299 for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
300 OS << ' ' << PrintReg(*I, TRI);
303 // Print the preds of this block according to the CFG.
305 if (Indexes) OS << '\t';
306 OS << " Predecessors according to CFG:";
307 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
308 OS << " BB#" << (*PI)->getNumber();
312 for (const_instr_iterator I = instr_begin(); I != instr_end(); ++I) {
314 if (Indexes->hasIndex(I))
315 OS << Indexes->getInstructionIndex(I);
319 if (I->isInsideBundle())
321 I->print(OS, &getParent()->getTarget());
324 // Print the successors of this block according to the CFG.
326 if (Indexes) OS << '\t';
327 OS << " Successors according to CFG:";
328 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) {
329 OS << " BB#" << (*SI)->getNumber();
330 if (!Weights.empty())
331 OS << '(' << *getWeightIterator(SI) << ')';
337 void MachineBasicBlock::printAsOperand(raw_ostream &OS, bool /*PrintType*/) const {
338 OS << "BB#" << getNumber();
341 void MachineBasicBlock::removeLiveIn(unsigned Reg) {
342 std::vector<unsigned>::iterator I =
343 std::find(LiveIns.begin(), LiveIns.end(), Reg);
344 if (I != LiveIns.end())
348 bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
349 livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
350 return I != livein_end();
354 MachineBasicBlock::addLiveIn(unsigned PhysReg, const TargetRegisterClass *RC) {
355 assert(getParent() && "MBB must be inserted in function");
356 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && "Expected physreg");
357 assert(RC && "Register class is required");
358 assert((isLandingPad() || this == &getParent()->front()) &&
359 "Only the entry block and landing pads can have physreg live ins");
361 bool LiveIn = isLiveIn(PhysReg);
362 iterator I = SkipPHIsAndLabels(begin()), E = end();
363 MachineRegisterInfo &MRI = getParent()->getRegInfo();
364 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
366 // Look for an existing copy.
368 for (;I != E && I->isCopy(); ++I)
369 if (I->getOperand(1).getReg() == PhysReg) {
370 unsigned VirtReg = I->getOperand(0).getReg();
371 if (!MRI.constrainRegClass(VirtReg, RC))
372 llvm_unreachable("Incompatible live-in register class.");
376 // No luck, create a virtual register.
377 unsigned VirtReg = MRI.createVirtualRegister(RC);
378 BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
379 .addReg(PhysReg, RegState::Kill);
385 void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
386 getParent()->splice(NewAfter, this);
389 void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
390 MachineFunction::iterator BBI = NewBefore;
391 getParent()->splice(++BBI, this);
394 void MachineBasicBlock::updateTerminator() {
395 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
396 // A block with no successors has no concerns with fall-through edges.
397 if (this->succ_empty()) return;
399 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
400 SmallVector<MachineOperand, 4> Cond;
401 DebugLoc dl; // FIXME: this is nowhere
402 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
404 assert(!B && "UpdateTerminators requires analyzable predecessors!");
407 // The block has an unconditional branch. If its successor is now
408 // its layout successor, delete the branch.
409 if (isLayoutSuccessor(TBB))
410 TII->RemoveBranch(*this);
412 // The block has an unconditional fallthrough. If its successor is not
413 // its layout successor, insert a branch. First we have to locate the
414 // only non-landing-pad successor, as that is the fallthrough block.
415 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
416 if ((*SI)->isLandingPad())
418 assert(!TBB && "Found more than one non-landing-pad successor!");
422 // If there is no non-landing-pad successor, the block has no
423 // fall-through edges to be concerned with.
427 // Finally update the unconditional successor to be reached via a branch
428 // if it would not be reached by fallthrough.
429 if (!isLayoutSuccessor(TBB))
430 TII->InsertBranch(*this, TBB, nullptr, Cond, dl);
434 // The block has a non-fallthrough conditional branch. If one of its
435 // successors is its layout successor, rewrite it to a fallthrough
436 // conditional branch.
437 if (isLayoutSuccessor(TBB)) {
438 if (TII->ReverseBranchCondition(Cond))
440 TII->RemoveBranch(*this);
441 TII->InsertBranch(*this, FBB, nullptr, Cond, dl);
442 } else if (isLayoutSuccessor(FBB)) {
443 TII->RemoveBranch(*this);
444 TII->InsertBranch(*this, TBB, nullptr, Cond, dl);
447 // Walk through the successors and find the successor which is not
448 // a landing pad and is not the conditional branch destination (in TBB)
449 // as the fallthrough successor.
450 MachineBasicBlock *FallthroughBB = nullptr;
451 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
452 if ((*SI)->isLandingPad() || *SI == TBB)
454 assert(!FallthroughBB && "Found more than one fallthrough successor.");
457 if (!FallthroughBB && canFallThrough()) {
458 // We fallthrough to the same basic block as the conditional jump
459 // targets. Remove the conditional jump, leaving unconditional
461 // FIXME: This does not seem like a reasonable pattern to support, but it
462 // has been seen in the wild coming out of degenerate ARM test cases.
463 TII->RemoveBranch(*this);
465 // Finally update the unconditional successor to be reached via a branch
466 // if it would not be reached by fallthrough.
467 if (!isLayoutSuccessor(TBB))
468 TII->InsertBranch(*this, TBB, nullptr, Cond, dl);
472 // The block has a fallthrough conditional branch.
473 if (isLayoutSuccessor(TBB)) {
474 if (TII->ReverseBranchCondition(Cond)) {
475 // We can't reverse the condition, add an unconditional branch.
477 TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, dl);
480 TII->RemoveBranch(*this);
481 TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, dl);
482 } else if (!isLayoutSuccessor(FallthroughBB)) {
483 TII->RemoveBranch(*this);
484 TII->InsertBranch(*this, TBB, FallthroughBB, Cond, dl);
490 void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ, uint32_t weight) {
492 // If we see non-zero value for the first time it means we actually use Weight
493 // list, so we fill all Weights with 0's.
494 if (weight != 0 && Weights.empty())
495 Weights.resize(Successors.size());
497 if (weight != 0 || !Weights.empty())
498 Weights.push_back(weight);
500 Successors.push_back(succ);
501 succ->addPredecessor(this);
504 void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) {
505 succ->removePredecessor(this);
506 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
507 assert(I != Successors.end() && "Not a current successor!");
509 // If Weight list is empty it means we don't use it (disabled optimization).
510 if (!Weights.empty()) {
511 weight_iterator WI = getWeightIterator(I);
518 MachineBasicBlock::succ_iterator
519 MachineBasicBlock::removeSuccessor(succ_iterator I) {
520 assert(I != Successors.end() && "Not a current successor!");
522 // If Weight list is empty it means we don't use it (disabled optimization).
523 if (!Weights.empty()) {
524 weight_iterator WI = getWeightIterator(I);
528 (*I)->removePredecessor(this);
529 return Successors.erase(I);
532 void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,
533 MachineBasicBlock *New) {
537 succ_iterator E = succ_end();
538 succ_iterator NewI = E;
539 succ_iterator OldI = E;
540 for (succ_iterator I = succ_begin(); I != E; ++I) {
552 assert(OldI != E && "Old is not a successor of this block");
553 Old->removePredecessor(this);
555 // If New isn't already a successor, let it take Old's place.
557 New->addPredecessor(this);
562 // New is already a successor.
563 // Update its weight instead of adding a duplicate edge.
564 if (!Weights.empty()) {
565 weight_iterator OldWI = getWeightIterator(OldI);
566 *getWeightIterator(NewI) += *OldWI;
567 Weights.erase(OldWI);
569 Successors.erase(OldI);
572 void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) {
573 Predecessors.push_back(pred);
576 void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) {
577 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred);
578 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
579 Predecessors.erase(I);
582 void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) {
586 while (!fromMBB->succ_empty()) {
587 MachineBasicBlock *Succ = *fromMBB->succ_begin();
590 // If Weight list is empty it means we don't use it (disabled optimization).
591 if (!fromMBB->Weights.empty())
592 Weight = *fromMBB->Weights.begin();
594 addSuccessor(Succ, Weight);
595 fromMBB->removeSuccessor(Succ);
600 MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) {
604 while (!fromMBB->succ_empty()) {
605 MachineBasicBlock *Succ = *fromMBB->succ_begin();
607 if (!fromMBB->Weights.empty())
608 Weight = *fromMBB->Weights.begin();
609 addSuccessor(Succ, Weight);
610 fromMBB->removeSuccessor(Succ);
612 // Fix up any PHI nodes in the successor.
613 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(),
614 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI)
615 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
616 MachineOperand &MO = MI->getOperand(i);
617 if (MO.getMBB() == fromMBB)
623 bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const {
624 return std::find(pred_begin(), pred_end(), MBB) != pred_end();
627 bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
628 return std::find(succ_begin(), succ_end(), MBB) != succ_end();
631 bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
632 MachineFunction::const_iterator I(this);
633 return std::next(I) == MachineFunction::const_iterator(MBB);
636 bool MachineBasicBlock::canFallThrough() {
637 MachineFunction::iterator Fallthrough = this;
639 // If FallthroughBlock is off the end of the function, it can't fall through.
640 if (Fallthrough == getParent()->end())
643 // If FallthroughBlock isn't a successor, no fallthrough is possible.
644 if (!isSuccessor(Fallthrough))
647 // Analyze the branches, if any, at the end of the block.
648 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
649 SmallVector<MachineOperand, 4> Cond;
650 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
651 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
652 // If we couldn't analyze the branch, examine the last instruction.
653 // If the block doesn't end in a known control barrier, assume fallthrough
654 // is possible. The isPredicated check is needed because this code can be
655 // called during IfConversion, where an instruction which is normally a
656 // Barrier is predicated and thus no longer an actual control barrier.
657 return empty() || !back().isBarrier() || TII->isPredicated(&back());
660 // If there is no branch, control always falls through.
661 if (!TBB) return true;
663 // If there is some explicit branch to the fallthrough block, it can obviously
664 // reach, even though the branch should get folded to fall through implicitly.
665 if (MachineFunction::iterator(TBB) == Fallthrough ||
666 MachineFunction::iterator(FBB) == Fallthrough)
669 // If it's an unconditional branch to some block not the fall through, it
670 // doesn't fall through.
671 if (Cond.empty()) return false;
673 // Otherwise, if it is conditional and has no explicit false block, it falls
675 return FBB == nullptr;
679 MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
680 // Splitting the critical edge to a landing pad block is non-trivial. Don't do
681 // it in this generic function.
682 if (Succ->isLandingPad())
685 MachineFunction *MF = getParent();
686 DebugLoc dl; // FIXME: this is nowhere
688 // Performance might be harmed on HW that implements branching using exec mask
689 // where both sides of the branches are always executed.
690 if (MF->getTarget().requiresStructuredCFG())
693 // We may need to update this's terminator, but we can't do that if
694 // AnalyzeBranch fails. If this uses a jump table, we won't touch it.
695 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
696 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
697 SmallVector<MachineOperand, 4> Cond;
698 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
701 // Avoid bugpoint weirdness: A block may end with a conditional branch but
702 // jumps to the same MBB is either case. We have duplicate CFG edges in that
703 // case that we can't handle. Since this never happens in properly optimized
704 // code, just skip those edges.
705 if (TBB && TBB == FBB) {
706 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
707 << getNumber() << '\n');
711 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
712 MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
713 DEBUG(dbgs() << "Splitting critical edge:"
714 " BB#" << getNumber()
715 << " -- BB#" << NMBB->getNumber()
716 << " -- BB#" << Succ->getNumber() << '\n');
718 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>();
719 SlotIndexes *Indexes = P->getAnalysisIfAvailable<SlotIndexes>();
721 LIS->insertMBBInMaps(NMBB);
723 Indexes->insertMBBInMaps(NMBB);
725 // On some targets like Mips, branches may kill virtual registers. Make sure
726 // that LiveVariables is properly updated after updateTerminator replaces the
728 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>();
730 // Collect a list of virtual registers killed by the terminators.
731 SmallVector<unsigned, 4> KilledRegs;
733 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
735 MachineInstr *MI = I;
736 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
737 OE = MI->operands_end(); OI != OE; ++OI) {
738 if (!OI->isReg() || OI->getReg() == 0 ||
739 !OI->isUse() || !OI->isKill() || OI->isUndef())
741 unsigned Reg = OI->getReg();
742 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
743 LV->getVarInfo(Reg).removeKill(MI)) {
744 KilledRegs.push_back(Reg);
745 DEBUG(dbgs() << "Removing terminator kill: " << *MI);
746 OI->setIsKill(false);
751 SmallVector<unsigned, 4> UsedRegs;
753 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
755 MachineInstr *MI = I;
757 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
758 OE = MI->operands_end(); OI != OE; ++OI) {
759 if (!OI->isReg() || OI->getReg() == 0)
762 unsigned Reg = OI->getReg();
763 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end())
764 UsedRegs.push_back(Reg);
769 ReplaceUsesOfBlockWith(Succ, NMBB);
771 // If updateTerminator() removes instructions, we need to remove them from
773 SmallVector<MachineInstr*, 4> Terminators;
775 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
777 Terminators.push_back(I);
783 SmallVector<MachineInstr*, 4> NewTerminators;
784 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
786 NewTerminators.push_back(I);
788 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(),
789 E = Terminators.end(); I != E; ++I) {
790 if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) ==
791 NewTerminators.end())
792 Indexes->removeMachineInstrFromMaps(*I);
796 // Insert unconditional "jump Succ" instruction in NMBB if necessary.
797 NMBB->addSuccessor(Succ);
798 if (!NMBB->isLayoutSuccessor(Succ)) {
800 MF->getSubtarget().getInstrInfo()->InsertBranch(*NMBB, Succ, nullptr, Cond,
804 for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end();
806 // Some instructions may have been moved to NMBB by updateTerminator(),
807 // so we first remove any instruction that already has an index.
808 if (Indexes->hasIndex(I))
809 Indexes->removeMachineInstrFromMaps(I);
810 Indexes->insertMachineInstrInMaps(I);
815 // Fix PHI nodes in Succ so they refer to NMBB instead of this
816 for (MachineBasicBlock::instr_iterator
817 i = Succ->instr_begin(),e = Succ->instr_end();
818 i != e && i->isPHI(); ++i)
819 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
820 if (i->getOperand(ni+1).getMBB() == this)
821 i->getOperand(ni+1).setMBB(NMBB);
823 // Inherit live-ins from the successor
824 for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(),
825 E = Succ->livein_end(); I != E; ++I)
828 // Update LiveVariables.
829 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
831 // Restore kills of virtual registers that were killed by the terminators.
832 while (!KilledRegs.empty()) {
833 unsigned Reg = KilledRegs.pop_back_val();
834 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
835 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false))
837 if (TargetRegisterInfo::isVirtualRegister(Reg))
838 LV->getVarInfo(Reg).Kills.push_back(I);
839 DEBUG(dbgs() << "Restored terminator kill: " << *I);
843 // Update relevant live-through information.
844 LV->addNewBlock(NMBB, this, Succ);
848 // After splitting the edge and updating SlotIndexes, live intervals may be
849 // in one of two situations, depending on whether this block was the last in
850 // the function. If the original block was the last in the function, all live
851 // intervals will end prior to the beginning of the new split block. If the
852 // original block was not at the end of the function, all live intervals will
853 // extend to the end of the new split block.
856 std::next(MachineFunction::iterator(NMBB)) == getParent()->end();
858 SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
859 SlotIndex PrevIndex = StartIndex.getPrevSlot();
860 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
862 // Find the registers used from NMBB in PHIs in Succ.
863 SmallSet<unsigned, 8> PHISrcRegs;
864 for (MachineBasicBlock::instr_iterator
865 I = Succ->instr_begin(), E = Succ->instr_end();
866 I != E && I->isPHI(); ++I) {
867 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
868 if (I->getOperand(ni+1).getMBB() == NMBB) {
869 MachineOperand &MO = I->getOperand(ni);
870 unsigned Reg = MO.getReg();
871 PHISrcRegs.insert(Reg);
875 LiveInterval &LI = LIS->getInterval(Reg);
876 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
877 assert(VNI && "PHI sources should be live out of their predecessors.");
878 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
883 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
884 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
885 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
886 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
889 LiveInterval &LI = LIS->getInterval(Reg);
890 if (!LI.liveAt(PrevIndex))
893 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
894 if (isLiveOut && isLastMBB) {
895 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
896 assert(VNI && "LiveInterval should have VNInfo where it is live.");
897 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
898 } else if (!isLiveOut && !isLastMBB) {
899 LI.removeSegment(StartIndex, EndIndex);
903 // Update all intervals for registers whose uses may have been modified by
904 // updateTerminator().
905 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
908 if (MachineDominatorTree *MDT =
909 P->getAnalysisIfAvailable<MachineDominatorTree>())
910 MDT->recordSplitCriticalEdge(this, Succ, NMBB);
912 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
913 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
914 // If one or the other blocks were not in a loop, the new block is not
915 // either, and thus LI doesn't need to be updated.
916 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
917 if (TIL == DestLoop) {
918 // Both in the same loop, the NMBB joins loop.
919 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
920 } else if (TIL->contains(DestLoop)) {
921 // Edge from an outer loop to an inner loop. Add to the outer loop.
922 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
923 } else if (DestLoop->contains(TIL)) {
924 // Edge from an inner loop to an outer loop. Add to the outer loop.
925 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
927 // Edge from two loops with no containment relation. Because these
928 // are natural loops, we know that the destination block must be the
929 // header of its loop (adding a branch into a loop elsewhere would
930 // create an irreducible loop).
931 assert(DestLoop->getHeader() == Succ &&
932 "Should not create irreducible loops!");
933 if (MachineLoop *P = DestLoop->getParentLoop())
934 P->addBasicBlockToLoop(NMBB, MLI->getBase());
942 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
943 /// neighboring instructions so the bundle won't be broken by removing MI.
944 static void unbundleSingleMI(MachineInstr *MI) {
945 // Removing the first instruction in a bundle.
946 if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
947 MI->unbundleFromSucc();
948 // Removing the last instruction in a bundle.
949 if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
950 MI->unbundleFromPred();
951 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
955 MachineBasicBlock::instr_iterator
956 MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) {
958 return Insts.erase(I);
961 MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) {
962 unbundleSingleMI(MI);
963 MI->clearFlag(MachineInstr::BundledPred);
964 MI->clearFlag(MachineInstr::BundledSucc);
965 return Insts.remove(MI);
968 MachineBasicBlock::instr_iterator
969 MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) {
970 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
971 "Cannot insert instruction with bundle flags");
972 // Set the bundle flags when inserting inside a bundle.
973 if (I != instr_end() && I->isBundledWithPred()) {
974 MI->setFlag(MachineInstr::BundledPred);
975 MI->setFlag(MachineInstr::BundledSucc);
977 return Insts.insert(I, MI);
980 /// removeFromParent - This method unlinks 'this' from the containing function,
981 /// and returns it, but does not delete it.
982 MachineBasicBlock *MachineBasicBlock::removeFromParent() {
983 assert(getParent() && "Not embedded in a function!");
984 getParent()->remove(this);
989 /// eraseFromParent - This method unlinks 'this' from the containing function,
991 void MachineBasicBlock::eraseFromParent() {
992 assert(getParent() && "Not embedded in a function!");
993 getParent()->erase(this);
997 /// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
998 /// 'Old', change the code and CFG so that it branches to 'New' instead.
999 void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
1000 MachineBasicBlock *New) {
1001 assert(Old != New && "Cannot replace self with self!");
1003 MachineBasicBlock::instr_iterator I = instr_end();
1004 while (I != instr_begin()) {
1006 if (!I->isTerminator()) break;
1008 // Scan the operands of this machine instruction, replacing any uses of Old
1010 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1011 if (I->getOperand(i).isMBB() &&
1012 I->getOperand(i).getMBB() == Old)
1013 I->getOperand(i).setMBB(New);
1016 // Update the successor information.
1017 replaceSuccessor(Old, New);
1020 /// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the
1021 /// CFG to be inserted. If we have proven that MBB can only branch to DestA and
1022 /// DestB, remove any other MBB successors from the CFG. DestA and DestB can be
1025 /// Besides DestA and DestB, retain other edges leading to LandingPads
1026 /// (currently there can be only one; we don't check or require that here).
1027 /// Note it is possible that DestA and/or DestB are LandingPads.
1028 bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
1029 MachineBasicBlock *DestB,
1031 // The values of DestA and DestB frequently come from a call to the
1032 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
1033 // values from there.
1035 // 1. If both DestA and DestB are null, then the block ends with no branches
1036 // (it falls through to its successor).
1037 // 2. If DestA is set, DestB is null, and isCond is false, then the block ends
1038 // with only an unconditional branch.
1039 // 3. If DestA is set, DestB is null, and isCond is true, then the block ends
1040 // with a conditional branch that falls through to a successor (DestB).
1041 // 4. If DestA and DestB is set and isCond is true, then the block ends with a
1042 // conditional branch followed by an unconditional branch. DestA is the
1043 // 'true' destination and DestB is the 'false' destination.
1045 bool Changed = false;
1047 MachineFunction::iterator FallThru =
1048 std::next(MachineFunction::iterator(this));
1050 if (!DestA && !DestB) {
1051 // Block falls through to successor.
1054 } else if (DestA && !DestB) {
1056 // Block ends in conditional jump that falls through to successor.
1059 assert(DestA && DestB && isCond &&
1060 "CFG in a bad state. Cannot correct CFG edges");
1063 // Remove superfluous edges. I.e., those which aren't destinations of this
1064 // basic block, duplicate edges, or landing pads.
1065 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
1066 MachineBasicBlock::succ_iterator SI = succ_begin();
1067 while (SI != succ_end()) {
1068 const MachineBasicBlock *MBB = *SI;
1069 if (!SeenMBBs.insert(MBB) ||
1070 (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) {
1071 // This is a superfluous edge, remove it.
1072 SI = removeSuccessor(SI);
1082 /// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
1083 /// any DBG_VALUE instructions. Return UnknownLoc if there is none.
1085 MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
1087 instr_iterator E = instr_end();
1091 // Skip debug declarations, we don't want a DebugLoc from them.
1092 while (MBBI != E && MBBI->isDebugValue())
1095 DL = MBBI->getDebugLoc();
1099 /// getSuccWeight - Return weight of the edge from this block to MBB.
1101 uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ) const {
1102 if (Weights.empty())
1105 return *getWeightIterator(Succ);
1108 /// Set successor weight of a given iterator.
1109 void MachineBasicBlock::setSuccWeight(succ_iterator I, uint32_t weight) {
1110 if (Weights.empty())
1112 *getWeightIterator(I) = weight;
1115 /// getWeightIterator - Return wight iterator corresonding to the I successor
1117 MachineBasicBlock::weight_iterator MachineBasicBlock::
1118 getWeightIterator(MachineBasicBlock::succ_iterator I) {
1119 assert(Weights.size() == Successors.size() && "Async weight list!");
1120 size_t index = std::distance(Successors.begin(), I);
1121 assert(index < Weights.size() && "Not a current successor!");
1122 return Weights.begin() + index;
1125 /// getWeightIterator - Return wight iterator corresonding to the I successor
1127 MachineBasicBlock::const_weight_iterator MachineBasicBlock::
1128 getWeightIterator(MachineBasicBlock::const_succ_iterator I) const {
1129 assert(Weights.size() == Successors.size() && "Async weight list!");
1130 const size_t index = std::distance(Successors.begin(), I);
1131 assert(index < Weights.size() && "Not a current successor!");
1132 return Weights.begin() + index;
1135 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1136 /// as of just before "MI".
1138 /// Search is localised to a neighborhood of
1139 /// Neighborhood instructions before (searching for defs or kills) and N
1140 /// instructions after (searching just for defs) MI.
1141 MachineBasicBlock::LivenessQueryResult
1142 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
1143 unsigned Reg, MachineInstr *MI,
1144 unsigned Neighborhood) {
1145 unsigned N = Neighborhood;
1146 MachineBasicBlock *MBB = MI->getParent();
1148 // Start by searching backwards from MI, looking for kills, reads or defs.
1150 MachineBasicBlock::iterator I(MI);
1151 // If this is the first insn in the block, don't search backwards.
1152 if (I != MBB->begin()) {
1156 MachineOperandIteratorBase::PhysRegInfo Analysis =
1157 MIOperands(I).analyzePhysReg(Reg, TRI);
1159 if (Analysis.Defines)
1160 // Outputs happen after inputs so they take precedence if both are
1162 return Analysis.DefinesDead ? LQR_Dead : LQR_Live;
1164 if (Analysis.Kills || Analysis.Clobbers)
1165 // Register killed, so isn't live.
1168 else if (Analysis.ReadsOverlap)
1169 // Defined or read without a previous kill - live.
1170 return Analysis.Reads ? LQR_Live : LQR_OverlappingLive;
1172 } while (I != MBB->begin() && --N > 0);
1175 // Did we get to the start of the block?
1176 if (I == MBB->begin()) {
1177 // If so, the register's state is definitely defined by the live-in state.
1178 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true);
1179 RAI.isValid(); ++RAI) {
1180 if (MBB->isLiveIn(*RAI))
1181 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive;
1189 // Try searching forwards from MI, looking for reads or defs.
1190 I = MachineBasicBlock::iterator(MI);
1191 // If this is the last insn in the block, don't search forwards.
1192 if (I != MBB->end()) {
1193 for (++I; I != MBB->end() && N > 0; ++I, --N) {
1194 MachineOperandIteratorBase::PhysRegInfo Analysis =
1195 MIOperands(I).analyzePhysReg(Reg, TRI);
1197 if (Analysis.ReadsOverlap)
1198 // Used, therefore must have been live.
1199 return (Analysis.Reads) ?
1200 LQR_Live : LQR_OverlappingLive;
1202 else if (Analysis.Clobbers || Analysis.Defines)
1203 // Defined (but not read) therefore cannot have been live.
1208 // At this point we have no idea of the liveness of the register.