1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Methods common to all machine instructions.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "llvm/Support/LeakDetector.h"
20 #include "llvm/Support/Streams.h"
24 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25 /// TID NULL and no operands.
26 MachineInstr::MachineInstr()
27 : TID(0), NumImplicitOps(0), parent(0) {
28 // Make sure that we get added to a machine basicblock
29 LeakDetector::addGarbageObject(this);
32 void MachineInstr::addImplicitDefUseOperands() {
33 if (TID->ImplicitDefs)
34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) {
36 Op.opType = MachineOperand::MO_Register;
41 Op.contents.RegNo = *ImpDefs;
42 Operands.push_back(Op);
44 if (TID->ImplicitUses)
45 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) {
47 Op.opType = MachineOperand::MO_Register;
52 Op.contents.RegNo = *ImpUses;
53 Operands.push_back(Op);
57 /// MachineInstr ctor - This constructor create a MachineInstr and add the
58 /// implicit operands. It reserves space for number of operands specified by
59 /// TargetInstrDescriptor or the numOperands if it is not zero. (for
60 /// instructions with variable number of operands).
61 MachineInstr::MachineInstr(const TargetInstrDescriptor &tid)
62 : TID(&tid), NumImplicitOps(0), parent(0) {
63 if (TID->ImplicitDefs)
64 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
66 if (TID->ImplicitUses)
67 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
69 Operands.reserve(NumImplicitOps + TID->numOperands);
70 addImplicitDefUseOperands();
71 // Make sure that we get added to a machine basicblock
72 LeakDetector::addGarbageObject(this);
75 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
76 /// MachineInstr is created and added to the end of the specified basic block.
78 MachineInstr::MachineInstr(MachineBasicBlock *MBB,
79 const TargetInstrDescriptor &tid)
80 : TID(&tid), NumImplicitOps(0), parent(0) {
81 assert(MBB && "Cannot use inserting ctor with null basic block!");
82 if (TID->ImplicitDefs)
83 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
85 if (TID->ImplicitUses)
86 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
88 Operands.reserve(NumImplicitOps + TID->numOperands);
89 addImplicitDefUseOperands();
90 // Make sure that we get added to a machine basicblock
91 LeakDetector::addGarbageObject(this);
92 MBB->push_back(this); // Add instruction to end of basic block!
95 /// MachineInstr ctor - Copies MachineInstr arg exactly
97 MachineInstr::MachineInstr(const MachineInstr &MI) {
98 TID = MI.getInstrDescriptor();
99 NumImplicitOps = MI.NumImplicitOps;
100 Operands.reserve(MI.getNumOperands());
103 for (unsigned i = 0; i != MI.getNumOperands(); ++i)
104 Operands.push_back(MI.getOperand(i));
106 // Set parent, next, and prev to null
113 MachineInstr::~MachineInstr() {
114 LeakDetector::removeGarbageObject(this);
117 /// getOpcode - Returns the opcode of this MachineInstr.
119 int MachineInstr::getOpcode() const {
123 /// removeFromParent - This method unlinks 'this' from the containing basic
124 /// block, and returns it, but does not delete it.
125 MachineInstr *MachineInstr::removeFromParent() {
126 assert(getParent() && "Not embedded in a basic block!");
127 getParent()->remove(this);
132 /// OperandComplete - Return true if it's illegal to add a new operand
134 bool MachineInstr::OperandsComplete() const {
135 unsigned short NumOperands = TID->numOperands;
136 if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
137 getNumOperands()-NumImplicitOps >= NumOperands)
138 return true; // Broken: we have all the operands of this instruction!
142 /// getNumExplicitOperands - Returns the number of non-implicit operands.
144 unsigned MachineInstr::getNumExplicitOperands() const {
145 unsigned NumOperands = TID->numOperands;
146 if ((TID->Flags & M_VARIABLE_OPS) == 0)
149 for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
150 const MachineOperand &MO = getOperand(NumOperands);
151 if (!MO.isRegister() || !MO.isImplicit())
157 /// isIdenticalTo - Return true if this operand is identical to the specified
159 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
160 if (getType() != Other.getType()) return false;
163 default: assert(0 && "Unrecognized operand type");
164 case MachineOperand::MO_Register:
165 return getReg() == Other.getReg() && isDef() == Other.isDef();
166 case MachineOperand::MO_Immediate:
167 return getImm() == Other.getImm();
168 case MachineOperand::MO_MachineBasicBlock:
169 return getMBB() == Other.getMBB();
170 case MachineOperand::MO_FrameIndex:
171 return getFrameIndex() == Other.getFrameIndex();
172 case MachineOperand::MO_ConstantPoolIndex:
173 return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
174 getOffset() == Other.getOffset();
175 case MachineOperand::MO_JumpTableIndex:
176 return getJumpTableIndex() == Other.getJumpTableIndex();
177 case MachineOperand::MO_GlobalAddress:
178 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
179 case MachineOperand::MO_ExternalSymbol:
180 return !strcmp(getSymbolName(), Other.getSymbolName()) &&
181 getOffset() == Other.getOffset();
185 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
186 /// the specific register or -1 if it is not found. It further tightening
187 /// the search criteria to a use that kills the register if isKill is true.
188 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
189 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
190 const MachineOperand &MO = getOperand(i);
191 if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg)
192 if (!isKill || MO.isKill())
198 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
199 /// the specific register or NULL if it is not found.
200 MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
201 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
202 MachineOperand &MO = getOperand(i);
203 if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
209 /// findFirstPredOperandIdx() - Find the index of the first operand in the
210 /// operand list that is used to represent the predicate. It returns -1 if
212 int MachineInstr::findFirstPredOperandIdx() const {
213 const TargetInstrDescriptor *TID = getInstrDescriptor();
214 if (TID->Flags & M_PREDICABLE) {
215 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
216 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
223 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
225 void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
226 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
227 const MachineOperand &MO = MI->getOperand(i);
228 if (!MO.isRegister() || (!MO.isKill() && !MO.isDead()))
230 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
231 MachineOperand &MOp = getOperand(j);
232 if (!MOp.isIdenticalTo(MO))
243 /// copyPredicates - Copies predicate operand(s) from MI.
244 void MachineInstr::copyPredicates(const MachineInstr *MI) {
245 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
246 if (TID->Flags & M_PREDICABLE) {
247 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
248 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
249 const MachineOperand &MO = MI->getOperand(i);
250 // Predicated operands must be last operands.
252 addRegOperand(MO.getReg(), false);
254 addImmOperand(MO.getImm());
261 void MachineInstr::dump() const {
262 cerr << " " << *this;
265 static inline void OutputReg(std::ostream &os, unsigned RegNo,
266 const MRegisterInfo *MRI = 0) {
267 if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
269 os << "%" << MRI->get(RegNo).Name;
271 os << "%mreg(" << RegNo << ")";
273 os << "%reg" << RegNo;
276 static void print(const MachineOperand &MO, std::ostream &OS,
277 const TargetMachine *TM) {
278 const MRegisterInfo *MRI = 0;
280 if (TM) MRI = TM->getRegisterInfo();
282 switch (MO.getType()) {
283 case MachineOperand::MO_Register:
284 OutputReg(OS, MO.getReg(), MRI);
286 case MachineOperand::MO_Immediate:
287 OS << MO.getImmedValue();
289 case MachineOperand::MO_MachineBasicBlock:
291 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
292 << "," << (void*)MO.getMachineBasicBlock() << ">";
294 case MachineOperand::MO_FrameIndex:
295 OS << "<fi#" << MO.getFrameIndex() << ">";
297 case MachineOperand::MO_ConstantPoolIndex:
298 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
300 case MachineOperand::MO_JumpTableIndex:
301 OS << "<jt#" << MO.getJumpTableIndex() << ">";
303 case MachineOperand::MO_GlobalAddress:
304 OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
305 if (MO.getOffset()) OS << "+" << MO.getOffset();
308 case MachineOperand::MO_ExternalSymbol:
309 OS << "<es:" << MO.getSymbolName();
310 if (MO.getOffset()) OS << "+" << MO.getOffset();
314 assert(0 && "Unrecognized operand type");
318 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
319 unsigned StartOp = 0;
321 // Specialize printing if op#0 is definition
322 if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
323 ::print(getOperand(0), OS, TM);
324 if (getOperand(0).isDead())
327 ++StartOp; // Don't print this operand again!
333 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
334 const MachineOperand& mop = getOperand(i);
338 ::print(mop, OS, TM);
340 if (mop.isRegister()) {
341 if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
343 bool NeedComma = false;
344 if (mop.isImplicit()) {
345 OS << (mop.isDef() ? "imp-def" : "imp-use");
347 } else if (mop.isDef()) {
351 if (mop.isKill() || mop.isDead()) {
367 void MachineInstr::print(std::ostream &os) const {
368 // If the instruction is embedded into a basic block, we can find the target
369 // info for the instruction.
370 if (const MachineBasicBlock *MBB = getParent()) {
371 const MachineFunction *MF = MBB->getParent();
373 print(os, &MF->getTarget());
378 // Otherwise, print it out in the "raw" format without symbolic register names
380 os << getInstrDescriptor()->Name;
382 for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
383 os << "\t" << getOperand(i);
384 if (getOperand(i).isRegister() && getOperand(i).isDef())
391 void MachineOperand::print(std::ostream &OS) const {
394 OutputReg(OS, getReg());
397 OS << (long)getImmedValue();
399 case MO_MachineBasicBlock:
401 << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
402 << "@" << (void*)getMachineBasicBlock() << ">";
405 OS << "<fi#" << getFrameIndex() << ">";
407 case MO_ConstantPoolIndex:
408 OS << "<cp#" << getConstantPoolIndex() << ">";
410 case MO_JumpTableIndex:
411 OS << "<jt#" << getJumpTableIndex() << ">";
413 case MO_GlobalAddress:
414 OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
416 case MO_ExternalSymbol:
417 OS << "<es:" << getSymbolName() << ">";
420 assert(0 && "Unrecognized operand type");