1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 //===----------------------------------------------------------------------===//
5 #include "llvm/CodeGen/MachineInstr.h"
6 #include "llvm/Value.h"
7 #include "llvm/Target/MachineInstrInfo.h" // FIXME: shouldn't need this!
11 // Constructor for instructions with fixed #operands (nearly all)
12 MachineInstr::MachineInstr(MachineOpCode _opCode,
13 OpCodeMask _opCodeMask)
15 opCodeMask(_opCodeMask),
16 operands(TargetInstrDescriptors[_opCode].numOperands)
18 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
21 // Constructor for instructions with variable #operands
22 MachineInstr::MachineInstr(MachineOpCode _opCode,
24 OpCodeMask _opCodeMask)
26 opCodeMask(_opCodeMask),
32 // Support for replacing opcode and operands of a MachineInstr in place.
33 // This only resets the size of the operand vector and initializes it.
34 // The new operands must be set explicitly later.
37 MachineInstr::replace(MachineOpCode _opCode,
39 OpCodeMask _opCodeMask)
42 opCodeMask = _opCodeMask;
44 operands.resize(numOperands);
48 MachineInstr::SetMachineOperandVal(unsigned int i,
49 MachineOperand::MachineOperandType opType,
54 assert(i < operands.size());
55 operands[i].opType = opType;
56 operands[i].value = V;
57 operands[i].regNum = -1;
58 operands[i].flags = 0;
60 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
61 operands[i].markDef();
63 operands[i].markDefAndUse();
67 MachineInstr::SetMachineOperandConst(unsigned i,
68 MachineOperand::MachineOperandType operandType,
71 assert(i < operands.size());
72 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
73 "immed. constant cannot be defined");
75 operands[i].opType = operandType;
76 operands[i].value = NULL;
77 operands[i].immedVal = intValue;
78 operands[i].regNum = -1;
79 operands[i].flags = 0;
83 MachineInstr::SetMachineOperandReg(unsigned i,
89 assert(i < operands.size());
92 isCCReg? MachineOperand::MO_CCRegister : MachineOperand::MO_MachineRegister;
93 operands[i].value = NULL;
94 operands[i].regNum = regNum;
95 operands[i].flags = 0;
97 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
98 operands[i].markDef();
100 operands[i].markDefAndUse();
101 insertUsedReg(regNum);
105 MachineInstr::SetRegForOperand(unsigned i, int regNum)
107 operands[i].setRegForValue(regNum);
108 insertUsedReg(regNum);
112 // Subsitute all occurrences of Value* oldVal with newVal in all operands
113 // and all implicit refs. If defsOnly == true, substitute defs only.
115 MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
117 unsigned numSubst = 0;
119 // Subsitute operands
120 for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
122 if (!defsOnly || O.isDef())
124 O.getMachineOperand().value = newVal;
128 // Subsitute implicit refs
129 for (unsigned i=0, N=implicitRefs.size(); i < N; ++i)
130 if (getImplicitRef(i) == oldVal)
131 if (!defsOnly || implicitRefIsDefined(i))
133 implicitRefs[i].Val = newVal;
142 MachineInstr::dump() const
144 cerr << " " << *this;
147 static inline std::ostream&
148 OutputValue(std::ostream &os, const Value* val)
151 if (val && val->hasName())
152 return os << val->getName() << ")";
154 return os << (void*) val << ")"; // print address only
157 static inline std::ostream&
158 OutputReg(std::ostream &os, unsigned int regNum)
160 return os << "%mreg(" << regNum << ")";
163 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
165 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
167 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
168 os << "\t" << minstr.getOperand(i);
169 if( minstr.operandIsDefined(i) )
171 if( minstr.operandIsDefinedAndUsed(i) )
175 // code for printing implict references
176 unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
177 if( NumOfImpRefs > 0 ) {
178 os << "\tImplicit: ";
179 for(unsigned z=0; z < NumOfImpRefs; z++) {
180 OutputValue(os, minstr.getImplicitRef(z));
181 if( minstr.implicitRefIsDefined(z)) os << "*";
182 if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
190 std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
192 if (mop.opHiBits32())
194 else if (mop.opLoBits32())
196 else if (mop.opHiBits64())
198 else if (mop.opLoBits64())
203 case MachineOperand::MO_VirtualRegister:
205 OutputValue(os, mop.getVRegValue());
206 if (mop.hasAllocatedReg())
207 os << "==" << OutputReg(os, mop.getAllocatedRegNum());
209 case MachineOperand::MO_CCRegister:
211 OutputValue(os, mop.getVRegValue());
212 if (mop.hasAllocatedReg())
213 os << "==" << OutputReg(os, mop.getAllocatedRegNum());
215 case MachineOperand::MO_MachineRegister:
216 OutputReg(os, mop.getMachineRegNum());
218 case MachineOperand::MO_SignExtendedImmed:
219 os << (long)mop.immedVal;
221 case MachineOperand::MO_UnextendedImmed:
222 os << (long)mop.immedVal;
224 case MachineOperand::MO_PCRelativeDisp:
226 const Value* opVal = mop.getVRegValue();
227 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
228 os << "%disp(" << (isLabel? "label " : "addr-of-val ");
229 if (opVal->hasName())
230 os << opVal->getName();
232 os << (const void*) opVal;
237 assert(0 && "Unrecognized operand type");
242 (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
243 MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))