1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Methods common to all machine instructions.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "llvm/Support/LeakDetector.h"
20 #include "llvm/Support/Streams.h"
24 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25 /// TID NULL and no operands.
26 MachineInstr::MachineInstr()
27 : TID(0), NumImplicitOps(0), parent(0) {
28 // Make sure that we get added to a machine basicblock
29 LeakDetector::addGarbageObject(this);
32 void MachineInstr::addImplicitDefUseOperands() {
33 if (TID->ImplicitDefs)
34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) {
36 Op.opType = MachineOperand::MO_Register;
41 Op.contents.RegNo = *ImpDefs;
42 Op.auxInfo.subReg = 0;
43 Operands.push_back(Op);
45 if (TID->ImplicitUses)
46 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) {
48 Op.opType = MachineOperand::MO_Register;
53 Op.contents.RegNo = *ImpUses;
54 Op.auxInfo.subReg = 0;
55 Operands.push_back(Op);
59 /// MachineInstr ctor - This constructor create a MachineInstr and add the
60 /// implicit operands. It reserves space for number of operands specified by
61 /// TargetInstrDescriptor or the numOperands if it is not zero. (for
62 /// instructions with variable number of operands).
63 MachineInstr::MachineInstr(const TargetInstrDescriptor &tid)
64 : TID(&tid), NumImplicitOps(0), parent(0) {
65 if (TID->ImplicitDefs)
66 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
68 if (TID->ImplicitUses)
69 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
71 Operands.reserve(NumImplicitOps + TID->numOperands);
72 addImplicitDefUseOperands();
73 // Make sure that we get added to a machine basicblock
74 LeakDetector::addGarbageObject(this);
77 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
78 /// MachineInstr is created and added to the end of the specified basic block.
80 MachineInstr::MachineInstr(MachineBasicBlock *MBB,
81 const TargetInstrDescriptor &tid)
82 : TID(&tid), NumImplicitOps(0), parent(0) {
83 assert(MBB && "Cannot use inserting ctor with null basic block!");
84 if (TID->ImplicitDefs)
85 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
87 if (TID->ImplicitUses)
88 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
90 Operands.reserve(NumImplicitOps + TID->numOperands);
91 addImplicitDefUseOperands();
92 // Make sure that we get added to a machine basicblock
93 LeakDetector::addGarbageObject(this);
94 MBB->push_back(this); // Add instruction to end of basic block!
97 /// MachineInstr ctor - Copies MachineInstr arg exactly
99 MachineInstr::MachineInstr(const MachineInstr &MI) {
100 TID = MI.getInstrDescriptor();
101 NumImplicitOps = MI.NumImplicitOps;
102 Operands.reserve(MI.getNumOperands());
105 for (unsigned i = 0; i != MI.getNumOperands(); ++i)
106 Operands.push_back(MI.getOperand(i));
108 // Set parent, next, and prev to null
115 MachineInstr::~MachineInstr() {
116 LeakDetector::removeGarbageObject(this);
119 /// getOpcode - Returns the opcode of this MachineInstr.
121 const int MachineInstr::getOpcode() const {
125 /// removeFromParent - This method unlinks 'this' from the containing basic
126 /// block, and returns it, but does not delete it.
127 MachineInstr *MachineInstr::removeFromParent() {
128 assert(getParent() && "Not embedded in a basic block!");
129 getParent()->remove(this);
134 /// OperandComplete - Return true if it's illegal to add a new operand
136 bool MachineInstr::OperandsComplete() const {
137 unsigned short NumOperands = TID->numOperands;
138 if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
139 getNumOperands()-NumImplicitOps >= NumOperands)
140 return true; // Broken: we have all the operands of this instruction!
144 /// getNumExplicitOperands - Returns the number of non-implicit operands.
146 unsigned MachineInstr::getNumExplicitOperands() const {
147 unsigned NumOperands = TID->numOperands;
148 if ((TID->Flags & M_VARIABLE_OPS) == 0)
151 for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
152 const MachineOperand &MO = getOperand(NumOperands);
153 if (!MO.isRegister() || !MO.isImplicit())
159 /// isIdenticalTo - Return true if this operand is identical to the specified
161 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
162 if (getType() != Other.getType()) return false;
165 default: assert(0 && "Unrecognized operand type");
166 case MachineOperand::MO_Register:
167 return getReg() == Other.getReg() && isDef() == Other.isDef();
168 case MachineOperand::MO_Immediate:
169 return getImm() == Other.getImm();
170 case MachineOperand::MO_MachineBasicBlock:
171 return getMBB() == Other.getMBB();
172 case MachineOperand::MO_FrameIndex:
173 return getFrameIndex() == Other.getFrameIndex();
174 case MachineOperand::MO_ConstantPoolIndex:
175 return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
176 getOffset() == Other.getOffset();
177 case MachineOperand::MO_JumpTableIndex:
178 return getJumpTableIndex() == Other.getJumpTableIndex();
179 case MachineOperand::MO_GlobalAddress:
180 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
181 case MachineOperand::MO_ExternalSymbol:
182 return !strcmp(getSymbolName(), Other.getSymbolName()) &&
183 getOffset() == Other.getOffset();
187 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
188 /// the specific register or -1 if it is not found. It further tightening
189 /// the search criteria to a use that kills the register if isKill is true.
190 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) {
191 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
192 MachineOperand &MO = getOperand(i);
193 if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
194 if (!isKill || MO.isKill())
200 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
201 /// the specific register or NULL if it is not found.
202 MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
203 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
204 MachineOperand &MO = getOperand(i);
205 if (MO.isReg() && MO.isDef() && MO.getReg() == Reg)
211 /// findFirstPredOperand() - Find the first operand in the operand list that
212 // is used to represent the predicate.
213 MachineOperand *MachineInstr::findFirstPredOperand() {
214 const TargetInstrDescriptor *TID = getInstrDescriptor();
215 if (TID->Flags & M_PREDICATED) {
216 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
217 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
218 return &getOperand(i);
224 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
226 void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
227 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
228 const MachineOperand &MO = MI->getOperand(i);
229 if (!MO.isReg() || (!MO.isKill() && !MO.isDead()))
231 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
232 MachineOperand &MOp = getOperand(j);
233 if (!MOp.isIdenticalTo(MO))
244 /// copyPredicates - Copies predicate operand(s) from MI.
245 void MachineInstr::copyPredicates(const MachineInstr *MI) {
246 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
247 if (TID->Flags & M_PREDICATED) {
248 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
249 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
250 const MachineOperand &MO = MI->getOperand(i);
251 // Predicated operands must be last operands.
253 addRegOperand(MO.getReg(), false);
255 addImmOperand(MO.getImm());
262 void MachineInstr::dump() const {
263 cerr << " " << *this;
266 static inline void OutputReg(std::ostream &os, unsigned RegNo,
267 const MRegisterInfo *MRI = 0) {
268 if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
270 os << "%" << MRI->get(RegNo).Name;
272 os << "%mreg(" << RegNo << ")";
274 os << "%reg" << RegNo;
277 static void print(const MachineOperand &MO, std::ostream &OS,
278 const TargetMachine *TM) {
279 const MRegisterInfo *MRI = 0;
281 if (TM) MRI = TM->getRegisterInfo();
283 switch (MO.getType()) {
284 case MachineOperand::MO_Register:
285 OutputReg(OS, MO.getReg(), MRI);
287 case MachineOperand::MO_Immediate:
288 OS << MO.getImmedValue();
290 case MachineOperand::MO_MachineBasicBlock:
292 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
293 << "," << (void*)MO.getMachineBasicBlock() << ">";
295 case MachineOperand::MO_FrameIndex:
296 OS << "<fi#" << MO.getFrameIndex() << ">";
298 case MachineOperand::MO_ConstantPoolIndex:
299 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
301 case MachineOperand::MO_JumpTableIndex:
302 OS << "<jt#" << MO.getJumpTableIndex() << ">";
304 case MachineOperand::MO_GlobalAddress:
305 OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
306 if (MO.getOffset()) OS << "+" << MO.getOffset();
309 case MachineOperand::MO_ExternalSymbol:
310 OS << "<es:" << MO.getSymbolName();
311 if (MO.getOffset()) OS << "+" << MO.getOffset();
315 assert(0 && "Unrecognized operand type");
319 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
320 unsigned StartOp = 0;
322 // Specialize printing if op#0 is definition
323 if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
324 ::print(getOperand(0), OS, TM);
325 if (getOperand(0).isDead())
328 ++StartOp; // Don't print this operand again!
334 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
335 const MachineOperand& mop = getOperand(i);
339 ::print(mop, OS, TM);
342 if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
344 bool NeedComma = false;
345 if (mop.isImplicit()) {
346 OS << (mop.isDef() ? "imp-def" : "imp-use");
348 } else if (mop.isDef()) {
352 if (mop.isKill() || mop.isDead()) {
368 void MachineInstr::print(std::ostream &os) const {
369 // If the instruction is embedded into a basic block, we can find the target
370 // info for the instruction.
371 if (const MachineBasicBlock *MBB = getParent()) {
372 const MachineFunction *MF = MBB->getParent();
374 print(os, &MF->getTarget());
379 // Otherwise, print it out in the "raw" format without symbolic register names
381 os << getInstrDescriptor()->Name;
383 for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
384 os << "\t" << getOperand(i);
385 if (getOperand(i).isReg() && getOperand(i).isDef())
392 void MachineOperand::print(std::ostream &OS) const {
395 OutputReg(OS, getReg());
398 OS << (long)getImmedValue();
400 case MO_MachineBasicBlock:
402 << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
403 << "@" << (void*)getMachineBasicBlock() << ">";
406 OS << "<fi#" << getFrameIndex() << ">";
408 case MO_ConstantPoolIndex:
409 OS << "<cp#" << getConstantPoolIndex() << ">";
411 case MO_JumpTableIndex:
412 OS << "<jt#" << getJumpTableIndex() << ">";
414 case MO_GlobalAddress:
415 OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
417 case MO_ExternalSymbol:
418 OS << "<es:" << getSymbolName() << ">";
421 assert(0 && "Unrecognized operand type");