2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/Value.h"
21 //************************ Class Implementations **************************/
23 // Constructor for instructions with fixed #operands (nearly all)
24 MachineInstr::MachineInstr(MachineOpCode _opCode,
25 OpCodeMask _opCodeMask)
27 opCodeMask(_opCodeMask),
28 operands(TargetInstrDescriptors[_opCode].numOperands)
30 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
33 // Constructor for instructions with variable #operands
34 MachineInstr::MachineInstr(MachineOpCode _opCode,
36 OpCodeMask _opCodeMask)
38 opCodeMask(_opCodeMask),
44 MachineInstr::SetMachineOperandVal(unsigned int i,
45 MachineOperand::MachineOperandType operandType,
46 Value* _val, bool isdef=false)
48 assert(i < operands.size());
49 operands[i].Initialize(operandType, _val);
50 operands[i].isDef = isdef ||
51 TargetInstrDescriptors[opCode].resultPos == (int) i;
55 MachineInstr::SetMachineOperandConst(unsigned int i,
56 MachineOperand::MachineOperandType operandType,
59 assert(i < operands.size());
60 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
61 "immed. constant cannot be defined");
62 operands[i].InitializeConst(operandType, intValue);
63 operands[i].isDef = false;
67 MachineInstr::SetMachineOperandReg(unsigned int i,
72 assert(i < operands.size());
73 operands[i].InitializeReg(regNum, isCCReg);
74 operands[i].isDef = isdef ||
75 TargetInstrDescriptors[opCode].resultPos == (int) i;
79 MachineInstr::dump(unsigned int indent) const
81 for (unsigned i=0; i < indent; i++)
87 static inline std::ostream &OutputValue(std::ostream &os,
91 if (val && val->hasName())
92 return os << val->getName();
94 return os << (void*) val; // print address only
98 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
100 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
102 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
103 os << "\t" << minstr.getOperand(i);
104 if( minstr.getOperand(i).opIsDef() )
108 // code for printing implict references
109 unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
110 if( NumOfImpRefs > 0 ) {
111 os << "\tImplicit: ";
112 for(unsigned z=0; z < NumOfImpRefs; z++) {
113 OutputValue(os, minstr.getImplicitRef(z));
114 if( minstr.implicitRefIsDefined(z)) os << "*";
122 static inline std::ostream &OutputOperand(std::ostream &os,
123 const MachineOperand &mop)
126 switch (mop.getOperandType())
128 case MachineOperand::MO_CCRegister:
129 case MachineOperand::MO_VirtualRegister:
130 return OutputValue(os, mop.getVRegValue());
131 case MachineOperand::MO_MachineRegister:
132 return os << "(" << mop.getMachineRegNum() << ")";
134 assert(0 && "Unknown operand type");
140 std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
144 case MachineOperand::MO_VirtualRegister:
145 case MachineOperand::MO_MachineRegister:
147 return OutputOperand(os, mop);
148 case MachineOperand::MO_CCRegister:
150 return OutputOperand(os, mop);
151 case MachineOperand::MO_SignExtendedImmed:
152 return os << (long)mop.immedVal;
153 case MachineOperand::MO_UnextendedImmed:
154 return os << (long)mop.immedVal;
155 case MachineOperand::MO_PCRelativeDisp:
157 const Value* opVal = mop.getVRegValue();
158 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
159 os << "%disp(" << (isLabel? "label " : "addr-of-val ");
160 if (opVal->hasName())
161 os << opVal->getName();
167 assert(0 && "Unrecognized operand type");