2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/Value.h"
21 //************************ Class Implementations **************************/
23 // Constructor for instructions with fixed #operands (nearly all)
24 MachineInstr::MachineInstr(MachineOpCode _opCode,
25 OpCodeMask _opCodeMask)
27 opCodeMask(_opCodeMask),
28 operands(TargetInstrDescriptors[_opCode].numOperands)
30 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
33 // Constructor for instructions with variable #operands
34 MachineInstr::MachineInstr(MachineOpCode _opCode,
36 OpCodeMask _opCodeMask)
38 opCodeMask(_opCodeMask),
44 MachineInstr::SetMachineOperandVal(unsigned int i,
45 MachineOperand::MachineOperandType opType,
50 assert(i < operands.size());
51 operands[i].Initialize(opType, _val);
52 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
53 operands[i].markDef();
55 operands[i].markDefAndUse();
59 MachineInstr::SetMachineOperandConst(unsigned int i,
60 MachineOperand::MachineOperandType operandType,
63 assert(i < operands.size());
64 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
65 "immed. constant cannot be defined");
66 operands[i].InitializeConst(operandType, intValue);
70 MachineInstr::SetMachineOperandReg(unsigned int i,
76 assert(i < operands.size());
77 operands[i].InitializeReg(regNum, isCCReg);
78 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
79 operands[i].markDef();
81 operands[i].markDefAndUse();
82 regsUsed.insert(regNum);
86 MachineInstr::SetRegForOperand(unsigned i, int regNum)
88 operands[i].setRegForValue(regNum);
89 regsUsed.insert(regNum);
94 MachineInstr::dump() const
99 static inline std::ostream &OutputValue(std::ostream &os,
103 if (val && val->hasName())
104 return os << val->getName() << ")";
106 return os << (void*) val << ")"; // print address only
109 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
111 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
113 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
114 os << "\t" << minstr.getOperand(i);
115 if( minstr.operandIsDefined(i) )
117 if( minstr.operandIsDefinedAndUsed(i) )
121 // code for printing implict references
122 unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
123 if( NumOfImpRefs > 0 ) {
124 os << "\tImplicit: ";
125 for(unsigned z=0; z < NumOfImpRefs; z++) {
126 OutputValue(os, minstr.getImplicitRef(z));
127 if( minstr.implicitRefIsDefined(z)) os << "*";
128 if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
136 std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
138 if (mop.opHiBits32())
140 else if (mop.opLoBits32())
142 else if (mop.opHiBits64())
144 else if (mop.opLoBits64())
149 case MachineOperand::MO_VirtualRegister:
151 OutputValue(os, mop.getVRegValue());
153 case MachineOperand::MO_CCRegister:
155 OutputValue(os, mop.getVRegValue());
157 case MachineOperand::MO_MachineRegister:
159 os << "(" << mop.getMachineRegNum() << ")";
161 case MachineOperand::MO_SignExtendedImmed:
162 os << (long)mop.immedVal;
164 case MachineOperand::MO_UnextendedImmed:
165 os << (long)mop.immedVal;
167 case MachineOperand::MO_PCRelativeDisp:
169 const Value* opVal = mop.getVRegValue();
170 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
171 os << "%disp(" << (isLabel? "label " : "addr-of-val ");
172 if (opVal->hasName())
173 os << opVal->getName();
175 os << (const void*) opVal;
180 assert(0 && "Unrecognized operand type");
185 (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
186 MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))