2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/Method.h"
18 #include "llvm/ConstPoolVals.h"
19 #include "llvm/Instruction.h"
23 //************************ Class Implementations **************************/
25 // Constructor for instructions with fixed #operands (nearly all)
26 MachineInstr::MachineInstr(MachineOpCode _opCode,
27 OpCodeMask _opCodeMask)
29 opCodeMask(_opCodeMask),
30 operands(TargetInstrDescriptors[_opCode].numOperands)
32 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
35 // Constructor for instructions with variable #operands
36 MachineInstr::MachineInstr(MachineOpCode _opCode,
38 OpCodeMask _opCodeMask)
40 opCodeMask(_opCodeMask),
46 MachineInstr::SetMachineOperand(unsigned int i,
47 MachineOperand::MachineOperandType operandType,
48 Value* _val, bool isdef=false)
50 assert(i < operands.size());
51 operands[i].Initialize(operandType, _val);
52 operands[i].isDef = isdef ||
53 TargetInstrDescriptors[opCode].resultPos == (int) i;
57 MachineInstr::SetMachineOperand(unsigned int i,
58 MachineOperand::MachineOperandType operandType,
59 int64_t intValue, bool isdef=false)
61 assert(i < operands.size());
62 operands[i].InitializeConst(operandType, intValue);
63 operands[i].isDef = isdef ||
64 TargetInstrDescriptors[opCode].resultPos == (int) i;
68 MachineInstr::SetMachineOperand(unsigned int i,
69 unsigned int regNum, bool isdef=false)
71 assert(i < operands.size());
72 operands[i].InitializeReg(regNum);
73 operands[i].isDef = isdef ||
74 TargetInstrDescriptors[opCode].resultPos == (int) i;
78 MachineInstr::dump(unsigned int indent) const
80 for (unsigned i=0; i < indent; i++)
87 operator<< (ostream& os, const MachineInstr& minstr)
89 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
91 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++)
92 os << "\t" << minstr.getOperand(i);
94 #undef DEBUG_VAL_OP_ITERATOR
95 #ifdef DEBUG_VAL_OP_ITERATOR
96 os << endl << "\tValue operands are: ";
97 for (MachineInstr::val_op_const_iterator vo(&minstr); ! vo.done(); ++vo)
99 const Value* val = *vo;
100 os << val << (vo.isDef()? "(def), " : ", ");
109 operator<< (ostream& os, const MachineOperand& mop)
112 if (mop.opType == MachineOperand::MO_VirtualRegister)
113 regInfo << "(val " << mop.value << ")" << ends;
114 else if (mop.opType == MachineOperand::MO_MachineRegister)
115 regInfo << "(" << mop.regNum << ")" << ends;
116 else if (mop.opType == MachineOperand::MO_CCRegister)
117 regInfo << "(val " << mop.value << ")" << ends;
121 case MachineOperand::MO_VirtualRegister:
122 case MachineOperand::MO_MachineRegister:
123 os << "%reg" << regInfo.str();
127 case MachineOperand::MO_CCRegister:
128 os << "%ccreg" << regInfo.str();
132 case MachineOperand::MO_SignExtendedImmed:
136 case MachineOperand::MO_UnextendedImmed:
140 case MachineOperand::MO_PCRelativeDisp:
141 os << "%disp(label " << mop.value << ")";
145 assert(0 && "Unrecognized operand type");
153 //---------------------------------------------------------------------------
154 // Target-independent utility routines for creating machine instructions
155 //---------------------------------------------------------------------------
158 //------------------------------------------------------------------------
159 // Function Set2OperandsFromInstr
160 // Function Set3OperandsFromInstr
162 // For the common case of 2- and 3-operand arithmetic/logical instructions,
163 // set the m/c instr. operands directly from the VM instruction's operands.
164 // Check whether the first or second operand is 0 and can use a dedicated "0" register.
165 // Check whether the second operand should use an immediate field or register.
166 // (First and third operands are never immediates for such instructions.)
169 // canDiscardResult: Specifies that the result operand can be discarded
170 // by using the dedicated "0"
172 // op1position, op2position and resultPosition: Specify in which position
173 // in the machine instruction the 3 operands (arg1, arg2
174 // and result) should go.
176 // RETURN VALUE: unsigned int flags, where
177 // flags & 0x01 => operand 1 is constant and needs a register
178 // flags & 0x02 => operand 2 is constant and needs a register
179 //------------------------------------------------------------------------
182 Set2OperandsFromInstr(MachineInstr* minstr,
183 InstructionNode* vmInstrNode,
184 const TargetMachine& target,
185 bool canDiscardResult,
189 Set3OperandsFromInstr(minstr, vmInstrNode, target,
190 canDiscardResult, op1Position,
191 /*op2Position*/ -1, resultPosition);
194 #undef REVERT_TO_EXPLICIT_CONSTANT_CHECKS
195 #ifdef REVERT_TO_EXPLICIT_CONSTANT_CHECKS
197 Set3OperandsFromInstrJUNK(MachineInstr* minstr,
198 InstructionNode* vmInstrNode,
199 const TargetMachine& target,
200 bool canDiscardResult,
205 assert(op1Position >= 0);
206 assert(resultPosition >= 0);
208 unsigned returnFlags = 0x0;
210 // Check if operand 1 is 0. If so, try to use a hardwired 0 register.
211 Value* op1Value = vmInstrNode->leftChild()->getValue();
212 bool isValidConstant;
213 int64_t intValue = GetConstantValueAsSignedInt(op1Value, isValidConstant);
214 if (isValidConstant && intValue == 0 && target.zeroRegNum >= 0)
215 minstr->SetMachineOperand(op1Position, /*regNum*/ target.zeroRegNum);
218 if (op1Value->getValueType() == Value::ConstantVal)
219 {// value is constant and must be loaded from constant pool
220 returnFlags = returnFlags | (1 << op1Position);
222 minstr->SetMachineOperand(op1Position,MachineOperand::MO_VirtualRegister,
226 // Check if operand 2 (if any) fits in the immed. field of the instruction,
227 // or if it is 0 and can use a dedicated machine register
228 if (op2Position >= 0)
230 Value* op2Value = vmInstrNode->rightChild()->getValue();
232 unsigned int machineRegNum;
234 MachineOperand::MachineOperandType
235 op2type = ChooseRegOrImmed(op2Value, minstr->getOpCode(), target,
236 /*canUseImmed*/ true,
237 machineRegNum, immedValue);
239 if (op2type == MachineOperand::MO_MachineRegister)
240 minstr->SetMachineOperand(op2Position, machineRegNum);
241 else if (op2type == MachineOperand::MO_VirtualRegister)
243 if (op2Value->getValueType() == Value::ConstantVal)
244 {// value is constant and must be loaded from constant pool
245 returnFlags = returnFlags | (1 << op2Position);
247 minstr->SetMachineOperand(op2Position, op2type, op2Value);
251 assert(op2type != MO_CCRegister);
252 minstr->SetMachineOperand(op2Position, op2type, immedValue);
256 // If operand 3 (result) can be discarded, use a dead register if one exists
257 if (canDiscardResult && target.zeroRegNum >= 0)
258 minstr->SetMachineOperand(resultPosition, target.zeroRegNum);
260 minstr->SetMachineOperand(resultPosition, MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
268 Set3OperandsFromInstr(MachineInstr* minstr,
269 InstructionNode* vmInstrNode,
270 const TargetMachine& target,
271 bool canDiscardResult,
276 assert(op1Position >= 0);
277 assert(resultPosition >= 0);
280 minstr->SetMachineOperand(op1Position, MachineOperand::MO_VirtualRegister,
281 vmInstrNode->leftChild()->getValue());
283 // operand 2 (if any)
284 if (op2Position >= 0)
285 minstr->SetMachineOperand(op2Position, MachineOperand::MO_VirtualRegister,
286 vmInstrNode->rightChild()->getValue());
288 // result operand: if it can be discarded, use a dead register if one exists
289 if (canDiscardResult && target.zeroRegNum >= 0)
290 minstr->SetMachineOperand(resultPosition, target.zeroRegNum);
292 minstr->SetMachineOperand(resultPosition, MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
296 MachineOperand::MachineOperandType
297 ChooseRegOrImmed(Value* val,
298 MachineOpCode opCode,
299 const TargetMachine& target,
301 unsigned int& getMachineRegNum,
302 int64_t& getImmedValue)
304 MachineOperand::MachineOperandType opType =
305 MachineOperand::MO_VirtualRegister;
306 getMachineRegNum = 0;
309 // Check for the common case first: argument is not constant
311 if (val->getValueType() != Value::ConstantVal)
314 // Now get the constant value and check if it fits in the IMMED field.
315 // Take advantage of the fact that the max unsigned value will rarely
316 // fit into any IMMED field and ignore that case (i.e., cast smaller
317 // unsigned constants to signed).
319 bool isValidConstant;
320 int64_t intValue = GetConstantValueAsSignedInt(val, isValidConstant);
324 if (intValue == 0 && target.zeroRegNum >= 0)
326 opType = MachineOperand::MO_MachineRegister;
327 getMachineRegNum = target.zeroRegNum;
329 else if (canUseImmed &&
330 target.getInstrInfo().constantFitsInImmedField(opCode,intValue))
332 opType = MachineOperand::MO_SignExtendedImmed;
333 getImmedValue = intValue;
342 PrintMachineInstructions(const Method* method)
344 cout << "\n" << method->getReturnType()
345 << " \"" << method->getName() << "\"" << endl;
347 for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI)
349 const BasicBlock* bb = *BI;
351 << (bb->hasName()? bb->getName() : "Label")
352 << " (" << bb << ")" << ":"
355 const MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
356 for (unsigned i=0; i < mvec.size(); i++)
357 cout << "\t" << *mvec[i] << endl;
359 cout << endl << "End method \"" << method->getName() << "\""