2 //***************************************************************************
12 // 7/2/01 - Vikram Adve - Created
13 //**************************************************************************/
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/Value.h"
21 //************************ Class Implementations **************************/
23 // Constructor for instructions with fixed #operands (nearly all)
24 MachineInstr::MachineInstr(MachineOpCode _opCode,
25 OpCodeMask _opCodeMask)
27 opCodeMask(_opCodeMask),
28 operands(TargetInstrDescriptors[_opCode].numOperands)
30 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
33 // Constructor for instructions with variable #operands
34 MachineInstr::MachineInstr(MachineOpCode _opCode,
36 OpCodeMask _opCodeMask)
38 opCodeMask(_opCodeMask),
44 MachineInstr::SetMachineOperandVal(unsigned int i,
45 MachineOperand::MachineOperandType opType,
48 bool isDefAndUse=false)
50 assert(i < operands.size());
51 operands[i].Initialize(opType, _val);
52 operands[i].isDef = isdef ||
53 TargetInstrDescriptors[opCode].resultPos == (int) i;
54 operands[i].isDefAndUse = isDefAndUse;
58 MachineInstr::SetMachineOperandConst(unsigned int i,
59 MachineOperand::MachineOperandType operandType,
62 assert(i < operands.size());
63 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
64 "immed. constant cannot be defined");
65 operands[i].InitializeConst(operandType, intValue);
66 operands[i].isDef = false;
67 operands[i].isDefAndUse = false;
71 MachineInstr::SetMachineOperandReg(unsigned int i,
74 bool isDefAndUse=false,
77 assert(i < operands.size());
78 operands[i].InitializeReg(regNum, isCCReg);
79 operands[i].isDef = isdef ||
80 TargetInstrDescriptors[opCode].resultPos == (int) i;
81 operands[i].isDefAndUse = isDefAndUse;
82 regsUsed.insert(regNum);
86 MachineInstr::SetRegForOperand(unsigned i, int regNum)
88 operands[i].setRegForValue(regNum);
89 regsUsed.insert(regNum);
94 MachineInstr::dump() const
99 static inline std::ostream &OutputValue(std::ostream &os,
103 if (val && val->hasName())
104 return os << val->getName();
106 return os << (void*) val; // print address only
110 std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
112 os << TargetInstrDescriptors[minstr.opCode].opCodeString;
114 for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
115 os << "\t" << minstr.getOperand(i);
116 if( minstr.operandIsDefined(i) )
118 if( minstr.operandIsDefinedAndUsed(i) )
122 // code for printing implict references
123 unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
124 if( NumOfImpRefs > 0 ) {
125 os << "\tImplicit: ";
126 for(unsigned z=0; z < NumOfImpRefs; z++) {
127 OutputValue(os, minstr.getImplicitRef(z));
128 if( minstr.implicitRefIsDefined(z)) os << "*";
129 if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
137 static inline std::ostream &OutputOperand(std::ostream &os,
138 const MachineOperand &mop)
141 switch (mop.getOperandType())
143 case MachineOperand::MO_CCRegister:
144 case MachineOperand::MO_VirtualRegister:
145 return OutputValue(os, mop.getVRegValue());
146 case MachineOperand::MO_MachineRegister:
147 return os << "(" << mop.getMachineRegNum() << ")";
149 assert(0 && "Unknown operand type");
154 std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
158 case MachineOperand::MO_VirtualRegister:
159 case MachineOperand::MO_MachineRegister:
161 return OutputOperand(os, mop);
162 case MachineOperand::MO_CCRegister:
164 return OutputOperand(os, mop);
165 case MachineOperand::MO_SignExtendedImmed:
166 return os << (long)mop.immedVal;
167 case MachineOperand::MO_UnextendedImmed:
168 return os << (long)mop.immedVal;
169 case MachineOperand::MO_PCRelativeDisp:
171 const Value* opVal = mop.getVRegValue();
172 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
173 os << "%disp(" << (isLabel? "label " : "addr-of-val ");
174 if (opVal->hasName())
175 os << opVal->getName();
177 os << (const void*) opVal;
181 assert(0 && "Unrecognized operand type");