1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 //===----------------------------------------------------------------------===//
5 #include "llvm/CodeGen/MachineInstr.h"
6 #include "llvm/CodeGen/MachineBasicBlock.h"
7 #include "llvm/Value.h"
8 #include "llvm/Target/TargetMachine.h"
9 #include "llvm/Target/MachineInstrInfo.h"
10 #include "llvm/Target/MRegisterInfo.h"
14 // Global variable holding an array of descriptors for machine instructions.
15 // The actual object needs to be created separately for each target machine.
16 // This variable is initialized and reset by class MachineInstrInfo.
18 // FIXME: This should be a property of the target so that more than one target
19 // at a time can be active...
21 extern const MachineInstrDescriptor *TargetInstrDescriptors;
23 // Constructor for instructions with fixed #operands (nearly all)
24 MachineInstr::MachineInstr(MachineOpCode _opCode)
26 operands(TargetInstrDescriptors[_opCode].numOperands, MachineOperand()),
29 assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
32 // Constructor for instructions with variable #operands
33 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned numOperands)
35 operands(numOperands, MachineOperand()),
40 /// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
41 /// not a resize for them. It is expected that if you use this that you call
42 /// add* methods below to fill up the operands, instead of the Set methods.
43 /// Eventually, the "resizing" ctors will be phased out.
45 MachineInstr::MachineInstr(MachineOpCode Opcode, unsigned numOperands,
50 operands.reserve(numOperands);
53 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
54 /// MachineInstr is created and added to the end of the specified basic block.
56 MachineInstr::MachineInstr(MachineBasicBlock *MBB, MachineOpCode Opcode,
61 assert(MBB && "Cannot use inserting ctor with null basic block!");
62 operands.reserve(numOperands);
63 MBB->push_back(this); // Add instruction to end of basic block!
67 // OperandComplete - Return true if it's illegal to add a new operand
68 bool MachineInstr::OperandsComplete() const
70 int NumOperands = TargetInstrDescriptors[opCode].numOperands;
71 if (NumOperands >= 0 && getNumOperands() >= (unsigned)NumOperands)
72 return true; // Broken!
78 // Support for replacing opcode and operands of a MachineInstr in place.
79 // This only resets the size of the operand vector and initializes it.
80 // The new operands must be set explicitly later.
82 void MachineInstr::replace(MachineOpCode Opcode, unsigned numOperands)
84 assert(getNumImplicitRefs() == 0 &&
85 "This is probably broken because implicit refs are going to be lost.");
88 operands.resize(numOperands, MachineOperand());
92 MachineInstr::SetMachineOperandVal(unsigned i,
93 MachineOperand::MachineOperandType opType,
98 assert(i < operands.size()); // may be explicit or implicit op
99 operands[i].opType = opType;
100 operands[i].value = V;
101 operands[i].regNum = -1;
104 operands[i].flags = MachineOperand::DEFUSEFLAG;
105 else if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
106 operands[i].flags = MachineOperand::DEFFLAG;
108 operands[i].flags = 0;
112 MachineInstr::SetMachineOperandConst(unsigned i,
113 MachineOperand::MachineOperandType operandType,
116 assert(i < getNumOperands()); // must be explicit op
117 assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
118 "immed. constant cannot be defined");
120 operands[i].opType = operandType;
121 operands[i].value = NULL;
122 operands[i].immedVal = intValue;
123 operands[i].regNum = -1;
124 operands[i].flags = 0;
128 MachineInstr::SetMachineOperandReg(unsigned i,
131 assert(i < getNumOperands()); // must be explicit op
133 operands[i].opType = MachineOperand::MO_MachineRegister;
134 operands[i].value = NULL;
135 operands[i].regNum = regNum;
137 if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
138 operands[i].flags = MachineOperand::DEFFLAG;
140 operands[i].flags = 0;
142 insertUsedReg(regNum);
146 MachineInstr::SetRegForOperand(unsigned i, int regNum)
148 assert(i < getNumOperands()); // must be explicit op
149 operands[i].setRegForValue(regNum);
150 insertUsedReg(regNum);
154 // Subsitute all occurrences of Value* oldVal with newVal in all operands
155 // and all implicit refs. If defsOnly == true, substitute defs only.
157 MachineInstr::substituteValue(const Value* oldVal, Value* newVal, bool defsOnly)
159 unsigned numSubst = 0;
161 // Subsitute operands
162 for (MachineInstr::val_op_iterator O = begin(), E = end(); O != E; ++O)
164 if (!defsOnly || O.isDef())
166 O.getMachineOperand().value = newVal;
170 // Subsitute implicit refs
171 for (unsigned i=0, N=getNumImplicitRefs(); i < N; ++i)
172 if (getImplicitRef(i) == oldVal)
173 if (!defsOnly || implicitRefIsDefined(i))
175 getImplicitOp(i).value = newVal;
184 MachineInstr::dump() const
186 cerr << " " << *this;
189 static inline std::ostream&
190 OutputValue(std::ostream &os, const Value* val)
193 if (val && val->hasName())
194 return os << val->getName() << ")";
196 return os << (void*) val << ")"; // print address only
199 static inline void OutputReg(std::ostream &os, unsigned RegNo,
200 const MRegisterInfo *MRI = 0) {
202 if (RegNo < MRegisterInfo::FirstVirtualRegister)
203 os << "%" << MRI->get(RegNo).Name;
205 os << "%reg" << RegNo;
207 os << "%mreg(" << RegNo << ")";
210 static void print(const MachineOperand &MO, std::ostream &OS,
211 const TargetMachine &TM) {
212 const MRegisterInfo *MRI = TM.getRegisterInfo();
213 bool CloseParen = true;
216 else if (MO.opLoBits32())
218 else if (MO.opHiBits64())
220 else if (MO.opLoBits64())
225 switch (MO.getType()) {
226 case MachineOperand::MO_VirtualRegister:
227 if (MO.getVRegValue()) {
229 OutputValue(OS, MO.getVRegValue());
230 if (MO.hasAllocatedReg())
233 if (MO.hasAllocatedReg())
234 OutputReg(OS, MO.getAllocatedRegNum(), MRI);
236 case MachineOperand::MO_CCRegister:
238 OutputValue(OS, MO.getVRegValue());
239 if (MO.hasAllocatedReg()) {
241 OutputReg(OS, MO.getAllocatedRegNum(), MRI);
244 case MachineOperand::MO_MachineRegister:
245 OutputReg(OS, MO.getMachineRegNum(), MRI);
247 case MachineOperand::MO_SignExtendedImmed:
248 OS << (long)MO.getImmedValue();
250 case MachineOperand::MO_UnextendedImmed:
251 OS << (long)MO.getImmedValue();
253 case MachineOperand::MO_PCRelativeDisp: {
254 const Value* opVal = MO.getVRegValue();
255 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
256 OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
257 if (opVal->hasName())
258 OS << opVal->getName();
260 OS << (const void*) opVal;
264 case MachineOperand::MO_MachineBasicBlock:
266 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
267 << "," << (void*)MO.getMachineBasicBlock()->getBasicBlock() << ">";
269 case MachineOperand::MO_FrameIndex:
270 OS << "<fi#" << MO.getFrameIndex() << ">";
272 case MachineOperand::MO_ConstantPoolIndex:
273 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
275 case MachineOperand::MO_GlobalAddress:
276 OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
278 case MachineOperand::MO_ExternalSymbol:
279 OS << "<es:" << MO.getSymbolName() << ">";
282 assert(0 && "Unrecognized operand type");
289 void MachineInstr::print(std::ostream &OS, const TargetMachine &TM) const {
290 unsigned StartOp = 0;
292 // Specialize printing if op#0 is definition
293 if (getNumOperands() && operandIsDefined(0)) {
294 ::print(getOperand(0), OS, TM);
296 ++StartOp; // Don't print this operand again!
298 OS << TM.getInstrInfo().getName(getOpcode());
300 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
304 ::print(getOperand(i), OS, TM);
306 if (operandIsDefinedAndUsed(i))
308 else if (operandIsDefined(i))
312 // code for printing implict references
313 if (getNumImplicitRefs()) {
314 OS << "\tImplicitRefs: ";
315 for(unsigned i = 0, e = getNumImplicitRefs(); i != e; ++i) {
317 OutputValue(OS, getImplicitRef(i));
318 if (implicitRefIsDefinedAndUsed(i))
320 else if (implicitRefIsDefined(i))
329 std::ostream &operator<<(std::ostream& os, const MachineInstr& MI)
331 os << TargetInstrDescriptors[MI.opCode].Name;
333 for (unsigned i=0, N=MI.getNumOperands(); i < N; i++) {
334 os << "\t" << MI.getOperand(i);
335 if (MI.operandIsDefined(i))
337 if (MI.operandIsDefinedAndUsed(i))
341 // code for printing implict references
342 unsigned NumOfImpRefs = MI.getNumImplicitRefs();
343 if (NumOfImpRefs > 0) {
344 os << "\tImplicit: ";
345 for (unsigned z=0; z < NumOfImpRefs; z++) {
346 OutputValue(os, MI.getImplicitRef(z));
347 if (MI.implicitRefIsDefined(z)) os << "<d>";
348 if (MI.implicitRefIsDefinedAndUsed(z)) os << "<d&u>";
356 std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO)
360 else if (MO.opLoBits32())
362 else if (MO.opHiBits64())
364 else if (MO.opLoBits64())
367 switch (MO.getType())
369 case MachineOperand::MO_VirtualRegister:
370 if (MO.hasAllocatedReg())
371 OutputReg(OS, MO.getAllocatedRegNum());
373 if (MO.getVRegValue()) {
374 if (MO.hasAllocatedReg()) OS << "==";
376 OutputValue(OS, MO.getVRegValue());
379 case MachineOperand::MO_CCRegister:
381 OutputValue(OS, MO.getVRegValue());
382 if (MO.hasAllocatedReg()) {
384 OutputReg(OS, MO.getAllocatedRegNum());
387 case MachineOperand::MO_MachineRegister:
388 OutputReg(OS, MO.getMachineRegNum());
390 case MachineOperand::MO_SignExtendedImmed:
391 OS << (long)MO.getImmedValue();
393 case MachineOperand::MO_UnextendedImmed:
394 OS << (long)MO.getImmedValue();
396 case MachineOperand::MO_PCRelativeDisp:
398 const Value* opVal = MO.getVRegValue();
399 bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
400 OS << "%disp(" << (isLabel? "label " : "addr-of-val ");
401 if (opVal->hasName())
402 OS << opVal->getName();
404 OS << (const void*) opVal;
408 case MachineOperand::MO_MachineBasicBlock:
410 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
411 << "," << (void*)MO.getMachineBasicBlock()->getBasicBlock() << ">";
413 case MachineOperand::MO_FrameIndex:
414 OS << "<fi#" << MO.getFrameIndex() << ">";
416 case MachineOperand::MO_ConstantPoolIndex:
417 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
419 case MachineOperand::MO_GlobalAddress:
420 OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
422 case MachineOperand::MO_ExternalSymbol:
423 OS << "<es:" << MO.getSymbolName() << ">";
426 assert(0 && "Unrecognized operand type");
431 (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
432 MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))