1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Methods common to all machine instructions.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "llvm/Support/LeakDetector.h"
20 #include "llvm/Support/Streams.h"
24 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25 /// TID NULL and no operands.
26 MachineInstr::MachineInstr()
27 : TID(0), NumImplicitOps(0), parent(0) {
28 // Make sure that we get added to a machine basicblock
29 LeakDetector::addGarbageObject(this);
32 void MachineInstr::addImplicitDefUseOperands() {
33 if (TID->ImplicitDefs)
34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
35 addOperand(MachineOperand::CreateReg(*ImpDefs, true, true));
36 if (TID->ImplicitUses)
37 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
38 addOperand(MachineOperand::CreateReg(*ImpUses, false, true));
41 /// MachineInstr ctor - This constructor create a MachineInstr and add the
42 /// implicit operands. It reserves space for number of operands specified by
43 /// TargetInstrDescriptor or the numOperands if it is not zero. (for
44 /// instructions with variable number of operands).
45 MachineInstr::MachineInstr(const TargetInstrDescriptor &tid, bool NoImp)
46 : TID(&tid), NumImplicitOps(0), parent(0) {
47 if (!NoImp && TID->ImplicitDefs)
48 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
50 if (!NoImp && TID->ImplicitUses)
51 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
53 Operands.reserve(NumImplicitOps + TID->numOperands);
55 addImplicitDefUseOperands();
56 // Make sure that we get added to a machine basicblock
57 LeakDetector::addGarbageObject(this);
60 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
61 /// MachineInstr is created and added to the end of the specified basic block.
63 MachineInstr::MachineInstr(MachineBasicBlock *MBB,
64 const TargetInstrDescriptor &tid)
65 : TID(&tid), NumImplicitOps(0), parent(0) {
66 assert(MBB && "Cannot use inserting ctor with null basic block!");
67 if (TID->ImplicitDefs)
68 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
70 if (TID->ImplicitUses)
71 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
73 Operands.reserve(NumImplicitOps + TID->numOperands);
74 addImplicitDefUseOperands();
75 // Make sure that we get added to a machine basicblock
76 LeakDetector::addGarbageObject(this);
77 MBB->push_back(this); // Add instruction to end of basic block!
80 /// MachineInstr ctor - Copies MachineInstr arg exactly
82 MachineInstr::MachineInstr(const MachineInstr &MI) {
83 TID = MI.getInstrDescriptor();
84 NumImplicitOps = MI.NumImplicitOps;
85 Operands.reserve(MI.getNumOperands());
88 for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
89 Operands.push_back(MI.getOperand(i));
90 Operands.back().ParentMI = this;
93 // Set parent, next, and prev to null
100 MachineInstr::~MachineInstr() {
101 LeakDetector::removeGarbageObject(this);
103 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
104 assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
108 /// getOpcode - Returns the opcode of this MachineInstr.
110 int MachineInstr::getOpcode() const {
114 /// removeFromParent - This method unlinks 'this' from the containing basic
115 /// block, and returns it, but does not delete it.
116 MachineInstr *MachineInstr::removeFromParent() {
117 assert(getParent() && "Not embedded in a basic block!");
118 getParent()->remove(this);
123 /// OperandComplete - Return true if it's illegal to add a new operand
125 bool MachineInstr::OperandsComplete() const {
126 unsigned short NumOperands = TID->numOperands;
127 if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
128 getNumOperands()-NumImplicitOps >= NumOperands)
129 return true; // Broken: we have all the operands of this instruction!
133 /// getNumExplicitOperands - Returns the number of non-implicit operands.
135 unsigned MachineInstr::getNumExplicitOperands() const {
136 unsigned NumOperands = TID->numOperands;
137 if ((TID->Flags & M_VARIABLE_OPS) == 0)
140 for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
141 const MachineOperand &MO = getOperand(NumOperands);
142 if (!MO.isRegister() || !MO.isImplicit())
148 /// isIdenticalTo - Return true if this operand is identical to the specified
150 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
151 if (getType() != Other.getType()) return false;
154 default: assert(0 && "Unrecognized operand type");
155 case MachineOperand::MO_Register:
156 return getReg() == Other.getReg() && isDef() == Other.isDef();
157 case MachineOperand::MO_Immediate:
158 return getImm() == Other.getImm();
159 case MachineOperand::MO_MachineBasicBlock:
160 return getMBB() == Other.getMBB();
161 case MachineOperand::MO_FrameIndex:
162 return getFrameIndex() == Other.getFrameIndex();
163 case MachineOperand::MO_ConstantPoolIndex:
164 return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
165 getOffset() == Other.getOffset();
166 case MachineOperand::MO_JumpTableIndex:
167 return getJumpTableIndex() == Other.getJumpTableIndex();
168 case MachineOperand::MO_GlobalAddress:
169 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
170 case MachineOperand::MO_ExternalSymbol:
171 return !strcmp(getSymbolName(), Other.getSymbolName()) &&
172 getOffset() == Other.getOffset();
176 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
177 /// the specific register or -1 if it is not found. It further tightening
178 /// the search criteria to a use that kills the register if isKill is true.
179 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
180 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
181 const MachineOperand &MO = getOperand(i);
182 if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg)
183 if (!isKill || MO.isKill())
189 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
190 /// the specific register or NULL if it is not found.
191 MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
192 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
193 MachineOperand &MO = getOperand(i);
194 if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
200 /// findFirstPredOperandIdx() - Find the index of the first operand in the
201 /// operand list that is used to represent the predicate. It returns -1 if
203 int MachineInstr::findFirstPredOperandIdx() const {
204 const TargetInstrDescriptor *TID = getInstrDescriptor();
205 if (TID->Flags & M_PREDICABLE) {
206 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
207 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
214 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
215 /// to two addr elimination.
216 bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
217 const TargetInstrDescriptor *TID = getInstrDescriptor();
218 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
219 const MachineOperand &MO1 = getOperand(i);
220 if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
221 for (unsigned j = i+1; j < e; ++j) {
222 const MachineOperand &MO2 = getOperand(j);
223 if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
224 TID->getOperandConstraint(j, TOI::TIED_TO) == (int)i)
232 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
234 void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
235 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
236 const MachineOperand &MO = MI->getOperand(i);
237 if (!MO.isRegister() || (!MO.isKill() && !MO.isDead()))
239 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
240 MachineOperand &MOp = getOperand(j);
241 if (!MOp.isIdenticalTo(MO))
252 /// copyPredicates - Copies predicate operand(s) from MI.
253 void MachineInstr::copyPredicates(const MachineInstr *MI) {
254 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
255 if (TID->Flags & M_PREDICABLE) {
256 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
257 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
258 // Predicated operands must be last operands.
259 addOperand(MI->getOperand(i));
265 void MachineInstr::dump() const {
266 cerr << " " << *this;
269 static inline void OutputReg(std::ostream &os, unsigned RegNo,
270 const MRegisterInfo *MRI = 0) {
271 if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
273 os << "%" << MRI->get(RegNo).Name;
275 os << "%mreg(" << RegNo << ")";
277 os << "%reg" << RegNo;
280 static void print(const MachineOperand &MO, std::ostream &OS,
281 const TargetMachine *TM) {
282 const MRegisterInfo *MRI = 0;
284 if (TM) MRI = TM->getRegisterInfo();
286 switch (MO.getType()) {
287 case MachineOperand::MO_Register:
288 OutputReg(OS, MO.getReg(), MRI);
290 case MachineOperand::MO_Immediate:
291 OS << MO.getImmedValue();
293 case MachineOperand::MO_MachineBasicBlock:
295 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
296 << "," << (void*)MO.getMachineBasicBlock() << ">";
298 case MachineOperand::MO_FrameIndex:
299 OS << "<fi#" << MO.getFrameIndex() << ">";
301 case MachineOperand::MO_ConstantPoolIndex:
302 OS << "<cp#" << MO.getConstantPoolIndex() << ">";
304 case MachineOperand::MO_JumpTableIndex:
305 OS << "<jt#" << MO.getJumpTableIndex() << ">";
307 case MachineOperand::MO_GlobalAddress:
308 OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
309 if (MO.getOffset()) OS << "+" << MO.getOffset();
312 case MachineOperand::MO_ExternalSymbol:
313 OS << "<es:" << MO.getSymbolName();
314 if (MO.getOffset()) OS << "+" << MO.getOffset();
318 assert(0 && "Unrecognized operand type");
322 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
323 unsigned StartOp = 0;
325 // Specialize printing if op#0 is definition
326 if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
327 ::print(getOperand(0), OS, TM);
328 if (getOperand(0).isDead())
331 ++StartOp; // Don't print this operand again!
337 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
338 const MachineOperand& mop = getOperand(i);
342 ::print(mop, OS, TM);
344 if (mop.isRegister()) {
345 if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
347 bool NeedComma = false;
348 if (mop.isImplicit()) {
349 OS << (mop.isDef() ? "imp-def" : "imp-use");
351 } else if (mop.isDef()) {
355 if (mop.isKill() || mop.isDead()) {
371 void MachineInstr::print(std::ostream &os) const {
372 // If the instruction is embedded into a basic block, we can find the target
373 // info for the instruction.
374 if (const MachineBasicBlock *MBB = getParent()) {
375 const MachineFunction *MF = MBB->getParent();
377 print(os, &MF->getTarget());
382 // Otherwise, print it out in the "raw" format without symbolic register names
384 os << getInstrDescriptor()->Name;
386 for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
387 os << "\t" << getOperand(i);
388 if (getOperand(i).isRegister() && getOperand(i).isDef())
395 void MachineOperand::print(std::ostream &OS) const {
398 OutputReg(OS, getReg());
401 OS << (long)getImmedValue();
403 case MO_MachineBasicBlock:
405 << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
406 << "@" << (void*)getMachineBasicBlock() << ">";
409 OS << "<fi#" << getFrameIndex() << ">";
411 case MO_ConstantPoolIndex:
412 OS << "<cp#" << getConstantPoolIndex() << ">";
414 case MO_JumpTableIndex:
415 OS << "<jt#" << getJumpTableIndex() << ">";
417 case MO_GlobalAddress:
418 OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
420 case MO_ExternalSymbol:
421 OS << "<es:" << getSymbolName() << ">";
424 assert(0 && "Unrecognized operand type");