1 //===-- MachineInstr.cpp --------------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Methods common to all machine instructions.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/Target/TargetMachine.h"
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "llvm/Target/MRegisterInfo.h"
19 #include "llvm/Support/LeakDetector.h"
20 #include "llvm/Support/Streams.h"
24 /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25 /// TID NULL and no operands.
26 MachineInstr::MachineInstr()
27 : TID(0), NumImplicitOps(0), parent(0) {
28 // Make sure that we get added to a machine basicblock
29 LeakDetector::addGarbageObject(this);
32 void MachineInstr::addImplicitDefUseOperands() {
33 if (TID->ImplicitDefs)
34 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
35 addOperand(MachineOperand::CreateReg(*ImpDefs, true, true));
36 if (TID->ImplicitUses)
37 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
38 addOperand(MachineOperand::CreateReg(*ImpUses, false, true));
41 /// MachineInstr ctor - This constructor create a MachineInstr and add the
42 /// implicit operands. It reserves space for number of operands specified by
43 /// TargetInstrDescriptor or the numOperands if it is not zero. (for
44 /// instructions with variable number of operands).
45 MachineInstr::MachineInstr(const TargetInstrDescriptor &tid, bool NoImp)
46 : TID(&tid), NumImplicitOps(0), parent(0) {
47 if (!NoImp && TID->ImplicitDefs)
48 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
50 if (!NoImp && TID->ImplicitUses)
51 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
53 Operands.reserve(NumImplicitOps + TID->numOperands);
55 addImplicitDefUseOperands();
56 // Make sure that we get added to a machine basicblock
57 LeakDetector::addGarbageObject(this);
60 /// MachineInstr ctor - Work exactly the same as the ctor above, except that the
61 /// MachineInstr is created and added to the end of the specified basic block.
63 MachineInstr::MachineInstr(MachineBasicBlock *MBB,
64 const TargetInstrDescriptor &tid)
65 : TID(&tid), NumImplicitOps(0), parent(0) {
66 assert(MBB && "Cannot use inserting ctor with null basic block!");
67 if (TID->ImplicitDefs)
68 for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
70 if (TID->ImplicitUses)
71 for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
73 Operands.reserve(NumImplicitOps + TID->numOperands);
74 addImplicitDefUseOperands();
75 // Make sure that we get added to a machine basicblock
76 LeakDetector::addGarbageObject(this);
77 MBB->push_back(this); // Add instruction to end of basic block!
80 /// MachineInstr ctor - Copies MachineInstr arg exactly
82 MachineInstr::MachineInstr(const MachineInstr &MI) {
83 TID = MI.getInstrDescriptor();
84 NumImplicitOps = MI.NumImplicitOps;
85 Operands.reserve(MI.getNumOperands());
88 for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
89 Operands.push_back(MI.getOperand(i));
90 Operands.back().ParentMI = this;
93 // Set parent, next, and prev to null
100 MachineInstr::~MachineInstr() {
101 LeakDetector::removeGarbageObject(this);
103 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
104 assert(Operands[i].ParentMI == this && "ParentMI mismatch!");
108 /// getOpcode - Returns the opcode of this MachineInstr.
110 int MachineInstr::getOpcode() const {
114 /// removeFromParent - This method unlinks 'this' from the containing basic
115 /// block, and returns it, but does not delete it.
116 MachineInstr *MachineInstr::removeFromParent() {
117 assert(getParent() && "Not embedded in a basic block!");
118 getParent()->remove(this);
123 /// OperandComplete - Return true if it's illegal to add a new operand
125 bool MachineInstr::OperandsComplete() const {
126 unsigned short NumOperands = TID->numOperands;
127 if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
128 getNumOperands()-NumImplicitOps >= NumOperands)
129 return true; // Broken: we have all the operands of this instruction!
133 /// getNumExplicitOperands - Returns the number of non-implicit operands.
135 unsigned MachineInstr::getNumExplicitOperands() const {
136 unsigned NumOperands = TID->numOperands;
137 if ((TID->Flags & M_VARIABLE_OPS) == 0)
140 for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
141 const MachineOperand &MO = getOperand(NumOperands);
142 if (!MO.isRegister() || !MO.isImplicit())
148 /// isIdenticalTo - Return true if this operand is identical to the specified
150 bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
151 if (getType() != Other.getType()) return false;
154 default: assert(0 && "Unrecognized operand type");
155 case MachineOperand::MO_Register:
156 return getReg() == Other.getReg() && isDef() == Other.isDef() &&
157 getSubReg() == Other.getSubReg();
158 case MachineOperand::MO_Immediate:
159 return getImm() == Other.getImm();
160 case MachineOperand::MO_MachineBasicBlock:
161 return getMBB() == Other.getMBB();
162 case MachineOperand::MO_FrameIndex:
163 return getFrameIndex() == Other.getFrameIndex();
164 case MachineOperand::MO_ConstantPoolIndex:
165 return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
166 getOffset() == Other.getOffset();
167 case MachineOperand::MO_JumpTableIndex:
168 return getJumpTableIndex() == Other.getJumpTableIndex();
169 case MachineOperand::MO_GlobalAddress:
170 return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
171 case MachineOperand::MO_ExternalSymbol:
172 return !strcmp(getSymbolName(), Other.getSymbolName()) &&
173 getOffset() == Other.getOffset();
177 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
178 /// the specific register or -1 if it is not found. It further tightening
179 /// the search criteria to a use that kills the register if isKill is true.
180 int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
181 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
182 const MachineOperand &MO = getOperand(i);
183 if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg)
184 if (!isKill || MO.isKill())
190 /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
191 /// the specific register or NULL if it is not found.
192 MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
193 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
194 MachineOperand &MO = getOperand(i);
195 if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
201 /// findFirstPredOperandIdx() - Find the index of the first operand in the
202 /// operand list that is used to represent the predicate. It returns -1 if
204 int MachineInstr::findFirstPredOperandIdx() const {
205 const TargetInstrDescriptor *TID = getInstrDescriptor();
206 if (TID->Flags & M_PREDICABLE) {
207 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
208 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
215 /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
216 /// to two addr elimination.
217 bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg) const {
218 const TargetInstrDescriptor *TID = getInstrDescriptor();
219 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
220 const MachineOperand &MO1 = getOperand(i);
221 if (MO1.isRegister() && MO1.isDef() && MO1.getReg() == Reg) {
222 for (unsigned j = i+1; j < e; ++j) {
223 const MachineOperand &MO2 = getOperand(j);
224 if (MO2.isRegister() && MO2.isUse() && MO2.getReg() == Reg &&
225 TID->getOperandConstraint(j, TOI::TIED_TO) == (int)i)
233 /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
235 void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
236 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
237 const MachineOperand &MO = MI->getOperand(i);
238 if (!MO.isRegister() || (!MO.isKill() && !MO.isDead()))
240 for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
241 MachineOperand &MOp = getOperand(j);
242 if (!MOp.isIdenticalTo(MO))
253 /// copyPredicates - Copies predicate operand(s) from MI.
254 void MachineInstr::copyPredicates(const MachineInstr *MI) {
255 const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
256 if (TID->Flags & M_PREDICABLE) {
257 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
258 if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
259 // Predicated operands must be last operands.
260 addOperand(MI->getOperand(i));
266 void MachineInstr::dump() const {
267 cerr << " " << *this;
270 /// print - Print the specified machine operand.
272 static void print(const MachineOperand &MO, std::ostream &OS,
273 const TargetMachine *TM) {
274 switch (MO.getType()) {
275 case MachineOperand::MO_Register:
276 if (MO.getReg() == 0 || MRegisterInfo::isVirtualRegister(MO.getReg()))
277 OS << "%reg" << MO.getReg();
279 // If the instruction is embedded into a basic block, we can find the
281 // info for the instruction.
283 if (const MachineInstr *MI = MO.getParent())
284 if (const MachineBasicBlock *MBB = MI->getParent())
285 if (const MachineFunction *MF = MBB->getParent())
286 TM = &MF->getTarget();
289 OS << "%" << TM->getRegisterInfo()->get(MO.getReg()).Name;
291 OS << "%mreg" << MO.getReg();
294 if (MO.isDef() || MO.isKill() || MO.isDead() || MO.isImplicit()) {
296 bool NeedComma = false;
297 if (MO.isImplicit()) {
298 OS << (MO.isDef() ? "imp-def" : "imp-use");
300 } else if (MO.isDef()) {
304 if (MO.isKill() || MO.isDead()) {
305 if (NeedComma) OS << ",";
306 if (MO.isKill()) OS << "kill";
307 if (MO.isDead()) OS << "dead";
312 case MachineOperand::MO_Immediate:
315 case MachineOperand::MO_MachineBasicBlock:
317 << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
318 << "," << (void*)MO.getMachineBasicBlock() << ">";
320 case MachineOperand::MO_FrameIndex:
321 OS << "<fi#" << MO.getFrameIndex() << ">";
323 case MachineOperand::MO_ConstantPoolIndex:
324 OS << "<cp#" << MO.getConstantPoolIndex();
325 if (MO.getOffset()) OS << "+" << MO.getOffset();
328 case MachineOperand::MO_JumpTableIndex:
329 OS << "<jt#" << MO.getJumpTableIndex() << ">";
331 case MachineOperand::MO_GlobalAddress:
332 OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
333 if (MO.getOffset()) OS << "+" << MO.getOffset();
336 case MachineOperand::MO_ExternalSymbol:
337 OS << "<es:" << MO.getSymbolName();
338 if (MO.getOffset()) OS << "+" << MO.getOffset();
342 assert(0 && "Unrecognized operand type");
346 void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
347 // Specialize printing if op#0 is definition
348 unsigned StartOp = 0;
349 if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) {
350 ::print(getOperand(0), OS, TM);
352 ++StartOp; // Don't print this operand again!
355 OS << getInstrDescriptor()->Name;
357 for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
361 ::print(getOperand(i), OS, TM);
367 void MachineOperand::print(std::ostream &OS) const {
368 ::print(*this, OS, 0);