1 //===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Bill Wendling and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass performs loop invariant code motion on machine instructions. We
11 // attempt to remove as much code from the body of a loop as possible.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "machine-licm"
16 #include "llvm/ADT/IndexedMap.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Support/CFG.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Target/MRegisterInfo.h"
30 #include "llvm/Target/TargetMachine.h"
35 // Hidden options to help debugging
37 PerformLICM("machine-licm",
38 cl::init(false), cl::Hidden,
39 cl::desc("Perform loop-invariant code motion on machine code"));
42 STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops");
45 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
46 // Various analyses that we use...
47 MachineLoopInfo *LI; // Current MachineLoopInfo
48 MachineDominatorTree *DT; // Machine dominator tree for the current Loop
50 const TargetInstrInfo *TII;
52 // State that is updated as we process loops
53 bool Changed; // True if a loop is changed.
54 MachineLoop *CurLoop; // The current loop we are working on.
56 // Map the def of a virtual register to the machine instruction.
57 IndexedMap<const MachineInstr*, VirtReg2IndexFunctor> VRegDefs;
59 static char ID; // Pass identification, replacement for typeid
60 MachineLICM() : MachineFunctionPass((intptr_t)&ID) {}
62 virtual bool runOnMachineFunction(MachineFunction &MF);
64 /// FIXME: Loop preheaders?
66 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
68 AU.addRequired<MachineLoopInfo>();
69 AU.addRequired<MachineDominatorTree>();
72 /// VisitAllLoops - Visit all of the loops in depth first order and try to
73 /// hoist invariant instructions from them.
75 void VisitAllLoops(MachineLoop *L) {
76 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops();
78 for (MachineLoop::iterator
79 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) {
82 // Traverse the body of the loop in depth first order on the dominator
83 // tree so that we are guaranteed to see definitions before we see uses.
85 HoistRegion(DT->getNode(ML->getHeader()));
88 HoistRegion(DT->getNode(L->getHeader()));
91 /// MapVirtualRegisterDefs - Create a map of which machine instruction
92 /// defines a virtual register.
94 void MapVirtualRegisterDefs(const MachineFunction &MF);
96 /// IsInSubLoop - A little predicate that returns true if the specified
97 /// basic block is in a subloop of the current one, not the current one
100 bool IsInSubLoop(MachineBasicBlock *BB) {
101 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop");
102 return LI->getLoopFor(BB) != CurLoop;
105 /// CanHoistInst - Checks that this instructions is one that can be hoisted
106 /// out of the loop. I.e., it has no side effects, isn't a control flow
109 bool CanHoistInst(MachineInstr &I) const {
110 const TargetInstrDescriptor *TID = I.getInstrDescriptor();
112 // Don't hoist if this instruction implicitly reads physical registers.
113 if (TID->ImplicitUses) return false;
115 MachineOpCode Opcode = TID->Opcode;
116 return TII->isTriviallyReMaterializable(&I) &&
117 // FIXME: Below necessary?
118 !(TII->isReturn(Opcode) ||
119 TII->isTerminatorInstr(Opcode) ||
120 TII->isBranch(Opcode) ||
121 TII->isIndirectBranch(Opcode) ||
122 TII->isBarrier(Opcode) ||
123 TII->isCall(Opcode) ||
124 TII->isLoad(Opcode) || // TODO: Do loads and stores.
125 TII->isStore(Opcode));
128 /// IsLoopInvariantInst - Returns true if the instruction is loop
129 /// invariant. I.e., all virtual register operands are defined outside of
130 /// the loop, physical registers aren't accessed (explicitly or implicitly),
131 /// and the instruction is hoistable.
133 bool IsLoopInvariantInst(MachineInstr &I);
135 /// FindPredecessors - Get all of the predecessors of the loop that are not
138 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) {
139 const MachineBasicBlock *Header = CurLoop->getHeader();
141 for (MachineBasicBlock::const_pred_iterator
142 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I)
143 if (!CurLoop->contains(*I))
147 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of
148 /// the predecessor basic block (but before the terminator instructions).
150 void MoveInstToEndOfBlock(MachineBasicBlock *MBB, MachineInstr *MI) {
151 MachineBasicBlock::iterator Iter = MBB->getFirstTerminator();
152 MBB->insert(Iter, MI);
156 /// HoistRegion - Walk the specified region of the CFG (defined by all
157 /// blocks dominated by the specified block, and that are in the current
158 /// loop) in depth first order w.r.t the DominatorTree. This allows us to
159 /// visit definitions before uses, allowing us to hoist a loop body in one
160 /// pass without iteration.
162 void HoistRegion(MachineDomTreeNode *N);
164 /// Hoist - When an instruction is found to only use loop invariant operands
165 /// that is safe to hoist, this instruction is called to do the dirty work.
167 void Hoist(MachineInstr &MI);
170 char MachineLICM::ID = 0;
171 RegisterPass<MachineLICM> X("machine-licm",
172 "Machine Loop Invariant Code Motion");
173 } // end anonymous namespace
175 FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); }
177 /// Hoist expressions out of the specified loop. Note, alias info for inner loop
178 /// is not preserved so it is not a good idea to run LICM multiple times on one
181 bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
182 if (!PerformLICM) return false; // For debugging.
185 TII = MF.getTarget().getInstrInfo();
187 // Get our Loop information...
188 LI = &getAnalysis<MachineLoopInfo>();
189 DT = &getAnalysis<MachineDominatorTree>();
191 for (MachineLoopInfo::iterator
192 I = LI->begin(), E = LI->end(); I != E; ++I) {
196 // Visit all of the instructions of the loop. We want to visit the subloops
197 // first, though, so that we can hoist their invariants first into their
198 // containing loop before we process that loop.
205 /// MapVirtualRegisterDefs - Create a map of which machine instruction defines a
206 /// virtual register.
208 void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
209 for (MachineFunction::const_iterator
210 I = MF.begin(), E = MF.end(); I != E; ++I) {
211 const MachineBasicBlock &MBB = *I;
213 for (MachineBasicBlock::const_iterator
214 II = MBB.begin(), IE = MBB.end(); II != IE; ++II) {
215 const MachineInstr &MI = *II;
217 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
218 const MachineOperand &MO = MI.getOperand(0);
220 if (MO.isRegister() && MO.isDef() &&
221 MRegisterInfo::isVirtualRegister(MO.getReg()))
222 VRegDefs[MO.getReg()] = &MI;
228 /// HoistRegion - Walk the specified region of the CFG (defined by all blocks
229 /// dominated by the specified block, and that are in the current loop) in depth
230 /// first order w.r.t the DominatorTree. This allows us to visit definitions
231 /// before uses, allowing us to hoist a loop body in one pass without iteration.
233 void MachineLICM::HoistRegion(MachineDomTreeNode *N) {
234 assert(N != 0 && "Null dominator tree node?");
235 MachineBasicBlock *BB = N->getBlock();
237 // If this subregion is not in the top level loop at all, exit.
238 if (!CurLoop->contains(BB)) return;
240 // Only need to process the contents of this block if it is not part of a
241 // subloop (which would already have been processed).
242 if (!IsInSubLoop(BB))
243 for (MachineBasicBlock::iterator
244 I = BB->begin(), E = BB->end(); I != E; ) {
245 MachineInstr &MI = *I++;
247 // Try hoisting the instruction out of the loop. We can only do this if
248 // all of the operands of the instruction are loop invariant and if it is
249 // safe to hoist the instruction.
253 const std::vector<MachineDomTreeNode*> &Children = N->getChildren();
255 for (unsigned I = 0, E = Children.size(); I != E; ++I)
256 HoistRegion(Children[I]);
259 /// IsLoopInvariantInst - Returns true if the instruction is loop
260 /// invariant. I.e., all virtual register operands are defined outside of the
261 /// loop, physical registers aren't accessed (explicitly or implicitly), and the
262 /// instruction is hoistable.
264 bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
265 if (!CanHoistInst(I)) return false;
267 // The instruction is loop invariant if all of its operands are loop-invariant
268 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
269 const MachineOperand &MO = I.getOperand(i);
271 if (!MO.isRegister() || !MO.isUse())
274 unsigned Reg = MO.getReg();
276 // Don't hoist instructions that access physical registers.
277 if (!MRegisterInfo::isVirtualRegister(Reg))
280 assert(VRegDefs[Reg] && "Machine instr not mapped for this vreg?");
282 // If the loop contains the definition of an operand, then the instruction
283 // isn't loop invariant.
284 if (CurLoop->contains(VRegDefs[Reg]->getParent()))
288 // If we got this far, the instruction is loop invariant!
292 /// Hoist - When an instruction is found to only use loop invariant operands
293 /// that is safe to hoist, this instruction is called to do the dirty work.
295 void MachineLICM::Hoist(MachineInstr &MI) {
296 if (!IsLoopInvariantInst(MI)) return;
298 std::vector<MachineBasicBlock*> Preds;
300 // Non-back-edge predecessors.
301 FindPredecessors(Preds);
303 // Either we don't have any predecessors(?!) or we have more than one, which
305 if (Preds.empty() || Preds.size() != 1) return;
307 // Check that the predecessor is qualified to take the hoisted
308 // instruction. I.e., there is only one edge from the predecessor, and it's to
310 MachineBasicBlock *MBB = Preds.front();
312 // FIXME: We are assuming at first that the basic block coming into this loop
313 // has only one successor. This isn't the case in general because we haven't
314 // broken critical edges or added preheaders.
315 if (MBB->succ_size() != 1) return;
316 assert(*MBB->succ_begin() == CurLoop->getHeader() &&
317 "The predecessor doesn't feed directly into the loop header!");
319 // Now move the instructions to the predecessor.
320 MoveInstToEndOfBlock(MBB, MI.clone());
322 // Hoisting was successful! Remove bothersome instruction now.
323 MI.getParent()->remove(&MI);