1 //===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass performs loop invariant code motion on machine instructions. We
11 // attempt to remove as much code from the body of a loop as possible.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "machine-licm"
16 #include "llvm/ADT/IndexedMap.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineDominators.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineLoopInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Support/CFG.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Target/MRegisterInfo.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetMachine.h"
36 // Hidden options to help debugging
38 PerformLICM("machine-licm",
39 cl::init(false), cl::Hidden,
40 cl::desc("Perform loop-invariant code motion on machine code"));
43 STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops");
46 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
47 const TargetMachine *TM;
48 const TargetInstrInfo *TII;
49 MachineFunction *CurMF; // Current MachineFunction
51 // Various analyses that we use...
52 MachineLoopInfo *LI; // Current MachineLoopInfo
53 MachineDominatorTree *DT; // Machine dominator tree for the current Loop
54 MachineRegisterInfo *RegInfo; // Machine register information
56 // State that is updated as we process loops
57 bool Changed; // True if a loop is changed.
58 MachineLoop *CurLoop; // The current loop we are working on.
60 // Map the def of a virtual register to the machine instruction.
61 IndexedMap<const MachineInstr*, VirtReg2IndexFunctor> VRegDefs;
63 static char ID; // Pass identification, replacement for typeid
64 MachineLICM() : MachineFunctionPass((intptr_t)&ID) {}
66 virtual bool runOnMachineFunction(MachineFunction &MF);
68 /// FIXME: Loop preheaders?
70 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
72 AU.addRequired<MachineLoopInfo>();
73 AU.addRequired<MachineDominatorTree>();
76 /// VisitAllLoops - Visit all of the loops in depth first order and try to
77 /// hoist invariant instructions from them.
79 void VisitAllLoops(MachineLoop *L) {
80 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops();
82 for (MachineLoop::iterator
83 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) {
86 // Traverse the body of the loop in depth first order on the dominator
87 // tree so that we are guaranteed to see definitions before we see uses.
89 HoistRegion(DT->getNode(ML->getHeader()));
92 HoistRegion(DT->getNode(L->getHeader()));
95 /// MapVirtualRegisterDefs - Create a map of which machine instruction
96 /// defines a virtual register.
98 void MapVirtualRegisterDefs();
100 /// IsInSubLoop - A little predicate that returns true if the specified
101 /// basic block is in a subloop of the current one, not the current one
104 bool IsInSubLoop(MachineBasicBlock *BB) {
105 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop");
106 return LI->getLoopFor(BB) != CurLoop;
109 /// IsLoopInvariantInst - Returns true if the instruction is loop
110 /// invariant. I.e., all virtual register operands are defined outside of
111 /// the loop, physical registers aren't accessed (explicitly or implicitly),
112 /// and the instruction is hoistable.
114 bool IsLoopInvariantInst(MachineInstr &I);
116 /// FindPredecessors - Get all of the predecessors of the loop that are not
119 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) {
120 const MachineBasicBlock *Header = CurLoop->getHeader();
122 for (MachineBasicBlock::const_pred_iterator
123 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I)
124 if (!CurLoop->contains(*I))
128 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of
129 /// the predecessor basic block (but before the terminator instructions).
131 void MoveInstToEndOfBlock(MachineBasicBlock *ToMBB,
132 MachineBasicBlock *FromMBB,
135 DOUT << "Hoisting " << *MI;
136 if (ToMBB->getBasicBlock())
137 DOUT << " to MachineBasicBlock "
138 << ToMBB->getBasicBlock()->getName();
142 MachineBasicBlock::iterator WhereIter = ToMBB->getFirstTerminator();
143 MachineBasicBlock::iterator To, From = FromMBB->begin();
148 assert(From != FromMBB->end() && "Didn't find instr in BB!");
151 ToMBB->splice(WhereIter, FromMBB, From, ++To);
155 /// HoistRegion - Walk the specified region of the CFG (defined by all
156 /// blocks dominated by the specified block, and that are in the current
157 /// loop) in depth first order w.r.t the DominatorTree. This allows us to
158 /// visit definitions before uses, allowing us to hoist a loop body in one
159 /// pass without iteration.
161 void HoistRegion(MachineDomTreeNode *N);
163 /// Hoist - When an instruction is found to only use loop invariant operands
164 /// that is safe to hoist, this instruction is called to do the dirty work.
166 void Hoist(MachineInstr &MI);
169 char MachineLICM::ID = 0;
170 RegisterPass<MachineLICM> X("machine-licm",
171 "Machine Loop Invariant Code Motion");
172 } // end anonymous namespace
174 FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); }
176 /// Hoist expressions out of the specified loop. Note, alias info for inner loop
177 /// is not preserved so it is not a good idea to run LICM multiple times on one
180 bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
181 if (!PerformLICM) return false; // For debugging.
183 DOUT << "******** Machine LICM ********\n";
187 TM = &CurMF->getTarget();
188 TII = TM->getInstrInfo();
189 RegInfo = new MachineRegisterInfo(*TM->getRegisterInfo());
191 // Get our Loop information...
192 LI = &getAnalysis<MachineLoopInfo>();
193 DT = &getAnalysis<MachineDominatorTree>();
195 MapVirtualRegisterDefs();
197 for (MachineLoopInfo::iterator
198 I = LI->begin(), E = LI->end(); I != E; ++I) {
201 // Visit all of the instructions of the loop. We want to visit the subloops
202 // first, though, so that we can hoist their invariants first into their
203 // containing loop before we process that loop.
204 VisitAllLoops(CurLoop);
211 /// MapVirtualRegisterDefs - Create a map of which machine instruction defines a
212 /// virtual register.
214 void MachineLICM::MapVirtualRegisterDefs() {
215 for (MachineFunction::const_iterator
216 I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
217 const MachineBasicBlock &MBB = *I;
219 for (MachineBasicBlock::const_iterator
220 II = MBB.begin(), IE = MBB.end(); II != IE; ++II) {
221 const MachineInstr &MI = *II;
223 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
224 const MachineOperand &MO = MI.getOperand(i);
226 if (MO.isRegister() && MO.isDef() &&
227 MRegisterInfo::isVirtualRegister(MO.getReg())) {
228 VRegDefs.grow(MO.getReg());
229 VRegDefs[MO.getReg()] = &MI;
236 /// HoistRegion - Walk the specified region of the CFG (defined by all blocks
237 /// dominated by the specified block, and that are in the current loop) in depth
238 /// first order w.r.t the DominatorTree. This allows us to visit definitions
239 /// before uses, allowing us to hoist a loop body in one pass without iteration.
241 void MachineLICM::HoistRegion(MachineDomTreeNode *N) {
242 assert(N != 0 && "Null dominator tree node?");
243 MachineBasicBlock *BB = N->getBlock();
245 // If this subregion is not in the top level loop at all, exit.
246 if (!CurLoop->contains(BB)) return;
248 // Only need to process the contents of this block if it is not part of a
249 // subloop (which would already have been processed).
250 if (!IsInSubLoop(BB))
251 for (MachineBasicBlock::iterator
252 I = BB->begin(), E = BB->end(); I != E; ) {
253 MachineInstr &MI = *I++;
255 // Try hoisting the instruction out of the loop. We can only do this if
256 // all of the operands of the instruction are loop invariant and if it is
257 // safe to hoist the instruction.
261 const std::vector<MachineDomTreeNode*> &Children = N->getChildren();
263 for (unsigned I = 0, E = Children.size(); I != E; ++I)
264 HoistRegion(Children[I]);
267 /// IsLoopInvariantInst - Returns true if the instruction is loop
268 /// invariant. I.e., all virtual register operands are defined outside of the
269 /// loop, physical registers aren't accessed explicitly, and there are no side
270 /// effects that aren't captured by the operands or other flags.
272 bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) {
274 DOUT << "--- Checking if we can hoist " << I;
275 if (I.getInstrDescriptor()->ImplicitUses) {
276 DOUT << " * Instruction has implicit uses:\n";
278 const MRegisterInfo *MRI = TM->getRegisterInfo();
279 const unsigned *ImpUses = I.getInstrDescriptor()->ImplicitUses;
281 for (; *ImpUses; ++ImpUses)
282 DOUT << " -> " << MRI->getName(*ImpUses) << "\n";
285 if (I.getInstrDescriptor()->ImplicitDefs) {
286 DOUT << " * Instruction has implicit defines:\n";
288 const MRegisterInfo *MRI = TM->getRegisterInfo();
289 const unsigned *ImpDefs = I.getInstrDescriptor()->ImplicitDefs;
291 for (; *ImpDefs; ++ImpDefs)
292 DOUT << " -> " << MRI->getName(*ImpDefs) << "\n";
295 if (TII->hasUnmodelledSideEffects(&I))
296 DOUT << " * Instruction has side effects.\n";
299 // The instruction is loop invariant if all of its operands are loop-invariant
300 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
301 const MachineOperand &MO = I.getOperand(i);
303 if (!(MO.isRegister() && MO.getReg() && MO.isUse()))
306 unsigned Reg = MO.getReg();
308 // Don't hoist instructions that access physical registers.
309 if (!MRegisterInfo::isVirtualRegister(Reg))
312 assert(RegInfo->getVRegDef(Reg)&&"Machine instr not mapped for this vreg?");
314 // If the loop contains the definition of an operand, then the instruction
315 // isn't loop invariant.
316 if (CurLoop->contains(RegInfo->getVRegDef(Reg)->getParent()))
320 // Don't hoist something that has unmodelled side effects.
321 if (TII->hasUnmodelledSideEffects(&I)) return false;
323 // If we got this far, the instruction is loop invariant!
327 /// Hoist - When an instruction is found to only use loop invariant operands
328 /// that is safe to hoist, this instruction is called to do the dirty work.
330 void MachineLICM::Hoist(MachineInstr &MI) {
331 if (!IsLoopInvariantInst(MI)) return;
333 std::vector<MachineBasicBlock*> Preds;
335 // Non-back-edge predecessors.
336 FindPredecessors(Preds);
338 // Either we don't have any predecessors(?!) or we have more than one, which
340 if (Preds.empty() || Preds.size() != 1) return;
342 // Check that the predecessor is qualified to take the hoisted
343 // instruction. I.e., there is only one edge from the predecessor, and it's to
345 MachineBasicBlock *MBB = Preds.front();
347 // FIXME: We are assuming at first that the basic block coming into this loop
348 // has only one successor. This isn't the case in general because we haven't
349 // broken critical edges or added preheaders.
350 if (MBB->succ_size() != 1) return;
351 assert(*MBB->succ_begin() == CurLoop->getHeader() &&
352 "The predecessor doesn't feed directly into the loop header!");
354 // Now move the instructions to the predecessor.
355 MoveInstToEndOfBlock(MBB, MI.getParent(), &MI);