1 //===-- lib/Codegen/MachineRegisterInfo.cpp -------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Implementation of the MachineRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 MachineRegisterInfo::MachineRegisterInfo(const MRegisterInfo &MRI) {
18 VRegInfo.reserve(256);
19 UsedPhysRegs.resize(MRI.getNumRegs());
21 // Create the physreg use/def lists.
22 PhysRegUseDefLists = new MachineOperand*[MRI.getNumRegs()];
23 memset(PhysRegUseDefLists, 0, sizeof(MachineOperand*)*MRI.getNumRegs());
26 MachineRegisterInfo::~MachineRegisterInfo() {
28 for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i)
29 assert(VRegInfo[i].second == 0 && "Vreg use list non-empty still?");
31 delete [] PhysRegUseDefLists;
34 /// HandleVRegListReallocation - We just added a virtual register to the
35 /// VRegInfo info list and it reallocated. Update the use/def lists info
37 void MachineRegisterInfo::HandleVRegListReallocation() {
38 // The back pointers for the vreg lists point into the previous vector.
39 // Update them to point to their correct slots.
40 for (unsigned i = 0, e = VRegInfo.size(); i != e; ++i) {
41 MachineOperand *List = VRegInfo[i].second;
43 // Update the back-pointer to be accurate once more.
44 List->Contents.Reg.Prev = &VRegInfo[i].second;
48 /// replaceRegWith - Replace all instances of FromReg with ToReg in the
49 /// machine function. This is like llvm-level X->replaceAllUsesWith(Y),
50 /// except that it also changes any definitions of the register as well.
51 void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) {
52 assert(FromReg != ToReg && "Cannot replace a reg with itself");
54 // TODO: This could be more efficient by bulk changing the operands.
55 for (reg_iterator I = reg_begin(FromReg), E = reg_end(); I != E; ) {
56 MachineOperand &O = I.getOperand();
63 /// getVRegDef - Return the machine instr that defines the specified virtual
64 /// register or null if none is found. This assumes that the code is in SSA
65 /// form, so there should only be one definition.
66 MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
67 assert(Reg-MRegisterInfo::FirstVirtualRegister < VRegInfo.size() &&
69 for (reg_iterator I = reg_begin(Reg), E = reg_end(); I != E; ++I) {
70 // Since we are in SSA form, we can stop at the first definition.
71 if (I.getOperand().isDef())